公开(公告)号：US20060125573A1

公开(公告)日：2006-06-15

申请号：US11351041

申请日：2006-02-09

Applicant: Gilbert Brunette ,  Eric Johnson ,  Stephen Rayment ,  Colin Soul

Inventor： Gilbert Brunette ,  Eric Johnson ,  Stephen Rayment ,  Colin Soul

IPC: H01P5/02

CPC classification number: H05K1/0251 ,  H01L2223/6616 ,  H01L2223/6622 ,  H01L2223/6627 ,  H01L2924/1903 ,  H05K1/0222 ,  H05K3/429 ,  H05K2201/0715 ,  H05K2201/09618 ,  H05K2201/09718 ,  H05K2201/09809

Abstract: An interconnection structure for interconnecting circuitry on a first conductive layer to circuitry on a second conductive layer is provided. The interconnection structure of the present invention comprises a signal conductor via surrounded by a plurality of ground vias. The plurality of ground vias shield the signal conductor via, thus providing electrical isolation for the conductor via from the rest of the circuitry. One feature of the present invention is that the plurality of ground vias can be modified, adjusting their diameters and their placement relative to the signal conductor via, in order to affect the overall characteristic impedance of the interconnection structure. This feature is useful when propagating high frequency signals between signal traces on different conductive layers of a printed circuit board. In view of the high frequencies used in today's wireless communication systems, the interconnection structure proposed aids in the practical implementation of radio frequency modules by mitigating the effects of impedance discontinuities ordinarily present at signal trace-to-via transition regions.

Abstract translation: 提供了用于将第一导电层上的电路与第二导电层上的电路互连的互连结构。 本发明的互连结构包括被多个接地通孔包围的信号导体通路。 多个接地通孔屏蔽信号导体通孔，从而为电路的其余部分提供导体通孔的电气隔离。 本发明的一个特征是可以改变多个接地通孔，调整它们的直径和相对于信号导体通孔的位置，以便影响互连结构的整体特性阻抗。 当在印刷电路板的不同导电层上的信号迹线之间传播高频信号时，该功能非常有用。 鉴于当今无线通信系统中使用的高频，所提出的互连结构通过减轻通常存在于信号跟踪到通过过渡区域的阻抗不连续性的影响，有助于射频模块的实际实现。

公开(公告)号：US07053484B2

公开(公告)日：2006-05-30

申请号：US10822409

申请日：2004-04-12

Applicant: Reza Tayrani

Inventor： Reza Tayrani

IPC: H01L23/34

CPC classification number: H05K1/0219 ,  H01P1/127 ,  H01P1/2135 ,  H05K2201/0715 ,  H05K2201/09618 ,  H05K2201/09845

Abstract: A miniaturized microwave circuit. The novel circuit includes a first substrate, a first ground plate disposed on a bottom surface of the first substrate, a second substrate attached to a top surface of the first substrate and adapted to cover a portion of the first substrate, a second ground plate disposed on a top surface of the second substrate, a pattern of metallization disposed between the first and second substrates to form a stripline circuit, one or more ground paths disposed on the top surface of the first substrate and including a plurality of vias connected to the first ground plate, and one or more openings cut into the second substrate and second ground plate, wherein each opening follows and is aligned over a portion of a ground path and is filled in with conducting material, such that the second ground plate is connected to the first ground plate.

Abstract translation: 微型微波电路。 该新颖电路包括第一基板，设置在第一基板底面上的第一接地板，附接到第一基板的顶表面并适于覆盖第一基板的一部分的第二基板，设置在第二基板上的第二接地板 在所述第二基板的顶表面上，设置在所述第一和第二基板之间以形成带状线电路的金属化图案，设置在所述第一基板的顶表面上的一个或多个接地路径，并且包括连接到所述第一基板的多个通孔 接地板和切割到第二基板和第二接地板中的一个或多个开口，其中每个开口跟随并在接地路径的一部分上对齐并且被导电材料填充，使得第二接地板连接到 第一接地板。

公开(公告)号：US07030480B2

公开(公告)日：2006-04-18

申请号：US10355196

申请日：2003-01-31

Applicant: Yoshiyuki Kimura ,  Atsushi Kikuchi ,  Yoshihiko Ikemoto

Inventor： Yoshiyuki Kimura ,  Atsushi Kikuchi ,  Yoshihiko Ikemoto

IPC: H01L23/04 ,  H01L23/12 ,  H01L23/14 ,  H01L23/48

CPC classification number: H05K1/0222 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L2223/6616 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0251 ,  H05K1/0298 ,  H05K3/3436 ,  H05K3/368 ,  H05K2201/0715 ,  H05K2201/09309 ,  H05K2201/09618 ,  H05K2201/09809 ,  H01L2924/00 ,  H01L2224/0401

Abstract: Preparing a bottom grounding layer eliminates grounding pins, thereby the number of signal pins can be increased in a multilayer board that includes a grounding layer, a signal layer, a power supply layer, a grounding via, a signal via, a power supply via and the like in the insulation material of the multilayer board, the bottom grounding layer being electrically connected to the grounding layer.

Abstract translation: 准备底部接地层消除了接地引脚，从而可以在包括接地层，信号层，电源层，接地通孔，信号通孔，电源通孔和电源通孔的多层板中增加信号引脚的数量， 在多层板的绝缘材料中，底部接地层电连接到接地层。

公开(公告)号：US06996899B2

公开(公告)日：2006-02-14

申请号：US10397890

申请日：2003-03-25

Applicant: Damion T. Searls ,  Terrance J. Dishongh ,  James D. Jackson

Inventor： Damion T. Searls ,  Terrance J. Dishongh ,  James D. Jackson

IPC: H01R9/00

CPC classification number: H01L23/49838 ,  H01L2224/16 ,  H05K1/0263 ,  H05K1/113 ,  H05K1/162 ,  H05K3/3436 ,  H05K2201/09236 ,  H05K2201/094 ,  H05K2201/09618 ,  H05K2201/10734 ,  H05K2203/0465 ,  Y02P70/613 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49179

Abstract: Solder bumps are created on a substrate of an electronic assembly having lengths that are longer than the widths. The solder bumps are created by locating solder balls of power or ground connections close to one another so that, upon reflow, the solder balls combine. Signal solder balls however remain separated. Capacitors are created by locating power solder bumps adjacent ground solder bumps and extending parallel to one another.

公开(公告)号：US06980068B2

公开(公告)日：2005-12-27

申请号：US10373067

申请日：2003-02-26

Applicant: Yasunori Miyazawa ,  Katsuji Kaminishi

Inventor： Yasunori Miyazawa ,  Katsuji Kaminishi

IPC: H05K1/14 ,  H01P1/04 ,  H01P5/02 ,  H01P5/08 ,  H01R9/05 ,  H05K1/00 ,  H05K1/02 ,  H05K3/00 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40 ,  H05K3/42 ,  H01P3/08

CPC classification number: H05K1/0251 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01P1/047 ,  H01P5/02 ,  H01P5/085 ,  H01R9/0515 ,  H01R24/50 ,  H05K1/0222 ,  H05K1/0298 ,  H05K3/0052 ,  H05K3/325 ,  H05K3/3405 ,  H05K3/3447 ,  H05K3/368 ,  H05K3/403 ,  H05K3/42 ,  H05K2201/0311 ,  H05K2201/0715 ,  H05K2201/09618 ,  H05K2201/09809 ,  H05K2201/10303 ,  H05K2201/10356 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A cut via is formed in an end of a multilayer circuit board of the first transmission line, and a clearance is provided between the cut via and a ground pattern for achieving an impedance matching between the first and second transmission lines. The cut via of a first transmission line which may be a stripline or a microstrip line, and an electrode of the second transmission line are connected to each other, and ground patterns of the first and second transmission lines are connected to each other. The first and second transmission lines have respective signal lines positioned substantially coaxially with each other.

Abstract translation: 切割通孔形成在第一传输线的多层电路板的端部，并且在切割通孔和接地图案之间设置间隙，以实现第一和第二传输线之间的阻抗匹配。 可以是带状线或微带线的第一传输线的切断通路和第二传输线的电极彼此连接，并且第一和第二传输线的接地图形彼此连接。 第一和第二传输线具有彼此基本同轴地定位的各个信号线。

公开(公告)号：US20050206467A1

公开(公告)日：2005-09-22

申请号：US11043978

申请日：2005-01-28

Applicant: Hiroyuki Dohata

Inventor： Hiroyuki Dohata

IPC: H01P3/08 ,  H05K1/02 ,  H05K3/46

CPC classification number: H01P3/088 ,  H05K1/0219 ,  H05K2201/09236 ,  H05K2201/09618 ,  H05K2201/09672

Abstract: A plurality of signal lines are provided on one main surface of a dielectric substrate. A plurality of other signal lines are provided on the other main surface of dielectric substrate. The plurality of signal lines on one main surface and the plurality of other signal lines on the other main surface are provided so as to extend in parallel to one another. A ground pattern having its potential fixed is provided between neighboring signal lines on one main surface, and a ground pattern having its potential fixed is provided between neighboring signal lines on the other surface. According to such a structure, a microstrip line that can include a larger number of signal lines on the main surfaces of the dielectric substrate, without increasing a size of the dielectric substrate is obtained.

Abstract translation: 多个信号线设置在电介质基板的一个主表面上。 在电介质基板的另一个主表面上设置多条其它信号线。 一个主表面上的多个信号线和另一个主表面上的多个其它信号线设置成彼此平行地延伸。 在一个主表面上的相邻信号线之间设置具有其电位固定的接地图案，并且在另一表面上的相邻信号线之间设置其电位固定的接地图案。 根据这种结构，可以获得在不增加电介质基板的尺寸的情况下可以在电介质基板的主表面上包含更多数量的信号线的微带线。

公开(公告)号：US20050205292A1

公开(公告)日：2005-09-22

申请号：US10803311

申请日：2004-03-18

Applicant: Shawn Rogers ,  Todd Steigerwald

Inventor： Shawn Rogers ,  Todd Steigerwald

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/16 ,  H05K3/42 ,  H05K7/06 ,  H05K9/00

CPC classification number: H05K1/0236 ,  H05K1/0231 ,  H05K1/116 ,  H05K1/162 ,  H05K3/429 ,  H05K9/0039 ,  H05K2201/0191 ,  H05K2201/09481 ,  H05K2201/09618 ,  H05K2201/09672 ,  H05K2201/09681 ,  H05K2201/09781

Abstract: An apparatus for suppressing noise in an electronic device includes a multiple layer structure in which localized arrays of chip capacitors and/or patches around sources of electromagnetic waves are used. The PCB includes multiple conductive layers at different potentials, dielectric layers separating the conductive layers, conductive rods extending between at least two of the conductive layers, and a layer of patches disposed adjacent or on one or more of the conductive layers. The conductive rods are connected to one of the conductive layers and chip capacitors connect the conductive rods to another of the conductive layers. A particular location can be effectively isolated from noise using a few unit cells of an array of patches/capacitors partially or completely surrounding the particular location.

Abstract translation: 一种用于抑制电子装置中的噪声的装置包括多层结构，其中使用围绕电磁波源的片状电容器和/或补片的局部阵列。 PCB包括在不同电位的多个导电层，分隔导电层的电介质层，在至少两个导电层之间延伸的导电棒以及邻近或在一个或多个导电层上设置的一层补片。 导电棒连接到一个导电层，芯片电容器将导电棒连接到另一个导电层。 特定位置可以使用部分或完全围绕特定位置的贴片/电容器阵列的几个单元电池与噪声有效隔离。

公开(公告)号：US20050190614A1

公开(公告)日：2005-09-01

申请号：US10790336

申请日：2004-03-01

Applicant: Gilbert Brunette ,  Eric Johnson ,  Stephen Rayment ,  Colin Soul

Inventor： Gilbert Brunette ,  Eric Johnson ,  Stephen Rayment ,  Colin Soul

IPC: G11C7/00 ,  H01L23/52 ,  H05K1/02 ,  H05K1/11 ,  H05K3/42

CPC classification number: H05K1/0251 ,  H01L2223/6616 ,  H01L2223/6622 ,  H01L2223/6627 ,  H01L2924/1903 ,  H05K1/0222 ,  H05K3/429 ,  H05K2201/0715 ,  H05K2201/09618 ,  H05K2201/09718 ,  H05K2201/09809

Abstract: An interconnection structure for interconnecting circuitry on a first conductive layer to circuitry on a second conductive layer is provided. The interconnection structure of the present invention comprises a signal conductor via surrounded by a plurality of ground vias. The plurality of ground vias shield the signal conductor via, thus providing electrical isolation for the conductor via from the rest of the circuitry. One feature of the present invention is that the plurality of ground vias can be modified, adjusting their diameters and their placement relative to the signal conductor via, in order to affect the overall characteristic impedance of the interconnection structure. This feature is useful when propagating high frequency signals between signal traces on different conductive layers of a printed circuit board. In view of the high frequencies used in today's wireless communication systems, the interconnection structure proposed aids in the practical implementation of radio frequency modules by mitigating the effects of impedance discontinuities ordinarily present at signal trace-to-via transition regions.

Abstract translation: 提供了用于将第一导电层上的电路与第二导电层上的电路互连的互连结构。 本发明的互连结构包括被多个接地通孔包围的信号导体通路。 多个接地通孔屏蔽信号导体通孔，从而为电路的其余部分提供导体通孔的电气隔离。 本发明的一个特征是可以改变多个接地通孔，调整它们的直径和相对于信号导体通孔的位置，以便影响互连结构的整体特性阻抗。 当在印刷电路板的不同导电层上的信号迹线之间传播高频信号时，该功能非常有用。 鉴于当今无线通信系统中使用的高频，所提出的互连结构通过减轻通常存在于信号跟踪到通过过渡区域的阻抗不连续性的影响，有助于射频模块的实际实现。

公开(公告)号：US06933450B2

公开(公告)日：2005-08-23

申请号：US10603256

申请日：2003-06-25

Applicant: Takehiro Okumichi ,  Hiroyuki Tanaka ,  Yuji Kishida

Inventor： Takehiro Okumichi ,  Hiroyuki Tanaka ,  Yuji Kishida

IPC: H01L23/498 ,  H01L23/552 ,  H01L23/66 ,  H01P1/04 ,  H01R12/04 ,  H05K1/02 ,  H05K1/11 ,  H05K7/06

CPC classification number: H01L23/552 ,  H01L23/49827 ,  H01L23/66 ,  H01L24/48 ,  H01L2223/6616 ,  H01L2224/32188 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15174 ,  H01L2924/16195 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01P1/047 ,  H05K1/0222 ,  H05K1/0251 ,  H05K1/115 ,  H05K2201/096 ,  H05K2201/09618 ,  H05K2201/09809 ,  H05K2201/09845 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Signal wiring conductors are provided at opposing positions on the upper surface of the uppermost dielectric layer and on the lower surface of the bottommost dielectric layer, and grounding conductors surrounding grounding-conductor non-forming areas are provided on the upper surfaces of intermediate dielectric layers and the bottommost dielectric layer. These grounding conductors form an electromagnetically shielded space by being connected by grounding-conductor via conductors vertically penetrating the respective dielectric layers around the grounding-conductor non-forming areas, and signal via conductors are so provided in the respective dielectric layers as to penetrate this electromagnetically shielded space. A signal via conductor of the uppermost dielectric layer is connected with the signal wiring conductor on the upper surface thereof via a signal-wiring connecting conductor, and a signal via conductor of the bottommost dielectric layer is connected with the signal wiring conductor on the lower surface thereof via a signal-wiring connecting conductor.

Abstract translation: 信号布线导体设置在最上层电介质层的上表面和最下面的电介质层的下表面的相对位置处，并且在中间电介质层的上表面上设置有围绕接地导体非形成区域的接地导体， 最底层的介电层。 这些接地导体通过接地导体形成电磁屏蔽空间，该导体通过垂直地穿过接地导体非形成区域周围的各个介电层的导体连接，并且信号通孔导体设置在相应的电介质层中，以贯穿该电磁 屏蔽空间。 最上面的电介质层的信号通孔导体经由信号布线连接导体与其上表面的信号布线导体连接，最下面的电介质层的信号通孔导体与下表面的信号布线导体连接 通过信号线连接导体。

公开(公告)号：US20050041400A1

公开(公告)日：2005-02-24

申请号：US10914458

申请日：2004-08-09

Applicant: Reinhold Berberich ,  Dieter Busch ,  Reinfried Grimmel

Inventor： Reinhold Berberich ,  Dieter Busch ,  Reinfried Grimmel

IPC: H05K1/02 ,  H05K1/16 ,  H05K1/18 ,  H05K3/00 ,  H05K1/11

CPC classification number: H05K1/162 ,  H05K1/0218 ,  H05K1/189 ,  H05K3/4691 ,  H05K2201/0715 ,  H05K2201/09618 ,  H05K2201/09672

Abstract: An electronic device includes a first module, which is protected against electromagnetic interference, and a second module. At least the first module has multilayer printed circuit boards with at least one inner layer with conductor tracks. The at least one inner layer forms flexible connections between the printed circuit boards of the first and second modules. The at least one inner layer forms a bushing capacitor together with other conductor tracks of the first module.

Abstract translation: 一种电子设备包括被防止电磁干扰的第一模块和第二模块。 至少第一模块具有具有至少一个具有导体轨迹的内层的多层印刷电路板。 至少一个内层在第一和第二模块的印刷电路板之间形成柔性连接。 所述至少一个内层与第一模块的其它导体轨道一起形成衬套电容器。