公开(公告)号：US20220225496A1

公开(公告)日：2022-07-14

申请号：US17504635

申请日：2021-10-19

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Gwo-Shyan Sheu ,  Hsin-Hao Huang ,  Yu-Chen Ma ,  Chia-Hsin Yen

IPC: H05K1/02

Abstract: A flexible circuit board includes a flexible substrate, a chip and a patterned circuit layer. A surface of the flexible substrate is separated into a working area and a nonworking area according to a cutting line. The chip is disposed on the working area. The patterned circuit layer is disposed on the surface and includes signal transmission wires and bypass wires, the bypass wires are not electrically connected to the chip. Each of the bypass wires includes a bypass transmission portion located on the working area and an anti-peeling portion located on the nonworking area. A blank area exists between the anti-peeling area and the bypass transmission portion, and the cutting line passes through the blank area. A distance between 100 um and 400 um exists from the anti-peeling portion to the cutting line.

公开(公告)号：US20220104354A1

公开(公告)日：2022-03-31

申请号：US17227458

申请日：2021-04-12

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H05K1/11 ,  H05K1/18

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate. The chip is mounted on the chip mounting area, a space exists between a first bump and a second bump of the chip, and there are no additional bumps between the first and second bumps. A first inner lead, a second inner lead, a first dummy lead and a second dummy lead of the circuit layer are located on the chip mounting area. The first and second inner leads are electrically connected to the first and second bumps respectively. The first dummy lead is connected to the first inner lead and adjacent to the first bump, and the second dummy lead is connected to the second inner lead and adjacent to the second bump.

公开(公告)号：US20220037238A1

公开(公告)日：2022-02-03

申请号：US17227470

申请日：2021-04-12

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H01L23/498 ,  H05K1/18 ,  H01L23/00

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate, the circuit area surrounds the chip mounting area. The chip is mounted on the chip mounting area of the top surface and includes a bump. The circuit layer is disposed on the top surface. A connection portion of the circuit layer extends across a first side of the chip mounting area and into the chip mounting area. A transmission portion of the circuit layer is located on the circuit area and electrically connected to the connection portion. A stress release portion of the circuit layer is located between the transmission portion and a second side of the chip mounting area and is a comb-shaped structure.

公开(公告)号：US11206735B2

公开(公告)日：2021-12-21

申请号：US17160483

申请日：2021-01-28

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yin-Chen Lin ,  Hui-Yu Huang ,  Chih-Ming Peng ,  Chun-Te Lee

IPC: H05K1/02

Abstract: A flexible circuit board includes a flexible light-permeable carrier, a circuit layer, a mark and a stiffener. The circuit layer and the mark are located on a top surface of the flexible light-permeable carrier. A predetermined area and a stiffener mounting area corresponding to each other are defined on the top surface and a bottom surface of the flexible light-permeable carrier, respectively. The mark is opaque to create a shadow mark having a longitudinal reference side and a lateral reference side on the bottom surface. The stiffener is adhered to the stiffener mounting area defined on the bottom surface by aligning with the longitudinal reference side and the lateral reference side of the shadow mark.

公开(公告)号：US11178756B2

公开(公告)日：2021-11-16

申请号：US17160483

申请日：2021-01-28

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yin-Chen Lin ,  Hui-Yu Huang ,  Chih-Ming Peng ,  Chun-Te Lee

IPC: H05K1/02

Abstract: A flexible circuit board includes a flexible light-permeable carrier, a circuit layer, a mark and a stiffener. The circuit layer and the mark are located on a top surface of the flexible light-permeable carrier. A predetermined area and a stiffener mounting area corresponding to each other are defined on the top surface and a bottom surface of the flexible light-permeable carrier, respectively. The mark is opaque to create a shadow mark having a longitudinal reference side and a lateral reference side on the bottom surface. The stiffener is adhered to the stiffener mounting area defined on the bottom surface by aligning with the longitudinal reference side and the lateral reference side of the shadow mark.

公开(公告)号：US20210265255A1

公开(公告)日：2021-08-26

申请号：US17038237

申请日：2020-09-30

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H01L23/498 ,  H01L23/00

Abstract: A flip chip interconnection including a circuit board is disclosed. The circuit board includes a substrate, inner leads, a T-shaped circuit line and a dummy pattern. The inner leads, the T-shaped circuit line and the dummy pattern are located on an inner bonding area of the substrate. The T-shaped circuit line includes a main segment, a branch segment and a connection segment that is connected to the main segment and the branch segment. The main segment and the branch segment are extended along a lateral direction and a longitudinal direction, respectively. The dummy pattern is located between the connection segment and the inner leads.

公开(公告)号：US20210257287A1

公开(公告)日：2021-08-19

申请号：US16986415

申请日：2020-08-06

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H01L23/498 ,  H01L23/00

Abstract: A chip package includes a circuit board, a chip and an underfill. The circuit board includes a substrate, first circuit lines and second circuit lines. Each of the first circuit lines includes an inner lead and a first line fragment that are disposed on a chip mounting area and an underfill covering area of the substrate, respectively. The second circuit lines are disposed on the chip mounting area and not located between the adjacent inner leads so as to form a wider space between the adjacent first line fragments. The wider space enables the underfill to flow to between the circuit board and the chip and prevents air bubbles from being embedded in the underfill filled between the circuit board and the chip.

公开(公告)号：US20210035947A1

公开(公告)日：2021-02-04

申请号：US17072175

申请日：2020-10-16

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Chin-Tang Hsieh ,  Chia-Jung Tu

IPC: H01L23/00

Abstract: Method and device for compression bonding are disclosed. During compression bonding a chip to a substrate, an anti-adhesion layer on a stage is provided to contact with a solder resist layer on the substrate. The solder resist layer will not stick to the anti-adhesion layer such that the reduction of bonding precision due to the solder resist layer remains residues on the compression bonding device is preventable.

公开(公告)号：US10580729B2

公开(公告)日：2020-03-03

申请号：US15952814

申请日：2018-04-13

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Chin-Tang Hsieh ,  Chun-Te Lee

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

Abstract: A chip on film package includes a chip and a flexible substrate having a film and a circuit layer. The circuit layer is formed on a first surface of the film and electrically connected to the chip. At least one groove is recessed on a second surface of the film. The flexible substrate is bent to form flat portions and at least one curved portion located between the flat portions when it is bonded to external electronic components. The groove is located on the curved portion and provided to protect the curved portion of the flexible substrate from breaking.

公开(公告)号：US20190252298A1

公开(公告)日：2019-08-15

申请号：US15952814

申请日：2018-04-13

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Chin-Tang Hsieh ,  Chun-Te Lee

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

Abstract: A chip on film package includes a chip and a flexible substrate having a film and a circuit layer. The circuit layer is formed on a first surface of the film and electrically connected to the chip. At least one groove is recessed on a second surface of the film. The flexible substrate is bent to form flat portions and at least one curved portion located between the flat portions when it is bonded to external electronic components. The groove is located on the curved portion and provided to protect the curved portion of the flexible substrate from breaking.