公开(公告)号：US20010004024A1

公开(公告)日：2001-06-21

申请号：US09777976

申请日：2001-02-06

Inventor： Wesley M. Enroth ,  George D. Oxx JR. ,  Jenny B. Porter

IPC: H05K001/11

CPC classification number: H05K1/114 ,  H05K3/3415 ,  H05K3/3447 ,  H05K3/3468 ,  H05K3/3484 ,  H05K2201/09572 ,  H05K2201/10734 ,  H05K2203/043 ,  H05K2203/1476 ,  H05K2203/1572 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49149

Abstract: A method for fabricating a printed circuit board assembly comprising a via, wherein the method inhibits the flow of molten solder into the via during a wave soldering step, thereby preventing heat transfer that might otherwise degrade a solder joint at a top pad that is thermally coupled to the via. The method comprises the steps of: (1) fastening a bottom component to the bottom surface of the circuit board by a screening and reflow of solder paste that also generates a solder plug in the via; (2) fastening top components to the top surface of the circuit board by a screening and reflow of solder paste, wherein the top components comprise ball grid arrays and other surface mount devices that are to be affixed to pads which are connected to vias; and (3) wave soldering the bottom surface to affix additional components onto the circuit board, such as pin-in-hole components placed on the top surface. The solder plug formed in the via during the first step prevents molten solder from flowing into the via during the subsequent wave soldering step, thereby inhibiting heat transfer from the molten solder to the solder joint at the top pad.

Abstract translation: 一种用于制造包括通孔的印刷电路板组件的方法，其中所述方法在波峰焊步骤期间抑制熔融焊料流入通孔，从而防止在热耦合的顶部焊盘处否则会降低焊料接头的热传递 到通道。 该方法包括以下步骤：（1）通过焊膏的筛选和回流将底部部件固定到电路板的底表面，焊膏也在通孔中产生焊料塞; （2）通过焊膏的筛选和回流将顶部部件固定到电路板的顶表面，其中顶部部件包括球栅阵列和其它表面安装装置，其将固定到连接到通孔的焊盘上; 和（3）波峰焊底部表面以将附加部件附加到电路板上，例如放置在顶表面上的针孔组件。 在第一步骤中形成在通孔中的焊料塞在随后的波峰焊步骤期间防止熔融焊料流入通孔，从而阻止从熔融焊料到顶部焊盘处的焊接接头的热传递。

公开(公告)号：US6132543A

公开(公告)日：2000-10-17

申请号：US41666

申请日：1998-03-13

Applicant: Noboru Mohri ,  Hayami Matsunaga ,  Masaaki Hayama ,  Tomitarou Murakami

Inventor： Noboru Mohri ,  Hayami Matsunaga ,  Masaaki Hayama ,  Tomitarou Murakami

IPC: H05K3/40 ,  H01L23/12 ,  H01L23/13 ,  H05K1/03 ,  H05K1/09 ,  H05K1/16 ,  H05K3/12 ,  H05K3/20 ,  H05K3/34 ,  H05K3/38 ,  H05K3/46 ,  B32B31/26

CPC classification number: H05K3/3484 ,  H05K3/207 ,  H05K3/3457 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/162 ,  H05K2201/09481 ,  H05K2201/0949 ,  H05K2201/09572 ,  H05K2201/09763 ,  H05K2203/0113 ,  H05K2203/043 ,  H05K2203/0465 ,  H05K3/1216 ,  H05K3/386 ,  H05K3/4061 ,  Y10T29/49163

Abstract: The present invention provides a packaged substrate which has a superior positioning accuracy of wiring formed on a circuit substrate made of ceramics, and a conductive pattern with a thick film and yet a fine pattern. On a surface of flexible base member made of plastic, fine grooves are formed in a pattern corresponding to a first conductive pattern so that a cavity face is produced. Conductive paste is filled and into the grooves on this cavity face, and then dried. The cavity face and a circuit substrate are pasted with each other by applying predetermined heat and pressure. A pattern of the dried conductive paste is transcribed onto the circuit substrate, and then the first conductive pattern is formed by firing. A first ball solder is coupled with a second conductive pattern which is coupled to the first conductive pattern through an electrode in a through-hole of the circuit substrate.

Abstract translation: 本发明提供一种封装基板，其具有优良的定位精度，该布线形成在由陶瓷制成的电路基板上，导电图案具有厚膜，而且精细图案。 在由塑料制成的柔性基材的表面上，以对应于第一导电图案的图案形成微细凹槽，从而产生空腔面。 将导电浆料填充到该空腔面上的凹槽中，然后干燥。 通过施加预定的热和压力将空腔面和电路基板彼此粘贴。 将干燥的导电浆料的图案转印到电路基板上，然后通过烧制形成第一导电图案。 第一球焊与第二导电图案耦合，第二导电图案通过电路基板的通孔中的电极耦合到第一导电图案。

公开(公告)号：US6098283A

公开(公告)日：2000-08-08

申请号：US78448

申请日：1998-05-13

Applicant: Mike Goetsch ,  Jim Siettmann ,  Leo Craft ,  Eric Swanger

Inventor： Mike Goetsch ,  Jim Siettmann ,  Leo Craft ,  Eric Swanger

IPC: H01L21/48 ,  H01L23/498 ,  H05K1/11 ,  H05K3/34 ,  H05K3/40

CPC classification number: H01L23/49816 ,  H01L21/486 ,  H01L23/49827 ,  H05K3/3478 ,  H01L2224/05599 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2224/85399 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/114 ,  H05K2201/09572 ,  H05K2203/041 ,  H05K2203/043 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A via for an electronic assembly. The assembly includes a substrate which has a via hole. The via hole is filled with a conductive material that extends across a diameter of the hole. The via hole can be filled by reflowing a solder ball that is attached to an outer surface of the substrate. The substrate may be part of a multi-layered integrated circuit package, wherein the vias couples internal routing layers with external contacts of the package. The filled vias can withstand extended thermal life cycles of the package.

Abstract translation: 用于电子组件的通孔。 组件包括具有通孔的基板。 通孔填充有延伸穿过孔的直径的导电材料。 可以通过回流附接到基板的外表面的焊球来填充通孔。 衬底可以是多层集成电路封装的一部分，其中通孔将内部布线层与封装的外部触点相连。 填充的通孔可以承受包装的延长的热寿命周期。

公开(公告)号：US5973923A

公开(公告)日：1999-10-26

申请号：US86365

申请日：1998-05-28

Applicant: Ionel Jitaru

Inventor： Ionel Jitaru

IPC: H01F27/06 ,  H05K1/02 ,  H05K1/05 ,  H05K1/16 ,  H05K7/20

CPC classification number: H05K1/165 ,  H01F27/06 ,  H05K1/0206 ,  H05K7/209 ,  H05K1/0203 ,  H05K1/05 ,  H05K2201/066 ,  H05K2201/086 ,  H05K2201/09054 ,  H05K2201/09063 ,  H05K2201/09572 ,  H05K2201/09745 ,  H05K2201/10166 ,  H05K3/0061 ,  Y10T29/49165

Abstract: A package for power converters in which a multilayers circuits board holds the components. The winding of the magnetic elements are incorporated in the multilayers circuit board. The top and some portion of the bottom layer are also support for electronic components. Some of the components are placed on the top layer, which may not be utilized for magnetic winding, reducing the footprint of the magnetic elements to the footprint of the magnetic core. The power dissipating devices placed on pads which have a multitude of copper coated via connecting the top to bottom layers. Through these via the heat is transferred from the power devices to the other side of the PCB. In some of the embodiment of this invention the heat can be further transferred to a metal plate connected to the multilayers circuit board via a thermally conductive insulator. The baseplate has cutouts or cavities to accommodate the magnetic cores. A thermally conductive is placed between the magnetic core and the metal plate on the bottom of the cavity.

Abstract translation: 用于电力转换器的封装，其中多层电路板保持部件。 磁性元件的绕组结合在多层电路板中。 底层的顶部和一部分也支持电子部件。 一些部件被放置在顶层上，其可能不用于磁性绕组，从而将磁性元件的占地面积减小到磁芯的占地面积。 功率耗散器件放置在焊盘上，通过连接顶层到底层，镀有多种铜。 通过这些通过热量从功率器件传递到PCB的另一侧。 在本发明的一些实施例中，可以通过导热绝缘体将热量进一步转移到连接到多层电路板的金属板上。 底板具有切口或空腔以容纳磁芯。 将导热材料放置在磁芯和空腔底部的金属板之间。

公开(公告)号：US5972734A

公开(公告)日：1999-10-26

申请号：US932711

申请日：1997-09-17

Applicant: Karla Y. Carichner ,  Dexin Liang

Inventor： Karla Y. Carichner ,  Dexin Liang

IPC: H01L23/498 ,  H05K3/34 ,  H05K3/40 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H05K3/3436 ,  H01L23/49816 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/85424 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/8547 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K2201/049 ,  H05K2201/09572 ,  H05K2201/10378 ,  H05K2201/10477 ,  H05K2201/10977 ,  H05K3/4038 ,  Y02P70/613

Abstract: A ball grid array package (BGA) according to the present invention has an interposer between a bond pad on the lower surface of the substrate and the solder ball. The interposer has a conductive portion in contact with the bond pad surrounded by a nonconductive or insulating portion. The conductive portion in contact with the bond pad is sufficiently constrained from widening during a subsequent reflow process by the presence of the nonconductive or insulating portion. The contact with the bond pad is sufficiently small to allow traces to pass near the bond pad substantially directly en route to another bond pad. The nonconductive portion also prevents subsequently-applied encapsulant from coming in contact with and contaminating the bond pad. The elevated surface of the interposer, i.e. the surface of the interposer furthest from the bond pad, supports the solder ball, and is sufficiently wide to support the solder ball without allowing the solder ball to come in contact with the traces. The solder ball and the trace routing on the lower surface of the substrate is in different planes, thereby allowing a simplified trace routing, but retaining and even increasing rigidity of the structure and coplanarity of the solder balls.

Abstract translation: 根据本发明的球栅阵列封装（BGA）在衬底的下表面上的接合焊盘和焊球之间具有插入件。 插入器具有与由非导电或绝缘部分包围的接合焊盘接触的导电部分。 与接合焊盘接触的导电部分通过存在非导电或绝缘部分在随后的回流工艺期间被充分地限制于加宽。 与接合焊盘的接触足够小，以允许迹线基本上直接通过接合焊盘附近通过另一接合焊盘。 不导电部分还防止随后施加的密封剂与接合焊盘接触并污染接合焊盘。 插入器的升高的表面，即距离接合焊盘最远的插入件的表面支撑焊球，并且足够宽以支撑焊球，而不允许焊球与迹线接触。 焊锡球和基板下表面上的走线路由处于不同的平面，从而允许简化的迹线路由，但是保持并均匀地提高了结构的刚度和焊球的共面性。

公开(公告)号：US5769989A

公开(公告)日：1998-06-23

申请号：US530452

申请日：1995-09-19

Applicant: Mark Kenneth Hoffmeyer ,  David A. Sluzewski

Inventor： Mark Kenneth Hoffmeyer ,  David A. Sluzewski

IPC: H01L21/60 ,  H05K1/02 ,  H05K3/34 ,  H05K3/42 ,  B32B35/00

CPC classification number: H01L24/83 ,  H01L24/32 ,  H05K1/0206 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H05K1/0212 ,  H05K2201/09572 ,  H05K2203/049 ,  H05K2203/176 ,  H05K3/341 ,  H05K3/429 ,  Y10S156/941 ,  Y10S428/901 ,  Y10T156/19 ,  Y10T29/4973 ,  Y10T428/31681

Abstract: A configuration of surface-mounted circuit assembly has four layers, namely, an integrated circuit device, an adhesive layer, a solder layer and the carrier board. The integrated circuit device is attached to the solder layer which sets on top of the carrier board, with the adhesive layer between the integrated circuit device and the solder layer. The carrier board has at least one via located beneath where the integrated circuit is located. The via is filled with solder such that the solder layer at which the integrated circuit device is situated is thermo-conductively connected to the back side of the carrier board. This configuration allows the integrated circuit device to be easily removed from the carrier board by the application of heat to the back side of the carrier board.

Abstract translation: 表面安装电路组件的结构具有四层，即集成电路器件，粘合剂层，焊料层和载体板。 集成电路器件安装在设置在载体板顶部上的焊料层，其中集成电路器件和焊料层之间的粘合剂层。 承载板具有位于集成电路所在的下方的至少一个通孔。 通孔填充有焊料，使得集成电路器件所在的焊料层热导电连接到载体板的背面。 这种配置允许通过向载板的背面施加热量来容易地将集成电路器件从载板上移除。

公开(公告)号：US5747877A

公开(公告)日：1998-05-05

申请号：US671429

申请日：1996-06-27

Applicant: James Warren Wilson

Inventor： James Warren Wilson

IPC: H01L23/12 ,  H01L23/31 ,  H01L23/36 ,  H01L23/367 ,  H01L23/373 ,  H05K1/02 ,  H05K3/28 ,  H05K3/42 ,  H01L23/06

CPC classification number: H05K1/0206 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/3735 ,  H05K1/0204 ,  H01L2224/32225 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/181 ,  H05K2201/09572 ,  H05K2201/10416 ,  H05K2203/049 ,  H05K3/284 ,  H05K3/42 ,  Y10T29/4913 ,  Y10T29/49146

Abstract: A semiconductor chip package and method of making same wherein the package comprises a ceramic substrate having two layers of thermally and electrically conductive material (e.g., copper) on opposing surfaces thereof, these layers thermally and electrically coupled by metal material located within holes provided in the ceramic. A semiconductor chip is mounted on one of these layers and the contact sites thereof electrically coupled to spaced circuitry which, in a preferred embodiment, Is formed simultaneously with both thermally conductive layers. Coupling of the circuitry to an external substrate (e.g., printed circuit board) is preferably accomplished using metallic spring clips. These clips are preferably soldered in position. A preferred metal for being positioned within the hole(s) is solder, one example being 10:90 tin: lead solder. The package as produced herein may further include two quantities of a protective encapsulant material located substantially on the upper portions thereof to protect the chip and circuitry. The preferred means for coupling the chip to the circuitry is to use a wire bonding operation.

Abstract translation: 一种半导体芯片封装及其制造方法，其中封装包括在其相对表面上具有两层导热和导电材料（例如铜）的陶瓷基板，这些层由位于孔内的孔内的金属材料热和电耦合 陶瓷。 半导体芯片安装在这些层之一上，并且其接触位置电耦合到间隔电路，在优选实施例中，它与两个导热层同时形成。 优选地，使用金属弹簧夹来实现电路与外部基板（例如，印刷电路板）的耦合。 这些夹子优选地被焊接就位。 用于定位在孔内的优选金属是焊料，一个例子是10:90锡：铅焊料。 本文生产的包装可以进一步包括两个量的基本上位于其上部的保护性密封材料，以保护芯片和电路。 将芯片耦合到电路的优选方法是使用引线键合操作。

公开(公告)号：US5531021A

公开(公告)日：1996-07-02

申请号：US366801

申请日：1994-12-30

Applicant: Frank Kolman ,  Kevin Haley

Inventor： Frank Kolman ,  Kevin Haley

IPC: H01L21/48 ,  H01L23/498 ,  H05K3/34 ,  H01K3/10

CPC classification number: H01L21/486 ,  H01L23/49827 ,  H05K3/3468 ,  H01L2924/0002 ,  H05K2201/09572 ,  H05K2201/10666 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/128 ,  H05K3/3436 ,  Y10T29/49149 ,  Y10T29/49165

Abstract: A surface mount package for an electronic device has an array of solder shapes or structures projecting from the bottom surface of the package. The solder structures are cast in place on the package substrate using a wave solder process. The solder also fills via holes in the substrate at each solder structure site. An integrated circuit is bonded to the top surface of the substrate using a conventional tape automated bonding (TAB) process or other suitable bonding process. The preferred shape of the solder structure is a cone, but other shapes, including hemispheres, columns and pyramids can be produced using a mold with suitably shaped cavities. The mold is preferably as large as an entire substrate panel so that a large number of device sites can be processed simultaneously.

Abstract translation: 用于电子设备的表面贴装封装具有从封装的底表面突出的焊料形状或结构的阵列。 使用波峰焊工艺将焊料结构浇铸在封装衬底上的适当位置。 焊料还通过每个焊料结构部位的基板上的孔填充。 集成电路使用传统的带式自动接合（TAB）工艺或其它合适的粘结工艺结合到衬底的顶表面。 焊料结构的优选形状是锥体，但是可以使用具有合适形状的腔的模具来生产包括半球，柱和金字塔的其它形状。 模具优选地与整个基板面板一样大，从而能够同时处理大量的装置位置。

公开(公告)号：US5326937A

公开(公告)日：1994-07-05

申请号：US7963

申请日：1993-01-22

Applicant: Shinya Watanabe

Inventor： Shinya Watanabe

IPC: H05K1/11 ,  H05K3/32 ,  H05K7/02 ,  H05K9/00

CPC classification number: H05K9/0039 ,  H05K1/0215 ,  H05K1/115 ,  H05K3/325 ,  H05K2201/09572 ,  H05K2201/0979 ,  H05K2201/10409

Abstract: At least one grounding through hole filled with solder is provided in a printed wiring board near by a fixing hole through which a screw fixes the board to a frame, penetrating a ground layer provided on an upper surface of the board and a substrate, made of insulating material, of the board. A metal layer made of electrically conductive and solderable material is plated on an inner surface of the grounding through hole so that melted solder is raised to an upper surface of the board. An upper end of the metal layer is formed to a flange electrically connected with the ground pattern so that the melted solder is raised from the upper surface of the board, forming a spherical end of the solder.

Abstract translation: 至少一个填充有焊料的接地通孔设置在靠近固定孔的印刷电路板中，固定孔通过该固定孔将板固定到框架，穿过设置在板的上表面上的接地层和基板，基板由 绝缘材料，板。 将由导电和可焊接材料制成的金属层电镀在接地通孔的内表面上，使熔融的焊料升高到电路板的上表面。 金属层的上端形成为与接地图形电连接的凸缘，使得熔融的焊料从板的上表面升高，形成焊料的球形端。

公开(公告)号：US4934555A

公开(公告)日：1990-06-19

申请号：US438098

申请日：1989-11-16

Applicant: Patrick O. Nunally

Inventor： Patrick O. Nunally

IPC: H05K3/00 ,  H05K3/34 ,  H05K3/40

CPC classification number: H05K3/0088 ,  H05K3/3468 ,  H05K2201/0305 ,  H05K2201/09572 ,  H05K2201/096 ,  H05K2203/082 ,  H05K3/4038

Abstract: A system and process, including a combination of a solder well and a vacuum system wherein micro through holes are filled with solder. A PC board or the like is supported for contact with solder on one side and with a vacuum apparatus for the application of a vacuum to the other side so that solder is drawn into the through holes for establishing electrically conductive connections therethrough.

Abstract translation: 一种系统和方法，包括焊料井和真空系统的组合，其中微通孔填充有焊料。 支撑PC板等用于与一侧的焊料接触，并且还具有用于向另一侧施加真空的真空装置，使得焊料被吸入到通孔中以建立通过其的导电连接。