公开(公告)号：US20080297978A1

公开(公告)日：2008-12-04

申请号：US12181441

申请日：2008-07-29

Applicant: Satoshi OHAGA ,  Yasutaka SUGIMOTO

Inventor： Satoshi OHAGA ,  Yasutaka SUGIMOTO

IPC: H01G4/12

CPC classification number: H01G4/105 ,  H01G4/1227 ,  H01G4/30 ,  H05K1/0306 ,  H05K1/162 ,  H05K3/0029 ,  H05K2201/017 ,  H05K2203/171 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49004

Abstract: In a multilayer ceramic substrate having a built-in capacitor provided in a ceramic laminate including a plurality of ceramic layers laminated to each other, the built-in capacitor being formed of a first capacitor electrode, a second capacitor electrode, and one of the dielectric glass ceramic layers, the capacitance value of the built-in capacitor is adjusted by performing laser trimming of the first capacitor electrode. The one dielectric glass ceramic layer is made of a TiO2-based dielectric glass ceramic layer in which the amount of dielectric grains including TiO2 is about 10 percent to about 35 percent by volume.

Abstract translation: 在具有内置电容器的多层陶瓷基板中，所述内置电容器设置在包括彼此层叠的多个陶瓷层的陶瓷层叠体中，所述内置电容器由第一电容器电极，第二电容器电极和所述电介质 玻璃陶瓷层，通过对第一电容器电极进行激光微调来调节内置电容器的电容值。 一个电介质玻璃陶瓷层由TiO 2基电介质玻璃陶瓷层制成，其中包括TiO 2的电介质颗粒的量为约10体积％至约35体积％。

公开(公告)号：US20080172852A1

公开(公告)日：2008-07-24

申请号：US11625481

申请日：2007-01-22

Applicant: William Borland ,  Lorri P. Drozdyk

Inventor： William Borland ,  Lorri P. Drozdyk

IPC: H01G7/00 ,  H05K3/20

CPC classification number: H01G4/33 ,  H01G4/1218 ,  H05K1/092 ,  H05K1/162 ,  H05K3/06 ,  H05K3/1291 ,  H05K3/4641 ,  H05K2201/017 ,  H05K2203/1126 ,  Y10T29/417 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49156

Abstract: Methods of making metal/dielectric/metal structures include casting copper slurry onto a fugitive substrate to form the first electrode and subsequently casting dielectric and copper slurries onto the first electrode, removing the fugitive substrate and co-firing the structure, wherein the dielectric comprises glass in an amount that is less than 20% by weight of the total inorganic composition and the dielectric achieves substantially complete densification. Alternatively, a metal tape and a dielectric tape, comprising glass in the above amount, may be formed and laminated together to form a metal/dielectric/metal green tape structure, which is co-fired, such that the structure achieves substantially complete densification.

Abstract translation: 制造金属/电介质/金属结构的方法包括将铜浆浇铸到短暂衬底上以形成第一电极，随后将电介质和铜浆浇铸到第一电极上，去除短暂衬底并共烧烧结构，其中电介质包括玻璃 其量小于总无机组合物的20重量％，并且电介质实现基本上完全的致密化。 或者，可以形成包含上述量的玻璃的金属带和介电带，并且层压在一起以形成共烧的金属/电介质/金属生带结构，使得该结构实现基本上完全的致密化。

公开(公告)号：US20080145518A1

公开(公告)日：2008-06-19

申请号：US11791595

申请日：2005-11-18

Applicant: Masakatsu Maeda ,  Yasuyuki Yamamoto ,  Kunihiro Gotoh

Inventor： Masakatsu Maeda ,  Yasuyuki Yamamoto ,  Kunihiro Gotoh

IPC: B05D5/12

CPC classification number: H01L23/49822 ,  H01L21/4857 ,  H01L33/486 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/28 ,  H05K3/3452 ,  H05K2201/017 ,  H01L2924/00

Abstract: An element-mounting substrate includes a ceramic substrate, an electrode layer formed on the substrate and a ceramic coating layer which is formed on a part of the electrode layer and has a thickness of 5 to 50 μm. A process for producing the element-mounting substrate includes the steps of forming an electrode precursor layer in the shape of a pattern of an electrode layer on a ceramic plate or a green sheet of a large diameter, forming a ceramic coating precursor layer on a part of the electrode precursor layer and then firing the resulting precursor. In this process, it is preferable to form the ceramic coating layer so as to cover the electrode layer on a predetermined cutting line of the firing product. According to the element-mounting substrate in which a part of the electrode layer is covered with a ceramic, a failure in mounting an element attributable to the thickness of the ceramic coating layer can be prevented when the element is mounted. In addition, peeling or cracking of the electrode layer caused by impact during dicing can be prevented.

Abstract translation: 元件安装衬底包括陶瓷衬底，形成在衬底上的电极层和形成在电极层的一部分上并具有5至50μm厚度的陶瓷涂层。 一种用于制造元件安装基板的方法包括以下步骤：在陶瓷板或大直径的生片上形成电极层图案形状的电极前体层，在部件上形成陶瓷涂层前体层 的电极前体层，然后烧结所得的前体。 在该方法中，优选形成陶瓷被覆层，以覆盖烧制品的规定切断线上的电极层。 根据其中电极层的一部分被陶瓷覆盖的元件安装基板，当安装元件时，可以防止由于陶瓷涂层的厚度而导致的元件的安装失败。 此外，可以防止由切割期间的冲击引起的电极层的剥离或破裂。

公开(公告)号：US07287323B1

公开(公告)日：2007-10-30

申请号：US10837015

申请日：2004-04-30

Applicant: Michael Richard Ehlert ,  William Jeffrey Schaefer

Inventor： Michael Richard Ehlert ,  William Jeffrey Schaefer

IPC: H01R12/36 ,  H05K1/11 ,  H05K3/40

CPC classification number: H01L23/49827 ,  H01L23/49816 ,  H01L23/49822 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/10126 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K1/113 ,  H05K3/248 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4061 ,  H05K2201/017 ,  H05K2201/035 ,  H05K2201/09909 ,  Y10T29/49149 ,  Y10T29/49165 ,  H01L2924/00012 ,  H01L2224/05552

Abstract: A ceramic circuit structure comprising a plurality of ceramic layers and at least one electronic component embedded within the plurality of ceramic layers. Within a first one of the ceramic layers is a via that passes through the ceramic layer. A contact pad is formed on a surface of the ceramic layer. A barrier cap is formed between the via and the contact pad. A dielectric ring covers a peripheral portion of the contact pad and an adjacent portion of the dielectric material layer surface immediately surrounding the contact pad, such that any solder that is applied to the contact does not contact the peripheral portion of the contact pad or the ceramic material.

Abstract translation: 一种陶瓷电路结构，包括多个陶瓷层和至少一个嵌入在所述多个陶瓷层内的电子部件。 在第一陶瓷层之中的是通过陶瓷层的通孔。 在陶瓷层的表面上形成接触垫。 在通孔和接触垫之间形成阻挡帽。 介电环覆盖接触焊盘的周边部分和电介质材料层表面的相邻部分，其紧邻围绕接触焊盘，使得施加到接触件的任何焊料不接触接触焊盘或陶瓷的周边部分 材料。

公开(公告)号：US20060097246A1

公开(公告)日：2006-05-11

申请号：US10971829

申请日：2004-10-21

Applicant: Cengiz Palanduz ,  Yongki Min

Inventor： Cengiz Palanduz ,  Yongki Min

IPC: H01L29/08 ,  H05K3/10

CPC classification number: H01G4/12 ,  H01L2224/16225 ,  H05K1/0313 ,  H05K1/092 ,  H05K1/162 ,  H05K2201/017 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2203/1131 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49155

Abstract: A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material; and sintering the ceramic material. A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material so that the ceramic material is disposed between the first conductive material and the second conductive material; thermal processing at a temperature sufficient to sinter the ceramic material and form a film of the second conductive material; and coating an exposed surface of at least one of the first conduct material and the second conductive material with a different conductive material. An apparatus including first and second electrodes; and a ceramic material between the first electrode and the second electrode, wherein the ceramic material is sintered directly on one of the first and second electrode.

Abstract translation: 一种包括在第一导电材料的片材上直接形成陶瓷材料的方法; 在所述陶瓷材料上形成第二导电材料; 并烧结陶瓷材料。 一种包括在第一导电材料的片材上直接形成陶瓷材料的方法; 在所述陶瓷材料上形成第二导电材料，使得所述陶瓷材料设置在所述第一导电材料和所述第二导电材料之间; 在足以烧结陶瓷材料并形成第二导电材料的膜的温度下进行热处理; 以及用不同的导电材料涂覆第一导电材料和第二导电材料中的至少一个的暴露表面。 一种包括第一和第二电极的装置; 以及在第一电极和第二电极之间的陶瓷材料，其中陶瓷材料直接烧结在第一和第二电极之一上。

公开(公告)号：US07009114B2

公开(公告)日：2006-03-07

申请号：US09789454

申请日：2001-02-21

Applicant: Jun Urakawa ,  Mitsuyoshi Nishide ,  Isao Kato ,  Norio Yoshida ,  Tomonori Ito

Inventor： Jun Urakawa ,  Mitsuyoshi Nishide ,  Isao Kato ,  Norio Yoshida ,  Tomonori Ito

IPC: H05K1/00

CPC classification number: H01L24/16 ,  H01L23/49838 ,  H01L24/81 ,  H01L2224/10165 ,  H01L2224/10175 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/81136 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/01094 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H05K1/0306 ,  H05K3/3452 ,  H05K3/4629 ,  H05K2201/017 ,  H05K2201/09909 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A ceramic multi-layer wiring substrate includes a line-shaped insulation pattern arranged to extend over a plurality of surface wiring patterns and to intersect the respective surface wiring patterns, in which soldering land electrodes are defined by the insulation patterns.

公开(公告)号：US20050207094A1

公开(公告)日：2005-09-22

申请号：US10801257

申请日：2004-03-16

Applicant: William Borland ,  Alton Jones ,  Olga Renovales

Inventor： William Borland ,  Alton Jones ,  Olga Renovales

IPC: C04B35/46 ,  C04B35/468 ,  H01G4/008 ,  H01G4/12 ,  H01G4/33 ,  H01G4/35 ,  H05K1/16

CPC classification number: C04B35/468 ,  C04B2235/445 ,  C04B2235/6562 ,  H01G4/008 ,  H01G4/1227 ,  H01G4/33 ,  H05K1/162 ,  H05K3/1291 ,  H05K2201/017 ,  H05K2201/0355 ,  H05K2201/09763 ,  H05K2203/1126

Abstract: Dielectric powder and thick-film paste compositions are formed having high dielectric constants, low loss tangents, and other desirable electrical and physical properties. Conductive powder and paste compositions are formed having desirable electrical and physical properties. The dielectric powder and thick-film paste compositions can be used in combination with the conductive powder and paste compositions to form capacitors and other fired-on-foil passive circuit components.

Abstract translation: 形成介电粉末和厚膜糊组合物，其具有高介电常数，低损耗切线和其它所需的电学和物理性能。 形成具有所需电学和物理性质的导电粉末和糊剂组合物。 电介质粉末和厚膜糊剂组合物可以与导电粉末和糊剂组合物组合使用，以形成电容器和其它无卤电路元件。

公开(公告)号：US06531663B1

公开(公告)日：2003-03-11

申请号：US09016504

申请日：1998-01-30

Applicant: John Karl Isenberg ,  Carl William Berlin ,  Jay Robert Myers ,  William Paul Ferraro

Inventor： John Karl Isenberg ,  Carl William Berlin ,  Jay Robert Myers ,  William Paul Ferraro

IPC: H05K116

CPC classification number: H05K3/3452 ,  H05K2201/017

Abstract: An electrical connection for a surface-mount circuit device, and a method for forming the electrical connection. The electrical connection includes a solder stop that promotes the accurate location of a solder joint that electrically connects the surface-mount device to the conductor. In accordance with the invention, the solder stop also promotes stress relief of the electrical connection during thermal cycling, such that thermal cycle fatigue cracking occurs in the solder stop instead of the conductor and solder joint. As a result, thermal stresses are absorbed and dissipated by the solder stop, and do not adversely affect the continuity and mechanical integrity of the electrical connection. The solder stop preferably has a composition that contains an inorganic particulate filler in a glass matrix, the latter being present in an amount that forms a weak bond between the inorganic particles and between the solder stop and conductor.

Abstract translation: 用于表面贴装电路器件的电连接以及用于形成电连接的方法。 电气连接包括一个焊接止动器，其促进将表面安装器件电连接到导体的焊点的精确位置。 根据本发明，焊料停止还可以在热循环期间促进电连接的应力消除，使得在焊料停止中发生热循环疲劳裂纹而不是导体和焊接点。 因此，热应力被焊料停止吸收和消散，并且不会不利地影响电连接的连续性和机械完整性。 阻焊剂优选具有在玻璃基质中含有无机颗粒填料的组合物，后者存在的量在无机颗粒之间和焊料停止层与导体之间形成弱键。

公开(公告)号：US06437669B1

公开(公告)日：2002-08-20

申请号：US09675639

申请日：2000-09-29

Applicant: Robert B. Welstand ,  Timothy L. Leclair

Inventor： Robert B. Welstand ,  Timothy L. Leclair

IPC: H01P308

CPC classification number: H01L24/16 ,  H01L23/66 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0237 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/017 ,  H05K2201/09909 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/05599

Abstract: An interface have been provided to permit the formation of solder connections between substrates suitable for microwave to millimeter wave frequencies. Specifically, signal traces on the substrate are selectively masked to form solder dams. The high temperature, thick-film solder dams define the bonding area and control the flow of solder. Since the solder dam forms a finite-extent structure, the solder mask minimally overlies the signal trace, and signal propagation through the trace is not degraded.

Abstract translation: 已经提供了一种接口，以允许在适合于微波到毫米波频率的衬底之间形成焊料连接。 具体地说，衬底上的信号迹线被选择性地屏蔽以形成焊料坝。 高温，厚膜焊接坝定义了焊接区域并控制了焊料的流动。 由于焊料坝形成有限范围的结构，所以焊接掩模最小地覆盖在信号迹线上，并且通过迹线的信号传播不会降低。

公开(公告)号：US06174462B1

公开(公告)日：2001-01-16

申请号：US09233153

申请日：1999-01-19

Applicant: Kengo Oka ,  Takashi Nagasaka ,  Yuji Ootani ,  Kazumasa Naito ,  Masayuki Miyairi

Inventor： Kengo Oka ,  Takashi Nagasaka ,  Yuji Ootani ,  Kazumasa Naito ,  Masayuki Miyairi

IPC: H01B102

CPC classification number: H05K3/28 ,  C03C8/02 ,  C03C8/10 ,  C03C8/24 ,  H01L23/49883 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/092 ,  H05K2201/017 ,  H05K2201/0769 ,  H01L2924/00

Abstract: A circuit board comprises wiring parts containing silver on a substrate, and a conductivity suppressing agent such as a potassium compound provided between the wiring parts, for preventing the silver attached on the substrate between the wiring parts from being conductive. Therefore, the insulation deterioration between the wiring parts can be suitably suppressed, which usually occurs when a voltage is applied between the wiring parts containing silver on the substrate under a high temperature atmosphere, irrespective of the presence or absence of water or water vapor. That is, the high temperature leakage phenomenon can be suitably suppressed.

Abstract translation: 电路板包括在基板上含有银的布线部分和设置在布线部分之间的诸如钾化合物的导电性抑制剂，以防止在布线部分之间附着在基板上的银导电。 因此，无论存在或不存在水或水蒸气，都可以适当地抑制布线部分之间的绝缘劣化，这通常在高温气氛下在基板上包含银的布线部分之间施加电压时发生。 也就是说，可以适当地抑制高温泄漏现象。