公开(公告)号：US20100095523A1

公开(公告)日：2010-04-22

申请号：US12640076

申请日：2009-12-17

Applicant: Ayao NIKI

Inventor： Ayao NIKI

IPC: H05K3/10

CPC classification number: H05K1/115 ,  H05K3/421 ,  H05K3/4644 ,  H05K2201/0352 ,  H05K2201/0394 ,  H05K2201/09527 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2203/0554 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49162

Abstract: A multilayer printed wiring board includes one or more resin layers having via-holes and a core layer having via-holes. The via-holes formed in the one or more resin layers are open in the direction opposite to the direction in which the via-holes formed in the core layer are open. A method for manufacturing a multilayer printed wiring board includes a step of preparing a single- or double-sided copper-clad laminate; a step of forming lands by processing the copper-clad laminate; a step of forming a resin layer on the upper surface of the copper-clad laminate, forming openings for via-holes in the resin layer, and then forming the via-holes; and a step of forming openings for via-holes in the lower surface of the copper-clad laminate and then forming the via-holes.

Abstract translation: 多层印刷线路板包括一个或多个具有通孔的树脂层和具有通孔的芯层。 在一个或多个树脂层中形成的通孔在与芯层中形成的通路孔打开的方向相反的方向上开口。 一种制造多层印刷线路板的方法包括制备单面或双面覆铜层压板的步骤; 通过加工覆铜层压板来形成焊盘的步骤; 在覆铜层压板的上表面上形成树脂层的步骤，在树脂层中形成通孔的开口，然后形成通孔; 以及在覆铜层压板的下表面中形成用于通孔的开口，然后形成通孔的步骤。

公开(公告)号：US07612295B2

公开(公告)日：2009-11-03

申请号：US11420421

申请日：2006-05-25

Applicant: Masaru Takada ,  Hisashi Minoura ,  Kiyotaka Tsukada ,  Hiroyuki Kobayashi ,  Mitsuhiro Kondo

Inventor： Masaru Takada ,  Hisashi Minoura ,  Kiyotaka Tsukada ,  Hiroyuki Kobayashi ,  Mitsuhiro Kondo

IPC: H05K1/16

CPC classification number: H01L24/49 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/351 ,  H05K1/021 ,  H05K1/113 ,  H05K1/114 ,  H05K3/0035 ,  H05K3/28 ,  H05K3/3457 ,  H05K3/385 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2203/0315 ,  H05K2203/0554 ,  H05K2203/1581 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: In a printed wiring board, an odd number (n) of conductive layers (11-13) and insulating layers (21-23) are alternately laminated upon another. The first conductive layer (11) is constituted as a parts connecting layer and the n-th conductive layer (13) is constituted as an external connecting layer which is connected to external connecting terminals (7). The second to (n−1)-th conductive layers (12) are constituted as current transmitting layers for transmitting internal currents. The surface of the n-th conductive layer (13) is coated with the outermost n-th insulating layer (23) in a state where the external connecting terminals (7) are exposed on the surface. It is preferable to constitute the initial insulating layers of a glass-cloth reinforced prepreg and the external insulating layers of a resin.

Abstract translation: 在印刷布线板中，奇数（n）个导电层（11-13）和绝缘层（21-23）交替层叠在另一个上。 第一导电层（11）构成为部分连接层，第n导电层（13）构成为连接到外部连接端子（7）的外部连接层。 第（n-1）个第二导电层（12）构成用于传输内部电流的电流传输层。 第n导电层（13）的表面在外部连接端子（7）暴露在表面上的状态下涂覆有最外层的第n绝缘层（23）。 优选构成玻璃布预浸料坯的初始绝缘层和树脂的外部绝缘层。

公开(公告)号：US20090174081A1

公开(公告)日：2009-07-09

申请号：US12174212

申请日：2008-07-16

Applicant: Toru FURUTA

Inventor： Toru FURUTA

IPC: H01L23/52

CPC classification number: H05K1/186 ,  H01L23/49838 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3511 ,  H05K1/113 ,  H05K3/4614 ,  H05K3/462 ,  H05K2201/0394 ,  H05K2201/09527 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A combination substrate includes a first substrate having multiple wiring board mounting pads for installing a printed wiring board and multiple connection pads on the opposite side of the wiring board mounting pads, a second substrate having multiple package substrate mounting pads for loading one or more package substrates and multiple connection pads on the opposite side of the package substrate mounting pads, a resin component filling a space between the first substrate and the second substrate, and multiple component loading pads positioned to load an electronic component between the first substrate and the second substrate and formed on one of the first substrate and the second substrate. The connection pads of the second substrate are electrically connected to the connection pads of the first substrate.

Abstract translation: 组合基板包括具有用于安装印刷线路板的多个布线板安装焊盘和在布线板安装焊盘的相对侧上的多个连接焊盘的第一基板，具有用于装载一个或多个封装基板的多个封装基板安装焊盘的第二基板 以及在所述封装衬底安装衬垫的相对侧上的多个连接焊盘，填充所述第一衬底和所述第二衬底之间的空间的树脂部件以及被定位成在所述第一衬底和所述第二衬底之间加载电子部件的多个部件装载垫，以及 形成在第一基板和第二基板中的一个上。 第二基板的连接焊盘电连接到第一基板的连接焊盘。

公开(公告)号：US20090115444A1

公开(公告)日：2009-05-07

申请号：US12093232

申请日：2006-11-08

Applicant: Yasuhiro Okuda ,  Akihisa Hosoe ,  Taro Fujita

Inventor： Yasuhiro Okuda ,  Akihisa Hosoe ,  Taro Fujita

IPC: G01R31/26 ,  H01R11/01 ,  H01R43/00

CPC classification number: H01R13/03 ,  H01R4/04 ,  H01R11/01 ,  H01R43/0235 ,  H01R43/0249 ,  H01R43/0256 ,  H05K3/0035 ,  H05K3/326 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2203/0156 ,  Y10T29/49204

Abstract: Provided is an anisotropic conductive sheet (8) having heat resistance and cold resistance and suitable for connection of electrodes. The anisotropic conductive sheet of the present invention has conductivity in the thickness direction, wherein the base film (1), which is a film made of synthetic resin having an electrical insulation property, has a plurality of holes (3) formed in the thickness direction, and the holes (3) are open to one main surface of the base film and closed to the other main surface, wherein a metal is adhered to the closed parts (2a) and the inner walls (2b) of the holes (3) so that by contacting electrodes (7) with the closed parts (2a) respectively from the outside, the electrodes (7) can electrically be connected through the adhered metal to the main surface where the holes (3) are open.

Abstract translation: 提供具有耐热性和耐寒性并适合于连接电极的各向异性导电片（8）。 本发明的各向异性导电片在厚度方向上具有导电性，其中，作为由具有电绝缘性的合成树脂制成的膜的基膜（1）具有沿厚度方向形成的多个孔（3） 并且孔（3）对基膜的一个主表面开放并且与另一个主表面闭合，其中金属粘附到孔（3）的封闭部分（2a）和内壁（2b） 使得通过从外部分别将电极（7）与闭合部分（2a）接触，电极（7）可以通过粘附的金属电连接到孔（3）打开的主表面。

公开(公告)号：US20090115056A1

公开(公告)日：2009-05-07

申请号：US12263174

申请日：2008-10-31

Applicant: Kouichi Saitou ,  Mayumi Nakasato ,  Ryosuke Usui

Inventor： Kouichi Saitou ,  Mayumi Nakasato ,  Ryosuke Usui

IPC: H01L23/492

CPC classification number: H01L23/49811 ,  H01L23/145 ,  H01L23/3733 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H05K1/0366 ,  H05K1/112 ,  H05K3/0041 ,  H05K3/3436 ,  H05K3/3457 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2203/1152 ,  H01L2224/05599

Abstract: A device mounting board includes an insulating layer formed of an insulating resin, a glass cloth covering the surface of the insulating layer, and an electrode provided in a through hole extending through the glass cloth. The angle of contact with solder of the glass cloth is larger than that of the resin. Thus, solder bumps are formed on the electrode of the device mounting board 10 with high precision.

Abstract translation: 装置安装板包括由绝缘树脂形成的绝缘层，覆盖绝缘层表面的玻璃布和设置在穿过玻璃布的通孔中的电极。 玻璃布与焊料的接触角大于树脂的接触角。 因此，高精度地在器件安装板10的电极上形成焊料凸块。

公开(公告)号：US20090051051A1

公开(公告)日：2009-02-26

申请号：US12032444

申请日：2008-02-15

Applicant: Junji TANAKA

Inventor： Junji TANAKA

IPC: H01L23/12 ,  H01L21/00 ,  H01L23/31

CPC classification number: H01L23/5389 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/113 ,  H05K1/187 ,  H05K3/20 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2203/049 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device includes a first insulator film having a first opening, a first wiring layer extending from the first opening onto the first insulator film, a first semiconductor chip mounted on the first insulator film so as to be electrically coupled with the first wiring layer, and a resin portion applied on the first insulation film to cover the first semiconductor chip.

Abstract translation: 半导体器件包括具有第一开口的第一绝缘膜，从第一开口延伸到第一绝缘膜上的第一布线层，安装在第一绝缘膜上以与第一布线层电耦合的第一半导体芯片， 以及施加在第一绝缘膜上以覆盖第一半导体芯片的树脂部分。

公开(公告)号：US20080223610A1

公开(公告)日：2008-09-18

申请号：US12116679

申请日：2008-05-07

Applicant: Jae Min Choi ,  Young Hwan Shin

Inventor： Jae Min Choi ,  Young Hwan Shin

IPC: H01R12/04

CPC classification number: H01L23/49827 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/19043 ,  H05K1/113 ,  H05K3/4614 ,  H05K3/4623 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/10378 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Disclosed is a ball grid array (BGA) package substrate, in which a wire bonding pad and a solder ball pad are formed on a via hole, making high freedom in design of a circuit pattern and a high density circuit pattern possible, and a method of fabricating the same.

Abstract translation: 公开了一种球栅阵列（BGA）封装基板，其中引线接合焊盘和焊球焊盘形成在通孔上，使电路图案的设计和高密度电路图案具有高自由度，以及方法 的制造。

公开(公告)号：US20080079164A1

公开(公告)日：2008-04-03

申请号：US11865750

申请日：2007-10-02

Applicant: Yoichiro KURITA ,  Koji Soejima ,  Masaya Kawano

Inventor： Yoichiro KURITA ,  Koji Soejima ,  Masaya Kawano

IPC: H01L23/52 ,  H01L21/4763

CPC classification number: H01L23/3128 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/3135 ,  H01L23/5389 ,  H01L25/0652 ,  H01L25/18 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K3/0058 ,  H05K3/284 ,  H05K3/4682 ,  H05K2201/0195 ,  H05K2201/09527 ,  H05K2201/096 ,  H05K2201/09972 ,  H05K2203/016 ,  H05K2203/0733 ,  H05K2203/1469 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: The electronic device includes a first interconnect layer and a second interconnect layer. The second interconnect layer is provided on the lower surface of the first interconnect layer. The first interconnect layer includes a via plug (first conductive plug). An end face of the via plug on the side of the second interconnect layer is smaller in area than the opposite end face. The via plug is exposed on the surface of the first interconnect layer facing the second interconnect layer. An insulating resin forming the first interconnect layer is higher in thermal decomposition temperature than an insulating resin forming the second interconnect layer.

Abstract translation: 电子设备包括第一互连层和第二互连层。 第二互连层设置在第一互连层的下表面上。 第一互连层包括通孔插头（第一导电插头）。 通孔塞在第二互连层一侧的端面的面积小于相对端面。 通孔插头暴露在面向第二互连层的第一互连层的表面上。 形成第一互连层的绝缘树脂的热分解温度高于形成第二互连层的绝缘树脂。

公开(公告)号：US20080079157A1

公开(公告)日：2008-04-03

申请号：US11856730

申请日：2007-09-18

Applicant: Yoichiro Kurita ,  Koji Soejima ,  Masaya Kawano

Inventor： Yoichiro Kurita ,  Koji Soejima ,  Masaya Kawano

IPC: H01L23/48 ,  H01L21/56

CPC classification number: H01L23/3128 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/3135 ,  H01L23/5389 ,  H01L25/0652 ,  H01L25/18 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K3/0058 ,  H05K3/284 ,  H05K3/4682 ,  H05K2201/0195 ,  H05K2201/09527 ,  H05K2201/09972 ,  H05K2203/016 ,  H05K2203/1469 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: The electronic device includes a first interconnect layer and a second interconnect layer. The second interconnect layer is provided on the lower surface of the first interconnect layer. The first interconnect layer includes a via plug (first conductive plug). An end face of the via plug on the side of the second interconnect layer is smaller in area than the opposite end face. The via plug is exposed on the surface of the first interconnect layer facing the second interconnect layer. An insulating resin forming the first interconnect layer is higher in thermal decomposition temperature than an insulating resin forming the second interconnect layer.

公开(公告)号：US20060202344A1

公开(公告)日：2006-09-14

申请号：US11420421

申请日：2006-05-25

Applicant: Masaru Takada ,  Hisashi Minoura ,  Kiyotaka Tsukada ,  Hiroyuki Kobayashi ,  Mitsuhiro Kondo

Inventor： Masaru Takada ,  Hisashi Minoura ,  Kiyotaka Tsukada ,  Hiroyuki Kobayashi ,  Mitsuhiro Kondo

IPC: H01L23/52

CPC classification number: H01L24/49 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/351 ,  H05K1/021 ,  H05K1/113 ,  H05K1/114 ,  H05K3/0035 ,  H05K3/28 ,  H05K3/3457 ,  H05K3/385 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2203/0315 ,  H05K2203/0554 ,  H05K2203/1581 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: In a printed wiring board, an odd number (n) of conductive layers (11-13) and insulating layers (21-23) are alternately laminated upon another. The first conductive layer (11) is constituted as a parts connecting layer and the n-th conductive layer (13) is constituted as an external connecting layer which is connected to external connecting terminals (7). The second to (n−1)-th conductive layers (12) are constituted as current transmitting layers for transmitting internal currents. The surface of the n-th conductive layer (13) is coated with the outermost n-th insulating layer (23) in a state where the external connecting terminals (7) are exposed on the surface. It is preferable to constitute the initial insulating layers of a glass-cloth reinforced prepreg and the external insulating layers of a resin.

Abstract translation: 在印刷布线板中，奇数（n）个导电层（11-13）和绝缘层（21-23）交替层叠在另一个上。 第一导电层（11）构成为部分连接层，第n导电层（13）构成为连接到外部连接端子（7）的外部连接层。 第（n-1）个导电层（12）构成为用于传输内部电流的电流传输层。 第n导电层（13）的表面在外部连接端子（7）暴露在表面上的状态下涂覆有最外层的第n绝缘层（23）。 优选构成玻璃布预浸料坯的初始绝缘层和树脂的外部绝缘层。