公开(公告)号：US07986037B2

公开(公告)日：2011-07-26

申请号：US12068606

申请日：2008-02-08

Applicant: Yutaka Uematsu ,  Tatsuya Saito ,  Hideki Osaka ,  Yoji Nishio ,  Shunichi Saito

Inventor： Yutaka Uematsu ,  Tatsuya Saito ,  Hideki Osaka ,  Yoji Nishio ,  Shunichi Saito

IPC: H01L23/52

CPC classification number: H05K1/0231 ,  H01L23/50 ,  H01L23/5385 ,  H01L23/66 ,  H01L2224/16225 ,  H01L2924/12044 ,  H01L2924/3011 ,  H05K1/09 ,  H05K1/111 ,  H05K1/167 ,  H05K2201/0352 ,  H05K2201/0391 ,  H05K2201/09236 ,  H05K2201/09309 ,  H05K2201/09481 ,  H05K2201/09781 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00

Abstract: As a power feed route in a semiconductor chip, a power feed route which reduces antiresonance impedance in the frequency range of tens of MHz is to be realized thereby to suppress power noise in a semiconductor device. By inserting structures which raise the resistance in the medium frequency band into parts where the resistance is intrinsically high, such as power wiring in a semiconductor package and capacitor interconnecting electrode parts, the antiresonance impedance in the medium frequency band can be effectively reduced while keeping the impedance low at the low frequency.

Abstract translation: 作为半导体芯片中的馈电路径，可以实现降低数十MHz频率范围内的反谐振阻抗的馈电路径，从而抑制半导体器件的功率噪声。 通过插入将中频带中的电阻提升到电阻本身较高的部分的结构，例如半导体封装中的功率布线和电容器互连电极部件，可以有效地减少中频带中的反谐振阻抗，同时保持 阻抗低在低频。

公开(公告)号：US20110175800A1

公开(公告)日：2011-07-21

申请号：US13057189

申请日：2009-05-27

Applicant: Hidetaka Mizumaki

Inventor： Hidetaka Mizumaki

IPC: G09G3/36 ,  G01R31/26

CPC classification number: G09G3/006 ,  G01R31/2812 ,  G02F2001/136254 ,  G09G3/3666 ,  G09G2300/0408 ,  G09G2300/0417 ,  G09G2330/12 ,  H05K1/0268 ,  H05K3/361 ,  H05K2201/09781

Abstract: An FPC (2) includes: wiring lines (8a) and (8b) which extend toward a display panel (1); and terminals (T1) and (T2) which are connected to the wiring lines (8a) and (8b), respectively. The display panel (1) includes a short-circuit wiring line (5) for short-circuiting the wiring lines (8a) and (8b). The EPC (2) and the display panel (1) are connected to each other so that the wiring lines (8a) and (8b) are short-circuited via the short-circuit wiring line (5) in a connection part between the FPC (2) and the display panel (1). A liquid crystal display device (30) includes a signal application circuit (31) for applying a signal to the terminal (T1) and a monitoring circuit (32) for comparing the signal applied to the terminal (T1) with a signal outputted from the terminal (T2). This provides a method of testing a liquid crystal display device and a liquid crystal display device each of which can check a connection condition between a display panel and a wiring board, such as a flexible circuit board (such as a COF and an FPC), not only while the liquid crystal display device is manufactured but also while the liquid crystal display device is in use.

Abstract translation: FPC（2）包括：向显示面板（1）延伸的布线（8a）和（8b）; 和连接到布线（8a）和（8b）的端子（T1）和（T2）。 显示面板（1）包括用于短路布线（8a）和（8b）的短路布线（5）。 EPC（2）和显示面板（1）彼此连接，使得布线（8a）和（8b）经由短路布线（5）在FPC之间的连接部分中短路 （2）和显示面板（1）。 液晶显示装置（30）包括用于向终端（T1）施加信号的信号施加电路（31）和用于将施加到端子（T1）的信号与从端子（T1）输出的信号进行比较的监视电路（32） 端子（T2）。 这提供了一种测试液晶显示装置和液晶显示装置的方法，每个液晶显示装置可以检查诸如柔性电路板（例如COF和FPC）的显示面板和布线板之间的连接状态， 不仅在制造液晶显示装置的同时，而且在使用液晶显示装置的同时，

公开(公告)号：US07982395B2

公开(公告)日：2011-07-19

申请号：US12468651

申请日：2009-05-19

Applicant: Ae-Kyung Kwon ,  Se-Ho Kim

Inventor： Ae-Kyung Kwon ,  Se-Ho Kim

IPC: H05B33/00 ,  H01J1/54

CPC classification number: H05K3/361 ,  H01L27/3276 ,  H05K1/0268 ,  H05K3/323 ,  H05K2201/09781

Abstract: An organic light emitting display device includes a display panel provided with a pad region having a plurality of pads. A flexible circuit board having lead terminals is coupled into the pad region. The pad region includes a plurality of first pads electrically coupled to the flexible circuit board through the lead terminals and a plurality of second pads electrically isolated from the flexible circuit board.

Abstract translation: 有机发光显示装置包括具有多个焊盘的焊盘区域的显示面板。 具有引线端子的柔性电路板耦合到焊盘区域中。 焊盘区域包括通过引线端子电耦合到柔性电路板的多个第一焊盘和与柔性电路板电隔离的多个第二焊盘。

公开(公告)号：US07981728B2

公开(公告)日：2011-07-19

申请号：US12382293

申请日：2009-03-12

Applicant: Soon-Jin Cho

Inventor： Soon-Jin Cho

IPC: H01L21/00

CPC classification number: H05K3/4007 ,  H01L2224/16225 ,  H05K1/0206 ,  H05K3/06 ,  H05K3/4644 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2203/1536 ,  Y10T29/49124 ,  Y10T29/49147 ,  Y10T29/49165

Abstract: A coreless substrate having a plurality of function pads, etched from a metal sheet and having a protruded shape; an insulating layer, the insulating layer being formed on one side of the function pads, a circuit corresponding to a pattern being formed on the insulating layer, a via hole being formed on the insulating layer to electrically connect the function pads and the circuit; and a solder resist, being formed on the insulating layer to protect the surface of the insulating layer. The coreless substrate has a signal delivery characteristic that is improved by eliminating the inner via hole.

Abstract translation: 一种无芯基板，具有从金属板蚀刻并具有突出形状的多个功能垫; 绝缘层，所述绝缘层形成在所述功能焊盘的一侧上，对应于在所述绝缘层上形成的图案的电路，形成在所述绝缘层上以电连接所述功能焊盘和所述电路的通孔; 和阻焊层，形成在绝缘层上以保护绝缘层的表面。 无芯基板具有通过消除内通孔而改善的信号传递特性。

公开(公告)号：US20110169148A1

公开(公告)日：2011-07-14

申请号：US13069520

申请日：2011-03-23

Applicant: Dong-Han Kim

Inventor： Dong-Han Kim

IPC: H01L23/495

CPC classification number: H01L23/4985 ,  H01L23/552 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01079 ,  H05K1/0216 ,  H05K1/111 ,  H05K1/189 ,  H05K2201/09254 ,  H05K2201/09781 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A tape wiring substrate may have dispersion wiring patterns. The dispersion wiring patterns may be provided between input/output wiring pattern groups to compensate for the intervals therebetween. Connecting wiring patterns may be configured to connect the dispersion wiring patterns to a first end of the adjacent input/output wiring pattern.

Abstract translation: 带状布线基板可以具有分散布线图案。 可以在输入/输出布线图案组之间设置色散布线图案，以补偿它们之间的间隔。 连接布线图案可以被配置为将色散布线图案连接到相邻输入/输出布线图案的第一端。

公开(公告)号：US07977578B2

公开(公告)日：2011-07-12

申请号：US12458936

申请日：2009-07-28

Applicant: Na-Rae Shin ,  Dong-Han Kim

Inventor： Na-Rae Shin ,  Dong-Han Kim

IPC: H05K1/00

CPC classification number: H05K1/0271 ,  H01L23/49838 ,  H01L23/4985 ,  H01L2924/0002 ,  H05K1/0393 ,  H05K1/118 ,  H05K2201/0969 ,  H05K2201/09727 ,  H05K2201/09781 ,  H01L2924/00

Abstract: A TAB tape for a tape carrier package may have at least one opening formed in a connection portion. The at least one opening may be provided in the connection portion and a portion of the corresponding second lead. The at least one opening may be arranged near a boundary between the corresponding first lead and the connection portion. The at least one opening may be sized to reduce the change of the lead width from the first lead to the second lead.

Abstract translation: 用于带载包装的TAB带可以具有形成在连接部分中的至少一个开口。 所述至少一个开口可以设置在连接部分和对应的第二引线的一部分中。 至少一个开口可以布置在相应的第一引线和连接部分之间的边界附近。 所述至少一个开口的尺寸可被设计成减小引线宽度从第一引线到第二引线的变化。

公开(公告)号：US20110139490A1

公开(公告)日：2011-06-16

申请号：US12929901

申请日：2011-02-23

Applicant: Toshiki Naito ,  Tetsuya Ohsawa ,  Kouji Kataoka

Inventor： Toshiki Naito ,  Tetsuya Ohsawa ,  Kouji Kataoka

IPC: H05K1/00

CPC classification number: H05K1/0269 ,  H05K1/056 ,  H05K3/0052 ,  H05K3/225 ,  H05K2201/0909 ,  H05K2201/09127 ,  H05K2201/0969 ,  H05K2201/09781 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/53022 ,  Y10T29/53026 ,  Y10T29/5303 ,  Y10T29/53035 ,  Y10T29/53039 ,  Y10T29/53043

Abstract: A wired circuit board assembly sheet has a plurality of wired circuit boards, distinguishing marks for distinguishing defectiveness of the wired circuit boards, and a supporting sheet for supporting the plurality of wired circuit boards and the distinguishing marks. Each of the distinguishing marks has an indication portion for indicating a specified one of the wired circuit boards.

Abstract translation: 布线电路板组装片具有多个布线电路板，用于区分布线电路板的缺陷的区别标记和用于支撑多个布线电路板和区别标记的支撑片。 每个识别标记具有用于指示指定的一个有线电路板的指示部分。

公开(公告)号：US07948355B2

公开(公告)日：2011-05-24

申请号：US11852244

申请日：2007-09-07

Applicant: Chang-Lin Wei ,  Chang-Sheng Chen ,  Cheng-Hua Tsai ,  Syun Yu ,  Chin-Sun Shyu

Inventor： Chang-Lin Wei ,  Chang-Sheng Chen ,  Cheng-Hua Tsai ,  Syun Yu ,  Chin-Sun Shyu

IPC: H01C1/012

CPC classification number: H05K1/167 ,  H05K1/0237 ,  H05K1/0298 ,  H05K2201/09781

Abstract: An embedded resistor device includes a resistor, a ground plane located near a first side of the resistor and electrically coupled to a first end of the resistor, at the ground plane a hole is provided, a first dielectric layer exists between the resistor and the ground plane, a conductive wire, which is electrically coupled to a second end of the resistor different from the first end of the resistor and partially surrounds the resistor, is used as an auxiliary for supporting a resistor-coating process of the resistor and to provide a terminal of the embedded resistor device at the conductive wire, a conductive region located near a second side of the ground plane different from the first side of the resistor, a second dielectric layer exists between the ground plane and the conductive region, and a conductive path to electrically couple the conductive wire to the conductive region through the hole.

Abstract translation: 嵌入式电阻器件包括电阻器，接地平面位于电阻器的第一侧附近并电耦合到电阻器的第一端，在接地平面处设有一个孔，第一电介质层位于电阻器和地之间 平面，电耦合到电阻器的不同于电阻器的第一端并部分地围绕电阻器的第二端的导线被用作支持电阻器的电阻器涂覆工艺的辅助件，并且提供 在导电线处的嵌入式电阻器件的端子，位于接地平面的与电阻器的第一侧不同的第二侧附近的导电区域，在接地平面和导电区域之间存在第二介电层，并且导电路径 以通过该孔将导线电连接到导电区域。

公开(公告)号：US07935893B2

公开(公告)日：2011-05-03

申请号：US12351929

申请日：2009-01-12

Applicant: Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

Inventor： Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

IPC: H05K1/16

CPC classification number: H05K1/185 ,  H01L24/19 ,  H01L24/82 ,  H01L2223/54426 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H05K1/0231 ,  H05K1/188 ,  H05K3/382 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2201/10636 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A printed wiring board is manufactured by a method in which a laminate body having a first insulation layer and a conductive film is provided. An alignment mark is formed in the laminate body by removing at least a portion of the conductive film. An electronic component is placed on an adhesive layer provided on the first insulation layer at a position determined based on the alignment mark. After the electronic component is enclosed inside an opening of the second insulation layer, a via hole exposing a terminal of the electronic component is formed at a position determined based on the alignment mark used to determine the position of the electronic component. A via conductor is formed in the via hole, and a conductive layer is formed on the conductive film and patterned to form a conductive circuit connected to the via conductor.

Abstract translation: 通过提供具有第一绝缘层和导电膜的层叠体的方法制造印刷线路板。 通过去除导电膜的至少一部分，在层压体中形成对准标记。 将电子部件放置在基于对准标记确定的位置上设置在第一绝缘层上的粘合剂层上。 在将电子部件封装在第二绝缘层的开口内之后，在基于用于确定电子部件的位置的对准标记确定的位置处形成暴露电子部件的端子的通孔。 通孔导体形成在通孔中，导电层形成在导电膜上并被图案化以形成连接到通孔导体的导电电路。

公开(公告)号：US20110098899A1

公开(公告)日：2011-04-28

申请号：US12988160

申请日：2009-04-15

Applicant: Matthias Fuchs ,  Marco Junglas ,  Lutz Muders ,  Benedikt Ohlig

Inventor： Matthias Fuchs ,  Marco Junglas ,  Lutz Muders ,  Benedikt Ohlig

IPC: B60T13/74 ,  H02H3/00

CPC classification number: B60T13/746 ,  G01R31/025 ,  G01R31/2818 ,  H05K1/0265 ,  H05K1/0268 ,  H05K2201/09781 ,  H05K2201/10053 ,  H05K2201/10166

Abstract: A protective circuit arranged on a printed circuit board has two conductor loops. At least one supply voltage track, at least one semiconductor switch with at least one terminal and at least one control component with at least one terminal are arranged on the printed circuit board. A first terminal of the control component and a first terminal of the semiconductor switch are connected electrically. A first conductor loop of the protective circuit is arranged on the printed circuit board so that it surrounds an electrically conducting connection between the supply voltage track and the semiconductor switch and/or the control component, and a second conductor loop is arranged on the printed circuit board so that it surrounds the electrically conducting connection between the first terminal of the control component and the first terminal of the semiconductor switch, and thereby screens the same from the semiconductor switch and at least from those regions of the control component that are also connected to the supply voltage track.

Abstract translation: 布置在印刷电路板上的保护电路具有两个导体环。 至少一个电源电压轨道，具有至少一个端子的至少一个半导体开关和至少一个具有至少一个端子的控制部件布置在印刷电路板上。 控制部件的第一端子和半导体开关的第一端子电连接。 保护电路的第一导体环路布置在印刷电路板上，使得其围绕电源电压轨道和半导体开关和/或控制部件之间的导电连接，并且第二导体环路布置在印刷电路 板，使得其围绕控制部件的第一端子和半导体开关的第一端子之间的导电连接，并且因此从半导体开关和至少从控制部件的也连接到 电源电压轨。