公开(公告)号：US20090136656A1

公开(公告)日：2009-05-28

申请号：US12213700

申请日：2008-06-23

Applicant: Dong-Jin Park ,  Seung-Hyun Jung ,  Seung-Chul Kim ,  Soon-Jin Cho

Inventor： Dong-Jin Park ,  Seung-Hyun Jung ,  Seung-Chul Kim ,  Soon-Jin Cho

IPC: H05K3/02

CPC classification number: H05K3/427 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/421 ,  H05K2201/0175 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2203/1152

Abstract: A method of manufacturing a printed circuit board is disclosed. The method may include: stacking an anti-plating layer over a copper foil, for a copper clad laminate that includes the copper foil stacked over one side of an insulation layer; forming an intaglio groove, by removing a portion of the anti-plating layer and a portion of the copper clad laminate; stacking a seed layer over a surface of the intaglio groove; forming a plating layer, by plating an inside of the intaglio groove; and removing the anti-plating layer and the copper foil.

Abstract translation: 公开了一种制造印刷电路板的方法。 该方法可以包括：在铜箔上堆叠防镀层，对于包括层叠在绝缘层的一侧上的铜箔的覆铜层压板; 通过去除所述防镀层的一部分和所述覆铜层压板的一部分来形成凹版凹槽; 将种子层堆叠在凹版凹槽的表面上; 通过电镀凹版凹槽的内部形成镀层; 并且去除防镀层和铜箔。

公开(公告)号：US07981728B2

公开(公告)日：2011-07-19

申请号：US12382293

申请日：2009-03-12

Applicant: Soon-Jin Cho

Inventor： Soon-Jin Cho

IPC: H01L21/00

CPC classification number: H05K3/4007 ,  H01L2224/16225 ,  H05K1/0206 ,  H05K3/06 ,  H05K3/4644 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2203/1536 ,  Y10T29/49124 ,  Y10T29/49147 ,  Y10T29/49165

Abstract: A coreless substrate having a plurality of function pads, etched from a metal sheet and having a protruded shape; an insulating layer, the insulating layer being formed on one side of the function pads, a circuit corresponding to a pattern being formed on the insulating layer, a via hole being formed on the insulating layer to electrically connect the function pads and the circuit; and a solder resist, being formed on the insulating layer to protect the surface of the insulating layer. The coreless substrate has a signal delivery characteristic that is improved by eliminating the inner via hole.

Abstract translation: 一种无芯基板，具有从金属板蚀刻并具有突出形状的多个功能垫; 绝缘层，所述绝缘层形成在所述功能焊盘的一侧上，对应于在所述绝缘层上形成的图案的电路，形成在所述绝缘层上以电连接所述功能焊盘和所述电路的通孔; 和阻焊层，形成在绝缘层上以保护绝缘层的表面。 无芯基板具有通过消除内通孔而改善的信号传递特性。

公开(公告)号：US20090026169A1

公开(公告)日：2009-01-29

申请号：US12010195

申请日：2008-01-22

Applicant: Chung-Woo Cho ,  Soon-Jin Cho ,  Byung-Bae Seo ,  Ki-Young Yoo ,  Seok-Hwan Ahn

Inventor： Chung-Woo Cho ,  Soon-Jin Cho ,  Byung-Bae Seo ,  Ki-Young Yoo ,  Seok-Hwan Ahn

IPC: H01B13/00 ,  B23K26/36

CPC classification number: H05K3/0008 ,  H05K1/0269 ,  H05K3/0035 ,  H05K3/4644 ,  H05K3/4679 ,  H05K2201/0108 ,  H05K2201/09918

Abstract: A printed circuit board manufacturing system and a manufacturing method thereof are disclosed. A method of manufacturing printed circuit board, comprising: providing a substrate that comprises a pad and an insulation layer covering the pad; acquiring an image of the substrate; acquiring location information of the pad by analyzing the image of the substrate; forming a via hole by removing a part of the insulation layer that corresponds the location information of the pad; and forming a via by filling the via hole with a conductive material, provides improved process conformity, even if the substrate has partial or nonlinear deformation, by considering the location information of the pad in the via hole forming. The improved conformity may allow more flexibility to substrate design and more integrity for circuitries on printed circuit board.

Abstract translation: 公开了印刷电路板制造系统及其制造方法。 一种制造印刷电路板的方法，包括：提供包括衬垫和覆盖所述衬垫的绝缘层的衬底; 获取所述基板的图像; 通过分析衬底的图像来获取衬垫的位置信息; 通过去除与衬垫的位置信息相对应的绝缘层的一部分来形成通孔; 并且通过用导电材料填充通孔形成通孔，通过考虑通孔形成中的焊盘的位置信息，即使衬底具有部分或非线性变形也提供了改进的工艺一致性。 改进的一致性可以允许对印刷电路板上的电路板的基板设计和更完整性的更大的灵活性。

公开(公告)号：US20110138616A1

公开(公告)日：2011-06-16

申请号：US12929260

申请日：2011-01-11

Applicant: Chung-Woo Cho ,  Soon-Jin Cho ,  Byung-Bae Seo ,  Ki-Young Yoo ,  Seok-Hwan Ahn

Inventor： Chung-Woo Cho ,  Soon-Jin Cho ,  Byung-Bae Seo ,  Ki-Young Yoo ,  Seok-Hwan Ahn

IPC: H05K3/00

CPC classification number: H05K3/0008 ,  H05K1/0269 ,  H05K3/0035 ,  H05K3/4644 ,  H05K3/4679 ,  H05K2201/0108 ,  H05K2201/09918

Abstract: A printed circuit board manufacturing system that uses a substrate that includes a pad and an insulation layer covering the pad. The system includes an image sensor part acquiring an image of the substrate, a control part generating a control signal to form a via hole, and a laser applying part applying a laser, considering the control signal, to the part of the insulation layer that corresponds to the location information of the pad.

Abstract translation: 一种印刷电路板制造系统，其使用包括衬垫和覆盖该衬垫的绝缘层的衬底。 该系统包括获取基板的图像的图像传感器部分，产生控制信号以形成通孔的控制部分和考虑到控制信号的施加激光的激光施加部分到对应于绝缘层的部分 到垫的位置信息。

公开(公告)号：US20090087950A1

公开(公告)日：2009-04-02

申请号：US12010544

申请日：2008-01-25

Applicant: Soon-Jin Cho ,  Jin-Won Choi ,  Seung-Hyun Cho ,  Chung-Woo Cho ,  Dong-Gyu Lee ,  Seok-Hwan Ahn

Inventor： Soon-Jin Cho ,  Jin-Won Choi ,  Seung-Hyun Cho ,  Chung-Woo Cho ,  Dong-Gyu Lee ,  Seok-Hwan Ahn

IPC: H01L21/58

CPC classification number: H01L24/11 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/00014

Abstract: A wafer packaging method is disclosed.An aspect of the invention is to provide a wafer packaging method comprising; attaching tape onto one side of a carrier, the carrier having a through-hole formed therein; attaching a wafer onto the tape exposed inside the through-hole such that at least one electrode of the wafer is exposed; and performing a packaging process on the carrier such that the wafer is packaged.

Abstract translation: 公开了一种晶片封装方法。 本发明的一个方面是提供一种晶片封装方法，包括： 将带附着到载体的一侧上，所述载体具有形成在其中的通孔; 将晶片附接到暴露在通孔内的带上，使得晶片的至少一个电极露出; 以及在所述载体上执行封装处理以使所述晶片被封装。

公开(公告)号：US20070018335A1

公开(公告)日：2007-01-25

申请号：US11483844

申请日：2006-07-11

Applicant: Seung-Hyun Cho ,  Soon-Jin Cho ,  Jae-Joon Lee ,  Se-Jong Oh

Inventor： Seung-Hyun Cho ,  Soon-Jin Cho ,  Jae-Joon Lee ,  Se-Jong Oh

IPC: H01L23/48

CPC classification number: H01L23/13 ,  H01L23/562 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/1147 ,  H01L2224/16 ,  H01L2924/15162 ,  H01L2924/15311 ,  H01L2924/00014

Abstract: A flip chip BGA board is disclosed, in which each of the corners of the board is removed to minimize warpage of the board due to heat applied during the manufacturing process. Embodiments of the invention allow the production of thin boards by preventing warpage of the board, and may provide a board high in reliability since the risk of the chip being separated from the board is reduced.

Abstract translation: 公开了一种倒装芯片BGA板，其中去除板的每个拐角以最小化由于在制造过程中施加的热而引起的板的翘曲。 本发明的实施例允许通过防止板的翘曲来生产薄板，并且可以提供高可靠性的板，因为芯片与板分离的风险降低。

公开(公告)号：US08535547B2

公开(公告)日：2013-09-17

申请号：US12010195

申请日：2008-01-22

Applicant: Chung-Woo Cho ,  Soon-Jin Cho ,  Byung-Bae Seo ,  Ki-Young Yoo ,  Seok-Hwan Ahn

Inventor： Chung-Woo Cho ,  Soon-Jin Cho ,  Byung-Bae Seo ,  Ki-Young Yoo ,  Seok-Hwan Ahn

IPC: H01B13/00

CPC classification number: H05K3/0008 ,  H05K1/0269 ,  H05K3/0035 ,  H05K3/4644 ,  H05K3/4679 ,  H05K2201/0108 ,  H05K2201/09918

Abstract: A printed circuit board manufacturing system and a manufacturing method thereof are disclosed. A method of manufacturing printed circuit board, comprising: providing a substrate that comprises a pad and an insulation layer covering the pad; acquiring an image of the substrate; acquiring location information of the pad by analyzing the image of the substrate; forming a via hole by removing a part of the insulation layer that corresponds the location information of the pad; and forming a via by filling the via hole with a conductive material, provides improved process conformity, even if the substrate has partial or nonlinear deformation, by considering the location information of the pad in the via hole forming. The improved conformity may allow more flexibility to substrate design and more integrity for circuitries on printed circuit board.

公开(公告)号：US08074352B2

公开(公告)日：2011-12-13

申请号：US12213365

申请日：2008-06-18

Applicant: Dong-Jin Park ,  Seung-Hyun Jung ,  Seung-Chul Kim ,  Soon-Jin Cho

Inventor： Dong-Jin Park ,  Seung-Hyun Jung ,  Seung-Chul Kim ,  Soon-Jin Cho

IPC: H05K3/04 ,  H05K3/06 ,  H05K3/42

CPC classification number: H05K3/107 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/045 ,  H05K3/421 ,  H05K3/427 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2203/0577 ,  H05K2203/0723 ,  H05K2203/1152 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A method of manufacturing a printed circuit board is disclosed. The method may include: sequentially stacking an acid-resistant first cover layer and an alkali-resistant second cover layer over a copper foil, for a copper clad laminate that includes the copper foil stacked over one side of an insulation layer; forming an intaglio groove by removing portions of the second cover layer, the first cover layer, and the copper clad laminate; stacking a seed layer over the intaglio groove and the second cover layer; removing a portion of the seed layer stacked over the second cover layer, by stripping the second cover layer; forming a plating layer, by plating an inside of the intaglio groove; stripping the first cover layer; and removing the copper foil exposed by the stripping of the first cover layer.

Abstract translation: 公开了一种制造印刷电路板的方法。 该方法可以包括：在铜箔上顺序层叠耐酸性第一覆盖层和耐碱性第二覆盖层，对于包含层叠在绝缘层一侧的铜箔的覆铜层压板， 通过去除第二覆盖层，第一覆盖层和覆铜层压板的部分来形成凹版凹槽; 将种子层堆叠在凹版凹槽和第二覆盖层上; 通过剥离所述第二覆盖层去除层叠在所述第二覆盖层上的所述种子层的一部分; 通过电镀凹版凹槽的内部形成镀层; 剥离第一覆盖层; 以及去除通过剥离第一覆盖层而暴露的铜箔。

公开(公告)号：US20100271792A1

公开(公告)日：2010-10-28

申请号：US12612158

申请日：2009-11-04

Applicant: Jin-Won Choi ,  Soon-Jin Cho ,  Hueng-Jae Oh ,  Seung-Wan Kim ,  Seon-Jae Mun

Inventor： Jin-Won Choi ,  Soon-Jin Cho ,  Hueng-Jae Oh ,  Seung-Wan Kim ,  Seon-Jae Mun

IPC: H05K7/02 ,  B23K31/02

CPC classification number: B23K1/0016 ,  B23K2101/42 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05568 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/92125 ,  H01L2924/00014 ,  H05K3/243 ,  H05K3/3452 ,  H05K2201/0367 ,  H05K2201/0989 ,  H05K2203/054 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: An electronic component package and a method of manufacturing the same are disclosed. The method can include: providing a board, on which a multiple number of pads are formed; forming a solder resist layer, in which an opening superimposing over all of the pads is formed, on the board; forming metal posts over the pads, respectively; mounting an electronic component on the board by bonding the electrodes to the metal posts; and forming an underfill resin layer in the opening such that the underfill resin layer is interposed between the electronic component and the board. The solder resist layer may function as a dam that prevents the underfill resin layer from leaking in lateral directions during the subsequent underfill process so that the additional processes, such as dispensing, etc., that were required for forming a separate dam can be omitted, and the process time and costs can be reduced.

Abstract translation: 公开了一种电子部件封装及其制造方法。 该方法可以包括：提供一个板，其上形成多个焊盘; 形成阻焊层，其中在所述板上形成叠加在所有焊盘上的开口; 分别在焊盘上形成金属柱; 通过将电极粘合到金属柱上来将电子部件安装在电路板上; 并且在开口中形成底部填充树脂层，使得底部填充树脂层插入在电子部件和板之间。 阻焊层可以用作防止底部填充树脂层在随后的底部填充过程中在侧向泄漏的坝，从而可以省略形成单独的坝所需的附加过程，例如分配等， 并且可以减少处理时间和成本。

公开(公告)号：US20070084630A1

公开(公告)日：2007-04-19

申请号：US11542175

申请日：2006-10-04

Applicant: Soon-Jin Cho

Inventor： Soon-Jin Cho

IPC: H05K1/00 ,  H05K3/00

CPC classification number: H05K3/4007 ,  H01L2224/16225 ,  H05K1/0206 ,  H05K3/06 ,  H05K3/4644 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2203/1536 ,  Y10T29/49124 ,  Y10T29/49147 ,  Y10T29/49165

Abstract: The present invention discloses a method for manufacturing a coreless substrate. The method comprises the steps of (a) forming an insulating layer on one side of a metal sheet; (b) forming a via hole on the insulating layer for electrical connection between the metal sheet and the other side; and (c) forming a plurality of protruded function pads by etching the metal sheet. The coreless substrate and manufacturing method thereof in accordance with the present invention have the signal delivery characteristic that is improved by eliminating the inner via hole.

Abstract translation: 本发明公开了一种无芯基板的制造方法。 该方法包括以下步骤：（a）在金属片的一侧上形成绝缘层; （b）在绝缘层上形成用于金属片和另一侧之间的电连接的通孔; 和（c）通过蚀刻金属板形成多个突出的功能垫。 根据本发明的无芯基板及其制造方法具有通过消除内通孔而提高的信号传递特性。