公开(公告)号：US08508947B2

公开(公告)日：2013-08-13

申请号：US12896579

申请日：2010-10-01

Applicant: Sanka Ganesan ,  Mohiuddin Mazumder ,  Zhichao Zhang ,  Kemal Aygun

Inventor： Sanka Ganesan ,  Mohiuddin Mazumder ,  Zhichao Zhang ,  Kemal Aygun

IPC: H05K1/00 ,  H05K7/00

CPC classification number: H05K7/00 ,  H05K1/181 ,  H05K3/28 ,  H05K3/282 ,  H05K3/361 ,  H05K2201/10356 ,  H05K2201/1053 ,  H05K2201/10734 ,  H05K2203/167 ,  Y02P70/611

Abstract: An assembly of substrate packages interconnected with flex cables. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing detachable inter-package flex cable connection. The flex cable comprises a transmission region that includes a plurality of signal traces and a ground plane. A plurality of solder mask strips are disposed on the plurality of signals traces to provide anchoring for the signal traces. The solder mask strips intersect the signals traces. The exposed signal traces and the ground plane are coated with organic solderability preservative material. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package. Embodiments of the method of fabrication relate to simultaneously forming hermetically-sealed guiding through holes and I/O contact pads.

Abstract translation: 与柔性电缆互连的衬底封装的组件。 该组件允许通过柔性电缆快速地在衬底封装之间传输输入/输出（I / O）信号，而不通过主板。 实施例涉及提供可拆卸的包装间柔性电缆连接的基板封装。 柔性电缆包括包括多个信号迹线和接地平面的透射区域。 多个焊接掩模条设置在多个信号迹线上以提供信号迹线的锚定。 焊接掩模条与信号迹线相交。 暴露的信号迹线和接地平面涂有有机可焊性防腐材料。 在基板封装上提供密封导向孔，作为机械对准特征，以引导柔性电缆与基板封装上的高速I / O接触焊盘之间的连接。 制造方法的实施例涉及同时形成密封的引导通孔和I / O接触垫。

公开(公告)号：US20130194764A1

公开(公告)日：2013-08-01

申请号：US13562683

申请日：2012-07-31

Applicant: Yukinobu MIKADO ,  Shunsuke SAKAI ,  Takashi KARIYA ,  Toshiki FURUTANI

Inventor： Yukinobu MIKADO ,  Shunsuke SAKAI ,  Takashi KARIYA ,  Toshiki FURUTANI

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K1/185 ,  H01G2/06 ,  H05K1/0207 ,  H05K1/115 ,  H05K3/30 ,  H05K3/32 ,  H05K3/4602 ,  H05K2201/09827 ,  H05K2201/10015 ,  H05K2201/10522 ,  H05K2201/1053 ,  H05K2201/10636 ,  H05K2203/1469 ,  Y02P70/611 ,  Y10T29/49146

Abstract: A wiring board includes a substrate having an opening portion, electronic components positioned in the opening portion of the substrate and including first and second electronic components, and an insulation layer formed over the substrate and the first and second components. The first component has first and second electrodes having side portions on side surfaces of the first component, the second component has first and second electrodes having side portions on side surfaces of the second component, the first electrode of the first component and the first electrode of the second component are set to have substantially the same electric potential, and the first component and the second component are positioned in the opening portion of the substrate such that the side portion of the first electrode of the first component is beside the side portion of the first electrode of the second component.

公开(公告)号：US08488331B2

公开(公告)日：2013-07-16

申请号：US13106146

申请日：2011-05-12

Applicant: Michael Rosenblatt ,  Amir Salehi

Inventor： Michael Rosenblatt ,  Amir Salehi

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K1/181 ,  H01L25/105 ,  H01L2224/13 ,  H01L2224/1302 ,  H01L2224/16137 ,  H01L2225/1005 ,  H01L2225/1058 ,  H05K2201/1053 ,  H05K2201/10727 ,  Y02P70/611 ,  Y10T29/4913 ,  H01L2924/00012

Abstract: Electrical components, such as packaged integrated circuit devices that are mountable on a substrate surface, are provided with at least one exposed electrical contact on a side surface of the component that will be substantially perpendicular to the substrate surface when the component is mounted. Two such components can be mounted side-by-side on the substrate surface with the above-mentioned contacts close to one another between the above-mentioned side surfaces. An electrical connection between the contacts can be made (or perfected) by depositing an electrically conductive connector material in contact with both of the contacts between the above-mentioned side surfaces.

公开(公告)号：US20130093088A1

公开(公告)日：2013-04-18

申请号：US13405108

申请日：2012-02-24

Applicant: Ellis Chau ,  Reynaldo Co ,  Roseann Alatorre ,  Philip Damberg ,  Wei-Shun Wang ,  Se Young Yang ,  Zhijun Zhao

Inventor： Ellis Chau ,  Reynaldo Co ,  Roseann Alatorre ,  Philip Damberg ,  Wei-Shun Wang ,  Se Young Yang ,  Zhijun Zhao

IPC: H01L23/498 ,  H01L21/56

CPC classification number: H01L24/85 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/16 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48997 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/851 ,  H01L2224/8518 ,  H01L2224/85399 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1715 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/3511 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/1053 ,  Y10T29/49149 ,  Y10T29/49151 ,  H01L2224/45664 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076

Abstract: A microelectronic package can include wire bonds having bases bonded to respective conductive elements on a substrate and ends opposite the bases. A dielectric encapsulation layer extending from the substrate covers portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, wherein unencapsulated portions of the wire bonds are defined by portions of the wire bonds which are uncovered by the encapsulation layer. Unencapsulated portions can be disposed at positions in a pattern having a minimum pitch which is greater than a first minimum pitch between bases of adjacent wire bonds.

Abstract translation: 微电子封装可以包括引线键合，其具有结合到衬底上的相应导电元件的底部并且与基底相对的端部。 从衬底延伸的电介质封装层覆盖引线接合的部分，使得引线键合的被覆部分通过封装层彼此分离，其中引线键合的未封装部分由未被覆盖的引线键的部分限定 通过封装层。 未封装的部分可以布置在具有最小间距的图案的位置处，该最小间距大于相邻引线键的基部之间的第一最小间距。

公开(公告)号：US08404520B1

公开(公告)日：2013-03-26

申请号：US13404458

申请日：2012-02-24

Applicant: Ellis Chau ,  Reynaldo Co ,  Roseann Alatorre ,  Philip Damberg ,  Wei-Shun Wang ,  Se Young Yang

Inventor： Ellis Chau ,  Reynaldo Co ,  Roseann Alatorre ,  Philip Damberg ,  Wei-Shun Wang ,  Se Young Yang

IPC: H01L21/60 ,  H01L21/603 ,  H01L23/488 ,  H01L23/49

CPC classification number: H01L24/85 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/16 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48997 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/851 ,  H01L2224/8518 ,  H01L2224/85399 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1715 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/3511 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/1053 ,  Y10T29/49149 ,  Y10T29/49151 ,  H01L2224/45664 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076

Abstract: A microelectronic package can include wire bonds having bases bonded to respective ones of conductive elements exposed at a surface of a substrate. The wire bonds may have exterior edge surfaces disposed at an angle between 25° and 92° relative to the bases, and ends remote, e.g., opposite, from the bases, and remote from the ends which are connected to the bases. A dielectric encapsulation layer extends from the substrate and covers portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, wherein unencapsulated portions of the wire bonds are defined by portions of the wire bonds that are uncovered by the encapsulation layer, the unencapsulated portions including the ends of the wire bonds.

Abstract translation: 微电子封装可以包括引线键合，其具有接合到在衬底的表面处暴露的导电元件的相应导电元件的基底。 线接合可以具有相对于基部以25°和92°之间的角度设置的外部边缘表面，并且远离基部远离，例如相反，并远离连接到基部的端部。 电介质封装层从衬底延伸并覆盖引线接合的部分，使得引线键合的被覆部分通过封装层彼此分开，其中引线键合的未封装部分由引线键的部分限定， 被封装层覆盖的未包封部分包括引线的端部。

公开(公告)号：US08351213B2

公开(公告)日：2013-01-08

申请号：US11749480

申请日：2007-05-16

Applicant: Brian Gorrell ,  Austin A. Saylor

Inventor： Brian Gorrell ,  Austin A. Saylor

IPC: H05K1/18

CPC classification number: H05K1/183 ,  H05K1/0306 ,  H05K1/092 ,  H05K2201/09036 ,  H05K2201/10174 ,  H05K2201/1053 ,  H05K2201/10651 ,  Y10T29/4913 ,  Y10T29/49165

Abstract: An electrical assembly including a substantially planar substrate having at least one recess therein and a plurality of electrical components. The electrical components are positioned in the at least one recess and include a first electrical component and a second electrical component. Each of the electrical components has a body and an electrical connection. The electrical connection of the first electrical component and the electrical connection of the second electrical component are aligned with each other when the body of the first electrical component is in a recess and the body of the second electrical component is in a recess.

Abstract translation: 一种电气组件，包括其中具有至少一个凹部的基本平坦的基板和多个电气部件。 电气部件定位在至少一个凹部中并且包括第一电气部件和第二电气部件。 每个电气部件都具有主体和电气连接。 当第一电气部件的主体处于凹部中并且第二电气部件的主体处于凹部中时，第一电气部件的电连接和第二电气部件的电连接彼此对准。

公开(公告)号：US20120235290A1

公开(公告)日：2012-09-20

申请号：US13498919

申请日：2010-10-07

Applicant: Jean-Michel Morelle ,  Ky Lim Tan ,  Laurent Vivet ,  Sandra Dimelli ,  Stéphane Thomelin ,  Hervé Lorin ,  Patrick Dubus

Inventor： Jean-Michel Morelle ,  Ky Lim Tan ,  Laurent Vivet ,  Sandra Dimelli ,  Stéphane Thomelin ,  Hervé Lorin ,  Patrick Dubus

IPC: H01L23/488 ,  H01L21/50

CPC classification number: H05K1/144 ,  H01L23/10 ,  H01L23/36 ,  H01L23/49833 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/72 ,  H01L24/73 ,  H01L25/074 ,  H01L25/18 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/02335 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/732 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H05K3/0061 ,  H05K2201/042 ,  H05K2201/1053 ,  Y10T29/4913 ,  H01L2224/13 ,  H01L2224/72 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The invention relates to a power module (10), preferably for a vehicle, in particular an electric vehicle, characterised in that said module includes two vertically adjacent semiconducting chips (12, 14), each chip having a first surface (20, 22) to be connected to a heat sink substrate (24, 26), and a second surface (28, 30) separate from the first and on which at least one electronic component (38a-44b) is arranged, the module being arranged such that the second surfaces of the chips are arranged opposite one another.

Abstract translation: 本发明涉及一种优选用于车辆，特别是电动车辆的功率模块（10），其特征在于，所述模块包括两个垂直相邻的半导体芯片（12,14），每个芯片具有第一表面（20,22） 连接到散热器基板（24,26），以及与第一表面分开并且在其上布置至少一个电子部件（38a-44b）的第二表面（28,30），该模块被布置成使得 芯片的第二表面彼此相对布置。

公开(公告)号：US20110294308A1

公开(公告)日：2011-12-01

申请号：US13115322

申请日：2011-05-25

Applicant: Naoki KUWATA ,  Tadashi Ikeuchi ,  Takatoshi Yagisawa

Inventor： Naoki KUWATA ,  Tadashi Ikeuchi ,  Takatoshi Yagisawa

IPC: H01R12/70 ,  H05K1/00

CPC classification number: H01R12/714 ,  G02B6/4279 ,  G02B6/4281 ,  H01R12/62 ,  H05K1/0243 ,  H05K1/0245 ,  H05K1/0274 ,  H05K1/189 ,  H05K2201/10121 ,  H05K2201/1053

Abstract: There is provided a substrate that includes a base substrate, a socket that has a step where the step has a first surface and a second surface, the socket being electrically coupled with the base substrate at the first surface; and a connection substrate that is disposed between the second surface and the base substrate, where the connection substrate is electrically coupled with the socket at the second surface.

Abstract translation: 提供了一种基板，其包括基底基板，具有该台阶具有第一表面和第二表面的台阶的插座，所述插座在所述第一表面处与所述基底基板电耦合; 以及连接基板，其设置在所述第二表面和所述基底基板之间，其中所述连接基板在所述第二表面处与所述插座电耦合。

公开(公告)号：US20110237002A1

公开(公告)日：2011-09-29

申请号：US13157453

申请日：2011-06-10

Applicant: KENNETH H. CHURCH ,  PATRICK CLARK ,  DONGJIANG XU ,  LANCE SWAN ,  BRYAN IRWIN ,  VLADIMIR PELEKHATY

Inventor： KENNETH H. CHURCH ,  PATRICK CLARK ,  DONGJIANG XU ,  LANCE SWAN ,  BRYAN IRWIN ,  VLADIMIR PELEKHATY

IPC: H01L21/66 ,  B05C11/00

CPC classification number: H05K3/125 ,  H01L21/4867 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L25/03 ,  H01L25/065 ,  H01L25/0657 ,  H01L2224/2401 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24147 ,  H01L2224/245 ,  H01L2224/25175 ,  H01L2224/82101 ,  H01L2224/82801 ,  H01L2224/82874 ,  H01L2224/82948 ,  H01L2224/82986 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2924/14 ,  H05K1/0284 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/3484 ,  H05K2201/10515 ,  H05K2201/1053 ,  H01L2924/00012 ,  H01L2924/06 ,  H01L2924/00

Abstract: A method for manufacturing an electronic circuit in three-dimensional space provides for interconnecting electronic components within the circuit by directly writing conducting lines. The method may include observing a direct writing tool of a direct write system using a vision system, determining proper placement of the direct writing tool at least partially based on the step of observing, and directly writing conducting lines in three dimensions using the proper placement. The direct writing may be on a surface or in free space. The method may include stacking a plurality of chips to provide a stack having a top surface and edges extending away from the top and interconnecting connections of the chips by directly writing conducting lines along one of the edges.

Abstract translation: 用于制造三维空间中的电子电路的方法通过直接写入导线来提供电路内的电子元件互连。 该方法可以包括观察使用视觉系统的直接写入系统的直接书写工具，至少部分地基于观察步骤确定直接书写工具的正确放置，并且使用适当的位置直接在三维中写入导线。 直接写入可能在表面或自由空间中。 该方法可以包括堆叠多个芯片以提供具有顶表面的边缘和沿顶部延伸的边缘，并且通过沿着边缘之一直接写入导电线来互连芯片的连接。

公开(公告)号：US20110108427A1

公开(公告)日：2011-05-12

申请号：US13008849

申请日：2011-01-18

Applicant: Charan Gurumurthy ,  Sanka Ganesan ,  Chandrashekar Ramaswamy ,  Mark Hlad

Inventor： Charan Gurumurthy ,  Sanka Ganesan ,  Chandrashekar Ramaswamy ,  Mark Hlad

IPC: C25D5/02

CPC classification number: H01L23/48 ,  H01L23/49827 ,  H01L24/16 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K1/113 ,  H05K3/00 ,  H05K3/108 ,  H05K3/222 ,  H05K3/426 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09509 ,  H05K2201/10189 ,  H05K2201/10356 ,  H05K2201/1053 ,  H05K2201/10734 ,  H05K2203/167 ,  Y10T29/49124 ,  H01L2224/0401

Abstract: An assembly of substrate packages interconnected with flex cables and a method of fabrication of the substrate package. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing separable inter-package flex cable connection. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package. Embodiments of the method of fabrication relate to simultaneously forming hermetically-sealed guiding through holes and I/O contact pads.

Abstract translation: 与柔性电缆互连的衬底封装的组件和衬底封装的制造方法。 该组件允许通过柔性电缆快速地在衬底封装之间传输输入/输出（I / O）信号，而不通过主板。 实施例涉及提供可分离的包装间柔性电缆连接的衬底封装。 在基板封装上提供密封导向孔，作为机械对准特征，以引导柔性电缆与基板封装上的高速I / O接触焊盘之间的连接。 制造方法的实施例涉及同时形成密封的引导通孔和I / O接触垫。