公开(公告)号：US6088233A

公开(公告)日：2000-07-11

申请号：US195232

申请日：1998-11-18

Applicant: Makoto Iijima ,  Tetsushi Wakabayashi ,  Toshio Hamano ,  Masaharu Minamizawa ,  Masashi Takenaka ,  Taturou Yamashita ,  Masataka Mizukoshi

Inventor： Makoto Iijima ,  Tetsushi Wakabayashi ,  Toshio Hamano ,  Masaharu Minamizawa ,  Masashi Takenaka ,  Taturou Yamashita ,  Masataka Mizukoshi

IPC: H01L23/12 ,  H01L21/48 ,  H01L21/60 ,  H01L23/10 ,  H01L23/14 ,  H01L23/24 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/18 ,  H05K3/46 ,  H05K7/02

CPC classification number: H01L24/81 ,  H01L21/486 ,  H01L23/10 ,  H01L23/142 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/18 ,  H05K3/4602 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K2201/0959 ,  H05K2201/09672

Abstract: A semiconductor device includes a board base having through-holes filled with a filling core, an additive layer provided on an upper surface of the board base as well as an upper surface of the filling core wherein the additive layer includes a wiring pattern having one or more paths, a semiconductor chip fixed on an upper surface of the additive layer, and nodes provided on a lower surface of the board base, wherein the one or more paths are laid out without a restriction posed by the through-holes, and are used for electrically connecting the semiconductor chip and the nodes.

Abstract translation: 半导体器件包括具有填充有填充芯的通孔的板基板，设置在基板的上表面上的添加层以及填充芯的上表面，其中添加层包括布线图案，该布线图案具有一个或 更多路径，固定在所述添加层的上表面上的半导体芯片，以及设置在所述基板的下表面上的节点，其中所述一个或多个路径被布置而不受所述通孔所构成的限制，并且被使用 用于电连接半导体芯片和节点。

公开(公告)号：US6079100A

公开(公告)日：2000-06-27

申请号：US76649

申请日：1998-05-12

Applicant: Donald S. Farquhar ,  Voya R. Markovich ,  Kostas I. Papathomas ,  Leonard L. Schmidt

Inventor： Donald S. Farquhar ,  Voya R. Markovich ,  Kostas I. Papathomas ,  Leonard L. Schmidt

IPC: H05K1/11 ,  H05K3/00 ,  H01K3/10 ,  H01R9/09

CPC classification number: H05K3/0094 ,  H05K1/113 ,  H05K2201/0959 ,  H05K2203/0191 ,  H05K2203/025 ,  H05K2203/0278 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method of making a circuitized substrate such as a printed circuit board having at least one hole therein which comprises the steps of providing a layer of dielectric, forming at least one (and preferably several) holes therein, positioning a thin layer of support material atop the dielectric layer and over the hole(s), positioning a quantity of fill material on the thin layer of support material (preferably before positioning the thin layer on the dielectric) and thereafter applying a predetermined force sufficient to cause the thin support layer to rupture or otherwise deform (including melting from heat application thereto) such that the fill material is forcibly driven into the accommodating hole(s). Subsequent steps can include forming a layer of circuitry on the substrate's external surface and over the filled holes such that an electrical component such as a ball grid array (BGA), semiconductor chip, etc. may be directly positioned on and/or over the hole(s). A fill member usable with the method is also provided.

Abstract translation: 一种制造诸如印刷电路板的电路化基板的方法，其中具有至少一个孔，其包括以下步骤：提供介电层，在其中形成至少一个（并且优选几个）孔，将薄层的支撑材料定位在顶部 电介质层和孔之上，将一定量的填充材料定位在支撑材料的薄层上（优选在将薄层定位在电介质上之前），然后施加足以使薄载体层破裂的预定力 或以其他方式变形（包括从其加热熔化）使得填充材料被强制地驱动到容纳孔中。 随后的步骤可以包括在衬底的外表面上和填充的孔上形成电路层，使得电子部件例如球栅阵列（BGA），半导体芯片等可以直接定位在孔的上和/或上方 （s）。 还提供了可用于该方法的填充构件。

公开(公告)号：US06066889A

公开(公告)日：2000-05-23

申请号：US158811

申请日：1998-09-22

Applicant: Gerald Walter Jones ,  Heike Marcello ,  Kostas Papathomas

Inventor： Gerald Walter Jones ,  Heike Marcello ,  Kostas Papathomas

IPC: H01L21/48 ,  H05K3/00 ,  H01L23/04

CPC classification number: H01L21/486 ,  H05K3/0094 ,  H05K2201/0959 ,  H05K2203/0278 ,  H05K3/0082

Abstract: A novel method of filling apertures in substrates, such as through holes, is provided. The method utilizes a photoimageable film, and comprises the following steps: applying a photoimagable, hole fill film over the apertures; reflowing the hole fill film to flow into the apertures; exposing the hole fill film to actinic radiation, preferably ultraviolet light, through a phototool, which preferably has openings slightly larger than the diameter of the apertures; then at least partially curing the hole fill film; and developing the hole fill film to remove the unexposed hole fill film. An advantage of the present method is that the apertures may be selectively filled. After the apertures are filled, the hole fill film is cured, preferably by baking. Thereafter, the substrate is preferably subjected to further processing steps; for example, nubs of cured hole fill film are preferably removed. If desired, the substrate is circuitized. If desired, features are gold plated, such as for example, electrolessly gold plated. The hole fill film preferably has solids which comprise 0 to about 20% of a thixotrope and about 80% to about 100% parts of an epoxy resin system; the epoxy resin system comprises: from about 10% to about 80% of phenoxy polyol resin which is the condensation product of epichlorohydrin and bisphenol A, having a molecular weight of from about 40,000 to about 130,000; from about 20% to about 90% of an epoxidized multifunctional bisphenol A formaldehyde novolac resin having a molecular weight of from about 4,000 to about 10,000; from about 35% to about 50% of a diglycidyl ether of bisphenol A, preferably halogenated, and having a molecular weight of from about 600 to about 2,500; and from about 0.1 to about 15 parts by weight of the total resin weight, a cationic photoinitiator. The invention also relates to circuitized structures produced according to the method.

公开(公告)号：US6054755A

公开(公告)日：2000-04-25

申请号：US168960

申请日：1998-10-09

Applicant: Hiroshi Takamichi ,  Yoshikazu Nakada

Inventor： Hiroshi Takamichi ,  Yoshikazu Nakada

IPC: H01L23/12 ,  H01L21/52 ,  H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H05K3/00 ,  H05K3/06 ,  H05K3/24 ,  H05K3/34 ,  H05K3/42 ,  H01L23/495

CPC classification number: H01L23/564 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/32 ,  H05K3/0094 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K2201/0959 ,  H05K2203/1394 ,  H05K3/0082 ,  H05K3/062 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/427

Abstract: In order that popcorning and delamination resulting from moisture vapor in a semiconductor package may be prevented, a vent hole is formed in a die-bonding area of a plastic substrate so as to extend vertically through the substrate. An upper open end of the vent hole is covered with a solder resist film and a semiconductor chip is die-bonded on the solder resist film. In the die-bonding step, the solder resist film prevents an adhesive agent from flowing into the vent hole through the upper open end, so that gas permeability of the vent hole can be ensured. Furthermore, since the solder resist film has gas permeability, moisture vapor in the package is released outside through the vent hole and the solder resist film during a reflow heating.

Abstract translation: 为了防止半导体封装中的湿气蒸气引​​起的爆裂和分层，可以在塑料基板的芯片接合区域中形成通气孔，以便垂直延伸穿过基板。 通气孔的上开口端被阻焊膜覆盖，并且半导体芯片被芯片焊接在阻焊膜上。 在芯片接合工序中，阻焊膜防止粘合剂通过上开口端流入通气孔，能够确保通气孔的透气性。 此外，由于阻焊膜具有透气性，因此在回流加热期间，封装中的湿气通过通气孔和阻焊膜释放到外部。

公开(公告)号：US6010768A

公开(公告)日：2000-01-04

申请号：US854683

申请日：1997-05-12

Applicant: Toshihiko Yasue ,  Yasuji Hiramatsu ,  Hideki Yano ,  Yoshifumi Ishitani ,  Yoichiro Kawamura ,  Hideki Murase ,  Ayumi Suzuki ,  Masato Kawade ,  Motoo Asai

Inventor： Toshihiko Yasue ,  Yasuji Hiramatsu ,  Hideki Yano ,  Yoshifumi Ishitani ,  Yoichiro Kawamura ,  Hideki Murase ,  Ayumi Suzuki ,  Masato Kawade ,  Motoo Asai

IPC: H05K3/00 ,  H05K3/38 ,  H05K3/46 ,  B32B3/00

CPC classification number: H05K3/4661 ,  H05K3/0094 ,  H05K3/4602 ,  H05K2201/0129 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/0773 ,  H05K3/382 ,  H05K3/384 ,  Y10S428/901 ,  Y10T428/24893 ,  Y10T428/24917 ,  Y10T428/252

Abstract: It is to provide a multilayer printed circuit board having excellent resolution, interlaminar insulation property and resistance to cool-heat shock without forming unevenness on the surface and lowering peel strength even if the thickness of the resin insulating layer is thin. The invention proposes a multilayer printed circuit board comprising an upper conductor circuit layer, a lower conductor circuit layer and a resin insulating layer electrically insulating both the conductor circuit layers, in which the resin insulating layer is a composite layer comprised of an layer made from a heat-resistant resin hardly soluble in acid or oxidizing agent as a lower layer and an adhesive layer for electroless plating made from a heat-resistant resin as an upper layer, and if necessary, a resin is filled in a concave portion created between conductor insulating circuits of the lower layer so as to render the surface into the same plane as the surface of the conductor circuit.

Abstract translation: 提供一种具有优异的分辨率，层间绝缘性和耐冷热冲击性的多层印刷电路板，而不会在表面上形成不均匀性，并且即使树脂绝缘层的厚度薄，也降低剥离强度。 本发明提出了一种多层印刷电路板，包括上导体电路层，下导体电路层和电绝缘两个导体电路层的树脂绝缘层，其中树脂绝缘层是由由 耐热树脂难溶于作为下层的酸或氧化剂以及由耐热树脂作为上层制成的用于化学镀的粘合剂层，如果需要，树脂填充在导体绝缘 电路，以使表面进入与导体电路的表面相同的平面。

公开(公告)号：US6009620A

公开(公告)日：2000-01-04

申请号：US115715

申请日：1998-07-15

Applicant: Ashwinkumar C. Bhatt ,  Joseph A. Kotylo ,  Kenneth S. Lyjak ,  Amarjit S. Rai ,  John A. Welsh

Inventor： Ashwinkumar C. Bhatt ,  Joseph A. Kotylo ,  Kenneth S. Lyjak ,  Amarjit S. Rai ,  John A. Welsh

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/42

CPC classification number: H05K3/0094 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/19041 ,  H05K1/112 ,  H05K2201/0959 ,  H05K2203/0278 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method of making a circuitized substrate wherein fill material is forced into the substrate's holes to thus provide additional support for conductive circuitry or the like thereon, thus increasing the final product's circuit density. The fill is provided in a substantially uncured state, following which partial cure occurs. Thereafter, the fill is substantially fully cured and the aforementioned circuit elements may then be provided directly thereon. Alternatively, a dual fill process is used with both quantities of uncured fill being disposed in each hole and then cured by a singular UV exposure step.

Abstract translation: 一种制造电路化基板的方法，其中填充材料被迫进入基板的孔中，从而为其上的导电电路等提供额外的支撑，从而增加最终产品的电路密度。 填充物以基本上未固化的状态提供，随后发生部分固化。 此后，填充物基本上完全固化，然后可以直接在其上提供上述电路元件。 或者，使用双填充方法，将两种量的未固化填料置于每个孔中，然后通过单一的UV曝光步骤固化。

公开(公告)号：US5936848A

公开(公告)日：1999-08-10

申请号：US087793

申请日：1998-05-29

Applicant: Behrooz Mehr ,  Tony Kean-Lee Lim ,  Agnes Seok-Tuan Lim ,  Michael Barrow

Inventor： Behrooz Mehr ,  Tony Kean-Lee Lim ,  Agnes Seok-Tuan Lim ,  Michael Barrow

IPC: B23K1/00 ,  B23K11/11 ,  H01L23/31 ,  H01L23/498 ,  H05K1/11 ,  H05K3/00 ,  H05K3/34 ,  H05K7/02

CPC classification number: B23K11/11 ,  B23K1/0016 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H05K3/0094 ,  H05K3/3436 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/113 ,  H05K1/114 ,  H05K2201/0959 ,  H05K2201/10666 ,  H05K2201/10734 ,  H05K2203/041 ,  H05K2203/1178 ,  H05K2203/1394 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/3478 ,  Y02P70/613

Abstract: An electronics package includes a substrate, a via and a solder ball. The substrate has first and second opposed surfaces. The via is located within the substrate and terminates at the first surface. The via defines an opening having first and second opposed walls. The solder ball is at least partially located over the opening. The solder ball has first and second opposed sides, the first side being adjacent the first wall and the second side being adjacent the second wall. The first side is nearer to the first wall than the second side is to the second wall.

Abstract translation: 电子封装包括衬底，通孔和焊球。 衬底具有第一和第二相对表面。 通孔位于衬底内并终止于第一表面。 通孔限定了具有第一和第二相对壁的开口。 焊球至少部分地位于开口上方。 焊球具有第一和第二相对侧，第一侧邻近第一壁并且第二侧邻近第二壁。 第一侧比第二面靠近第二面墙更靠近第一面。

公开(公告)号：US5916736A

公开(公告)日：1999-06-29

申请号：US637888

申请日：1996-04-25

Applicant: Katsuo Doi ,  Satoshi Miyayama ,  Toshikazu Oda

Inventor： Katsuo Doi ,  Satoshi Miyayama ,  Toshikazu Oda

IPC: C08F2/50 ,  C08K5/12 ,  G03F7/027 ,  G03F7/032 ,  G03F7/095 ,  H05K3/00 ,  H05K3/06 ,  H05K3/42 ,  G03C5/00

CPC classification number: H05K3/0094 ,  C08K5/12 ,  G03F7/027 ,  G03F7/032 ,  G03F7/0955 ,  H05K2201/0209 ,  H05K2201/0959 ,  H05K2203/0759 ,  H05K3/0076 ,  H05K3/064 ,  H05K3/427 ,  Y10T428/24917

Abstract: A process of manufacturing a printed circuit board having plated landless through-holes involves filling a radiation curable putty material in through-holes plated with copper in a substrate, exposing the material under radiation of light in order to cure the material, placing a liquid resist on the substrate surface, covering a mask over the resist, exposing the resist layer by using a mask having a circuit pattern, developing the resist, etching the substrate surface, and removing the cured putty material in the through-holes and the remaining portion of the resist. The filling material composition used in the process comprises hydrophthalic mono ester compound as a component (A), a catalyst for promoting photo polymerization of a vinyl group in the mono ester as a component (B), a highly transparent rosin having a Hazen color tone of 300 or less for the improvement of cure depth of the material after exposure of light as a component (C), and a powder of at least one extender selected from polyethelene, nylon, polyester, talc, silica, aluminum hydroxide, titanium oxide, barium sulfate, kaolinite, calcium carbonate, and phthalocyanine as a component (D).

Abstract translation: 一种制造具有电镀无置入通孔的印刷电路板的方法包括在基板上镀铜的通孔中填充可辐射固化油灰材料，在光照射下曝光该材料以固化该材料， 在基板表面上，在抗蚀剂上覆盖掩模，通过使用具有电路图案的掩模曝光抗蚀剂层，显影抗蚀剂，蚀刻基板表面，以及去除通孔中的固化的腻子材料，以及其余部分 抗拒。 该方法中使用的填充材料组合物包含作为组分（A）的亲水性单酯化合物，用于促进作为组分（B）的单酯中的乙烯基的光聚合的催化剂，具有Hazen色调的高透明松香 为了提高作为（C）成分的光的曝光后的材料的固化深度，为300以下的粉末，以及选自聚乙烯，尼龙，聚酯，滑石，二氧化硅，氢氧化铝，氧化钛， 硫酸钡，高岭石，碳酸钙和酞菁作为组分（D）。

公开(公告)号：US5786238A

公开(公告)日：1998-07-28

申请号：US799128

申请日：1997-02-13

Applicant: Deepak K. Pai ,  Ronald R. Denny ,  Jeanne M. Chevalier ,  George F. Schwartz, III ,  Clark F. Webster ,  Robert M. Lufkin ,  Terrance A. Krinke

Inventor： Deepak K. Pai ,  Ronald R. Denny ,  Jeanne M. Chevalier ,  George F. Schwartz, III ,  Clark F. Webster ,  Robert M. Lufkin ,  Terrance A. Krinke

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/46 ,  H01L21/44

CPC classification number: H05K3/462 ,  H01L2224/81894 ,  H05K1/113 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/063 ,  H05K2203/1572 ,  H05K3/0094 ,  H05K3/4623 ,  H05K3/4647

Abstract: A process of laminating a large-layer-count (LLC) substrates includes formation of first and second vias through respective substrates. A conductive path is formed through each of the respective vias, and posts are formed on the respective vias, electrically connected to the respective conductive path. A non-flowable adhesive layer having an aperture is provided between the LLC substrates so that the posts confront each other through the aperture. The LLC substrates are pressed together through the non-flowable adhesive layer to mechanically bond them together, and so that the posts abut each other. Simultaneously, the posts are electrically bonded to each other in the aperture.

Abstract translation: 层叠大层数（LLC）衬底的工艺包括通过各自的衬底形成第一和第二过孔。 通过各个通孔中的每一个形成导电路径，并且在相应的通路上形成柱，电连接到相应的导电路径。 具有孔的不可流动的粘合剂层设置在LLC衬底之间，使得柱通过孔彼此面对。 LLC基底通过不可流动的粘合剂层压在一起，以将它们机械地结合在一起，使得柱彼此邻接。 同时，孔在孔中彼此电接合。

公开(公告)号：US5706178A

公开(公告)日：1998-01-06

申请号：US603444

申请日：1996-02-20

Applicant: Michael Barrow

Inventor： Michael Barrow

IPC: B23K1/00 ,  B23K11/11 ,  H01L23/31 ,  H01L23/498 ,  H05K1/11 ,  H05K3/00 ,  H05K3/34 ,  H05K7/02

CPC classification number: H05K3/0094 ,  B23K1/0016 ,  B23K11/11 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H05K3/3436 ,  B23K2201/40 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/113 ,  H05K1/114 ,  H05K2201/0959 ,  H05K2201/10666 ,  H05K2201/10734 ,  H05K2203/041 ,  H05K2203/1178 ,  H05K2203/1394 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/3478 ,  Y02P70/613

Abstract: A ball grid array (BGA) integrated circuit package which has a plurality of elliptically shaped solder pads located on a bottom surface of a package substrate. The bottom surface also has a solder mask which contains a number of holes that expose the solder pads. The holes allow solder balls to be attached to the solder pads. The solder balls can be reflowed to attach the package to a printed circuit board. The elliptical shaped solder pads have a width that is smaller than the length of the pads. The narrow pad portions provide additional routing space for the bottom surface of the package. The solder mask hole diameters are less than the lengths of the solder pads so that portions of the pads are anchored by the maskant material. The anchored portions increase the peel strength of the pads.

Abstract translation: 一种球栅阵列（BGA）集成电路封装，其具有位于封装衬底的底表面上的多个椭圆形焊盘。 底表面还具有包含许多露出焊盘的孔的焊接掩模。 这些孔允许焊球附着在焊盘上。 可以回流焊球以将封装附接到印刷电路板。 椭圆形焊盘的宽度小于焊盘的长度。 窄焊盘部分为封装的底表面提供额外的布线空间。 焊料掩模孔直径小于焊盘的长度，使得焊盘的部分被掩模材料锚定。 锚固部分​​增加了焊盘的剥离强度。