公开(公告)号：US07291915B2

公开(公告)日：2007-11-06

申请号：US11203124

申请日：2005-08-15

Applicant: Toshio Sugawa ,  Hideki Higashitani ,  Takumi Misaki

Inventor： Toshio Sugawa ,  Hideki Higashitani ,  Takumi Misaki

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H05K1/0242 ,  H05K1/0237 ,  H05K3/108 ,  H05K3/181 ,  H05K3/24 ,  H05K3/381 ,  H05K3/383 ,  H05K3/384 ,  H05K3/4069 ,  H05K2201/0338 ,  H05K2201/0355 ,  H05K2201/098 ,  H05K2203/0307 ,  H05K2203/0392 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49133

Abstract: A circuit board includes an insulating substrate, a first conductive layer on the insulating substrate, a second conductive layer on the first conductive layer, and a third conductive layer covering the first conductive layer and the second conductive layer. The first conductive layer has a surface provided on the surface of the insulating substrate, and a surface having a width smaller than a width of the above surface. In this circuit board, the conductive layers have small impedances even if a high-frequency signal flows in the conductive layers.

Abstract translation: 电路板包括绝缘基板，绝缘基板上的第一导电层，第一导电层上的第二导电层和覆盖第一导电层和第二导电层的第三导电层。 第一导电层具有设置在绝缘基板的表面上的表面和宽度小于上述表面的宽度的表面。 在该电路板中，即使高频信号在导电层中流动，导电层也具有小的阻抗。

公开(公告)号：US20070145584A1

公开(公告)日：2007-06-28

申请号：US10583846

申请日：2004-12-10

Applicant: Tatsuo Kataoka ,  Yoshikazu Akashi ,  Yutaka Iguchi

Inventor： Tatsuo Kataoka ,  Yoshikazu Akashi ,  Yutaka Iguchi

IPC: H01L23/48

CPC classification number: C25D5/02 ,  C25D7/00 ,  H01L2924/0002 ,  H05K3/06 ,  H05K3/067 ,  H05K3/22 ,  H05K3/388 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2203/0346 ,  H05K2203/1476 ,  H01L2924/00

Abstract: The printed wiring board comprises, on at least one surface of an insulating film, a base metal layer and a conductive metal layer formed on the base metal layer, and is characterized in that in a section of the wiring board the bottom width of the conductive metal layer is smaller than the top width of the base metal layer. The circuit device comprises the printed wiring board and an electronic part mounted thereon. The process for producing a printed wiring board comprises bringing a base metal layer and a conductive metal layer into contact with an etching solution capable of dissolving the conductive metal to form a wiring pattern and then sequentially bringing the resultant into contact with a first treating solution capable of dissolving the metal for forming the base metal layer, a microetching solution capable of selectively dissolving the conductive metal and a second treating solution having a different chemical composition from the first treating solution in this order.

Abstract translation: 印刷布线板在绝缘膜的至少一个表面上包括形成在基底金属层上的基底金属层和导电金属层，其特征在于，在布线板的一部分中，导电的底部宽度 金属层比基体金属层的顶部宽度小。 电路装置包括印刷线路板和安装在其上的电子部件。 制造印刷电路板的方法包括使基底金属层和导电金属层与能够溶解导电金属的蚀刻溶液接触以形成布线图案，然后顺序地使得到的第一处理溶液与第一处理溶液接触 溶解用于形成基底金属层的金属，能够依次从第一处理溶液中选择性地溶解导电金属的微蚀刻溶液和具有不同化学组成的第二处理溶液。

公开(公告)号：US20070049130A1

公开(公告)日：2007-03-01

申请号：US11510591

申请日：2006-08-28

Applicant: Toshiya Kojima ,  Gentaro Furukawa

Inventor： Toshiya Kojima ,  Gentaro Furukawa

IPC: H01R13/40

CPC classification number: H05K3/06 ,  B41J2/14233 ,  B41J2002/14459 ,  B41J2002/14491 ,  B41J2202/18 ,  H05K1/0265 ,  H05K3/041 ,  H05K3/061 ,  H05K3/107 ,  H05K3/244 ,  H05K2201/09018 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09236 ,  H05K2201/09736 ,  H05K2201/098 ,  H05K2201/09827 ,  H05K2201/09836 ,  H05K2201/09981 ,  H05K2203/0108 ,  H05K2203/1527

Abstract: The wiring substrate comprises: a recess section and a projecting section formed on at least one surface of the wiring substrate; and wires formed on both the recess section and the projecting section.

Abstract translation: 布线基板包括：形成在布线基板的至少一个表面上的凹部和突出部; 以及形成在所述凹部和所述突出部两者上的线。

公开(公告)号：US07172958B2

公开(公告)日：2007-02-06

申请号：US11050112

申请日：2005-02-02

Applicant: Yorihiko Sasaki

Inventor： Yorihiko Sasaki

IPC: H01L21/44 ,  H01L21/50 ,  H01L21/469

CPC classification number: H01P11/003 ,  H01L21/6835 ,  H01L2221/68363 ,  H01P3/081 ,  H01P3/088 ,  H05K1/0242 ,  H05K3/048 ,  H05K3/108 ,  H05K3/205 ,  H05K2201/098

Abstract: A high-frequency wiring structure includes a microstrip line having a ground conductor, a dielectric disposed on the ground conductor, and a transmission conductor that is at least partially disposed in the dielectric. The transmission conductor is defined by a flat bottom parallel to the ground conductor, a pair of flat sides that are perpendicular to the ground conductor and are positioned on both sides of the flat bottom in the wiring width direction, and curved parts that continuously join the flat bottom and the pair of flat sides. The curved parts have a radius of curvature within the range of 5% to 50% of the thickness of the transmission conductor.

Abstract translation: 高频布线结构包括具有接地导体的微带线，设置在接地导体上的电介质和至少部分地布置在电介质中的传输导体。 传输导体由平行于接地导体的平底限定，垂直于接地导体的一对扁平侧面，并且在布线宽度方向上位于平坦底部的两侧，并且连续地连接到接地导体的弯曲部分 平底和一对平面。 弯曲部分的曲率半径在传输导体厚度的5％至50％的范围内。

公开(公告)号：US20060231953A1

公开(公告)日：2006-10-19

申请号：US11385582

申请日：2006-03-20

Applicant: Shinji Murata ,  Masayoshi Takeuchi

Inventor： Shinji Murata ,  Masayoshi Takeuchi

IPC: H01L23/48

CPC classification number: H01L23/49816 ,  H01L21/563 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/28 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/1601 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H05K1/111 ,  H05K3/108 ,  H05K3/3436 ,  H05K3/388 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/098 ,  H05K2201/10977 ,  H05K2203/0594 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: There is provided a structure for mounting a semiconductor part having improved productivity, in which a bump is detached from a land portion and a method of manufacturing a mounting substrate used therein. The structure for mounting the semiconductor part includes a mounting substrate 1 having an insulating substrate 2 on which a wiring pattern 3 and a land portion 4 are provided, a semiconductor part 5 mounted on the mounting substrate 1 using a bump 7 and the land portion 4, and an underfill 8 inserted between the semiconductor part 5 and the insulating substrate 2. An undercut portion 4c having an inverse tapered shape from the insulating substrate 2 to an upper surface of the land portion 4 is provided in an edge 4a of the land portion 4 in which the bump 7 is located, and the bump is inserted into the undercut portion. Accordingly, since the couple between the bump 7 and the land portion 4 becomes stronger, the bump is not detached from the land portion 4 when the underfill 8 expands or contracts.

Abstract translation: 提供一种用于安装具有提高的生产率的半导体部件的结构，其中凸块从凸台部分分离，以及制造其中使用的安装基板的方法。 用于安装半导体部件的结构包括：安装基板1，其具有设置有布线图案3和接地部4的绝缘基板2，使用凸块7安装在安装基板1上的半导体部5以及接地部4 ，以及插入在半导体部件5和绝缘基板2之间的底部填充部分8.从绝缘基板2到基板部分4的上表面具有倒锥形的底切部分4c设置在边缘4a上 凸块7位于其中的凸台部分4，并且凸块插入到底切部分中。 因此，由于凸块7和凸台部4之间的连接变得更强，所以当底部填充物8膨胀或收缩时，凸起部不会从陆部4脱离。

公开(公告)号：US06936337B2

公开(公告)日：2005-08-30

申请号：US10713390

申请日：2003-11-14

Applicant: Nobuyoshi Tsukaguchi ,  Masami Kimura

Inventor： Nobuyoshi Tsukaguchi ,  Masami Kimura

IPC: H01L23/373 ,  H05K1/03 ,  H05K3/06 ,  H05K3/24 ,  H05K3/38 ,  H05K1/02

CPC classification number: H01L23/3735 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K3/06 ,  H05K3/244 ,  H05K3/38 ,  H05K2201/0355 ,  H05K2201/098 ,  Y10T428/12576 ,  Y10T428/24917 ,  Y10T428/24926 ,  H01L2924/00

Abstract: There is provided a metal/ceramic circuit board capable of eliminating discrepancy during mounting of parts to improve the reliability of mounting of the parts. The metal/ceramic circuit board has a ceramic substrate 10, and a metal circuit plate (a copper plate 14) bonded to the ceramic substrate 10, the metal circuit plate having a thickness which is more than 0.25 mm and which is less than 0.3 mm, and the metal circuit plate having a skirt spreading length (a dimensional difference between the bottom and top portion of the peripheral edge portion of the metal circuit plate) of less than 50 μm.

Abstract translation: 提供了一种金属/陶瓷电路板，其能够在安装零件期间消除差异，以提高部件安装的可靠性。 金属/陶瓷电路板具有陶瓷基板10和与陶瓷基板10接合的金属电路板（铜板14），金属电路板的厚度大于0.25mm且小于0.3mm ，并且金属电路板具有小于50μm的裙部扩展长度（金属电路板的周边边缘部分的底部和顶部之间的尺寸差）。

公开(公告)号：US20050179129A1

公开(公告)日：2005-08-18

申请号：US11050112

申请日：2005-02-02

Applicant: Yorihiko Sasaki

Inventor： Yorihiko Sasaki

IPC: H01L21/44 ,  H01L21/469 ,  H01L21/48 ,  H01L21/50 ,  H01L21/68 ,  H01L23/053 ,  H01L23/12 ,  H01L23/52 ,  H01P3/08 ,  H01P11/00 ,  H05K1/02 ,  H05K3/02 ,  H05K3/04 ,  H05K3/10 ,  H05K3/18 ,  H05K3/20 ,  H05K3/22

CPC classification number: H01P11/003 ,  H01L21/6835 ,  H01L2221/68363 ,  H01P3/081 ,  H01P3/088 ,  H05K1/0242 ,  H05K3/048 ,  H05K3/108 ,  H05K3/205 ,  H05K2201/098

Abstract: A high-frequency wiring structure includes a microstrip line having a ground conductor, a dielectric disposed on the ground conductor, and a transmission conductor that is at least partially disposed in the dielectric. The transmission conductor is defined by a flat bottom parallel to the ground conductor, a pair of flat sides that are perpendicular to the ground conductor and are positioned on both sides of the flat bottom in the wiring width direction, and curved parts that continuously join the flat bottom and the pair of flat sides. The curved parts have a radius of curvature within the range of 5% to 50% of the thickness of the transmission conductor.

Abstract translation: 高频布线结构包括具有接地导体的微带线，设置在接地导体上的电介质和至少部分地布置在电介质中的传输导体。 传输导体由平行于接地导体的平底限定，垂直于接地导体并位于布线宽度方向上平底两侧的一对平面，以及连续接合 平底和一对平面。 弯曲部分的曲率半径在传输导体厚度的5％至50％的范围内。

公开(公告)号：US20050167804A1

公开(公告)日：2005-08-04

申请号：US11044836

申请日：2005-01-28

Applicant: Yung Pan ,  Chia Chen

Inventor： Yung Pan ,  Chia Chen

IPC: H01L21/48 ,  H01L21/60 ,  H01L23/498 ,  H05K3/06 ,  H05K3/10 ,  H05K3/24 ,  H05K3/34 ,  H01L21/44 ,  H01L23/02

CPC classification number: H01L23/498 ,  H01L21/4846 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/14 ,  H01L2924/15311 ,  H05K3/062 ,  H05K3/108 ,  H05K3/244 ,  H05K3/3452 ,  H05K2201/098 ,  H05K2201/0989 ,  H05K2201/099 ,  H01L2924/00014

Abstract: A substrate for packaging a semiconductor chip is disclosed. The substrate includes a dielectric layer, a plurality of conductive circuits and bonding pads formed on the dielectric layer, a metal thin deposition layer formed on the conductive circuits and the bonding pads, and a solder mask formed on the dielectric layer and the conductive circuits. The first ends of the bonding pads extend from the conductive circuits. The metal thin deposition layer has at least a portion to protrude out of the conductive circuits and the bonding pads such that the protruding portion of the metal thin deposition layer is not supported by the conductive circuits or the bonding pads. The bonding pads are exposed from the solder mask except that the second end of each bonding pad is covered by the solder mask in the manner that the protruding portion of the metal thin deposition layer is embedded in the solder mask. The present invention further provides a method for manufacturing a substrate.

Abstract translation: 公开了一种用于封装半导体芯片的基板。 基板包括介电层，形成在电介质层上的多个导电电路和接合焊盘，形成在导电电路和接合焊盘上的金属薄沉积层，以及形成在电介质层和导电电路上的焊接掩模。 接合焊盘的第一端从导电电路延伸。 金属薄沉积层至少有一部分从导电电路和接合焊盘突出出来，使得金属薄沉积层的突出部分不被导电电路或接合焊盘支撑。 接合焊盘从焊料掩模露出，除了金属薄沉积层的突出部分嵌入焊料掩模中的方式，每个接合焊盘的第二端被焊料掩模覆盖。 本发明还提供一种制造基板的方法。

公开(公告)号：US20050139391A1

公开(公告)日：2005-06-30

申请号：US10977192

申请日：2004-10-29

Applicant: Yuan-Liang Li ,  Jiangqi He ,  Dong Zhong ,  David Figueroa

Inventor： Yuan-Liang Li ,  Jiangqi He ,  Dong Zhong ,  David Figueroa

IPC: H01L23/498 ,  H01L23/66 ,  H01P3/08 ,  H05K1/02 ,  H05K7/06

CPC classification number: H01P3/081 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/1903 ,  H05K1/0242 ,  H05K1/0245 ,  H05K1/0265 ,  H05K3/4644 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/0979 ,  H05K2201/098 ,  H05K2203/0733 ,  H01L2924/00

Abstract: Trace configurations for carrying high-speed digital differential signals provide for reduced conduction loss and improved signal integrity. In one embodiment, a circuit board has a first set of conductive traces disposed on non-conductive material, and a second set of conductive traces parallel to the first set and disposed within the conductive material. The second set is separated from the first set by non-conductive material. Corresponding traces of the first and second sets may be in a stacked configuration. In other embodiments, conductive material may be provided between corresponding traces of the first and second sets resulting in an “I-shaped” or “U-shaped” cross-section. In yet other embodiments, the trace configurations have “T-shaped” and “L-shaped” cross-sections.

公开(公告)号：US20040238483A1

公开(公告)日：2004-12-02

申请号：US10855182

申请日：2004-05-27

Inventor： Nobuyoshi Tsukaguchi ,  Michihiro Kosaka

IPC: H01B013/00

CPC classification number: H05K1/0265 ,  C04B37/026 ,  C04B2237/121 ,  C04B2237/126 ,  C04B2237/128 ,  C04B2237/366 ,  C04B2237/402 ,  C04B2237/64 ,  C04B2237/704 ,  C04B2237/706 ,  C23F1/20 ,  H01L21/4867 ,  H01L23/3735 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K1/09 ,  H05K3/067 ,  H05K2201/098 ,  H01L2924/00

Abstract: A metal layer 12 of aluminum or an aluminum alloy is formed on at least one side of a ceramic substrate 10, and a resist 14 having a predetermined shape is formed on the metal layer 12. Then, an etchant of a mixed solution prepared by mixing ferric chloride with water without adding any acids is used for etching and removing an undesired portion of the metal layer 12 to form a metal circuit 12 on the at least one side of the ceramic substrate 10.

Abstract translation: 在陶瓷基板10的至少一侧上形成铝或铝合金的金属层12，在金属层12上形成具有规定形状的抗蚀剂14。然后，将通过混合制成的混合溶液的蚀刻剂 使用氯化铁与水而不添加任何酸，用于蚀刻和去除金属层12的不需要的部分，以在陶瓷基板10的至少一个侧面上形成金属电路12。