公开(公告)号：US08371498B2

公开(公告)日：2013-02-12

申请号：US12143429

申请日：2008-06-20

Applicant: Katsuhiko Tanno

Inventor： Katsuhiko Tanno

IPC: B23K1/20 ,  B23K31/02

CPC classification number: B23K1/20 ,  H01L21/4853 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K3/3452 ,  H05K3/3478 ,  H05K3/4602 ,  H05K2201/094 ,  H05K2201/099 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/0557 ,  H05K2203/1476 ,  H01L2224/05599

Abstract: A method for manufacturing a printed wiring board, the method including forming a solder resist layer having a small-diameter aperture and a large-diameter aperture, each aperture exposing a respective joint pad. A metal ball having a first diameter is mounted in the small-diameter aperture by using a mask for small diameter metal balls, which includes a small-diameter aperture area that corresponds to the small-diameter aperture on the solder resist layer. A metal ball having a second diameter larger than the first diameter is mounted in the large-diameter aperture by using a mask for large diameter metal balls, which includes a large-diameter aperture area that corresponds to the large-diameter aperture on the solder resist layer. A small-diameter bump is formed from the metal ball having a first diameter and a large-diameter bump is formed from the metal ball having a second diameter by heating each of the metal ball with a first diameter and the metal ball with a second diameter to at least their respective reflow temperatures.

Abstract translation: 一种制造印刷电路板的方法，该方法包括形成具有小直径孔径和大直径孔径的阻焊层，每个孔暴露相应的接合垫。 具有第一直径的金属球通过使用用于小直径金属球的掩模安装在小直径孔中，该掩模包括对应于阻焊层上的小直径孔的小直径孔径区域。 通过使用大直径金属球的掩模将大直径大于第一直径的第二直径的金属球安装在大直径孔中，该掩模包括对应于阻焊层上的大直径孔的大直径开口面积 层。 由具有第一直径的金属球形成小直径凸块，并且通过加热具有第一直径的金属球的每个金属球，由具有第二直径的金属球形成大直径凸块，并且具有第二直径的金属球 至少其各自的回流温度。

公开(公告)号：US20120318570A1

公开(公告)日：2012-12-20

申请号：US13163870

申请日：2011-06-20

Applicant: Cheng-Hung Shih ,  Shyh-Jen Guo ,  Wen-Tung Chen

Inventor： Cheng-Hung Shih ,  Shyh-Jen Guo ,  Wen-Tung Chen

IPC: H05K1/00 ,  B23K1/20

CPC classification number: H05K3/4007 ,  H05K3/244 ,  H05K2201/09745 ,  H05K2201/099

Abstract: A bump structure comprises a first polymer block, a second polymer block, a first groove, an under bump metallurgy layer and a connection metal layer, wherein the first polymer block and the second polymer block are individual blocks. The first polymer block comprises a first connection slot, and the second polymer block comprises a second connection slot communicated with the first groove and the first connection slot. The under bump metallurgy layer covers the first polymer block and the second polymer block to form a second groove. The connection metal layer covers the under bump metallurgy layer to form a third groove, wherein the under bump metallurgy layer covers a first coverage area of the first polymer block and a second coverage area of the second polymer block and reveals a first exposure area of the first polymer block and a second exposure area of the second polymer block.

Abstract translation: 凸块结构包括第一聚合物嵌段，第二聚合物嵌段，第一凹槽，凸块下金属层和连接金属层，其中第一聚合物嵌段和第二聚合物嵌段是各自的嵌段。 第一聚合物块包括第一连接槽，第二聚合物块包括与第一槽和第一连接槽连通的第二连接槽。 凸块下金属层覆盖第一聚合物嵌段和第二聚合物嵌段以形成第二凹槽。 所述连接金属层覆盖所述凸块下金属层以形成第三凹槽，其中所述凸块下金属层覆盖所述第一聚合物嵌段的第一覆盖区域和所述第二聚合物嵌段的第二覆盖区域，并且揭示所述第二聚合物嵌段的第一暴露区域 第一聚合物嵌段和第二聚合物嵌段的第二曝光区域。

公开(公告)号：US20120318565A1

公开(公告)日：2012-12-20

申请号：US13595149

申请日：2012-08-27

Applicant: Houssam Jomaa ,  Omar J. Bchir

Inventor： Houssam Jomaa ,  Omar J. Bchir

IPC: H05K1/03

CPC classification number: H05K3/28 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/5387 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1433 ,  H01L2924/15311 ,  H05K1/189 ,  H05K3/0035 ,  H05K3/3452 ,  H05K2201/0162 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/099 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49153 ,  Y10T29/49165 ,  Y10T29/49169 ,  H01L2224/05599

Abstract: A microelectronic device mounting substrate includes a bond pad with a side wall and an upper surface. A dielectric first layer is disposed on the mounting substrate and a solder mask second layer is disposed on the dielectric first layer. A uniform recess is disposed through the solder mask second layer and the dielectric first layer that exposes the portion of the bond pad upper surface.

Abstract translation: 微电子器件安装基板包括具有侧壁和上表面的接合焊盘。 电介质第一层设置在安装基板上，并且焊料掩模第二层设置在电介质第一层上。 通过焊接掩模第二层和暴露接合焊盘上表面的部分的电介质第一层设置均匀的凹部。

公开(公告)号：US20120262231A1

公开(公告)日：2012-10-18

申请号：US13479957

申请日：2012-05-24

Applicant: Mauro SCANDIUZZO ,  Luca Perilli ,  Roberto CANEGALLO

Inventor： Mauro SCANDIUZZO ,  Luca Perilli ,  Roberto CANEGALLO

IPC: H03F3/45 ,  H05K7/06

CPC classification number: H01L23/48 ,  G01R31/3025 ,  H01L23/5223 ,  H01L23/642 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06531 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/13062 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/19015 ,  H01L2924/19041 ,  H05K1/0239 ,  H05K1/0243 ,  H05K1/0245 ,  H05K1/0259 ,  H05K2201/0191 ,  H05K2201/099 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Contactless differential coupling structures can be used to communicate signals between circuits located on separate chips or from one chip to a probing device. The contactless coupling structures avoid problems (breaks, erosion, corrosion) that can degrade the performance of ohmic-type contact pads. The contactless coupling structures comprise pairs of conductive pads placed in close proximity. Differential signals are applied across a first pair of differential pads, and the signals are coupled wirelessly to a mating pair of conductive pads. Circuitry for generating and receiving differential signals is described.

Abstract translation: 非接触式差分耦合结构可以用于在位于单独芯片上或从一个芯片到探测装置的电路之间传送信号。 非接触式耦合结构避免了可能降低欧姆型接触焊盘性能的问题（断裂，侵蚀，腐蚀）。 非接触耦合结构包括靠近放置的一对导电焊盘。 差分信号跨越第一对差分焊盘施加，并且信号被无线地耦合到一对导电焊盘。 描述用于产生和接收差分信号的电路。

公开(公告)号：US08288875B2

公开(公告)日：2012-10-16

申请号：US12749117

申请日：2010-03-29

Applicant: Noriyoshi Shimizu ,  Akio Rokugawa

Inventor： Noriyoshi Shimizu ,  Akio Rokugawa

IPC: H01L23/48 ,  H01L21/04

CPC classification number: H05K3/28 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/16 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15312 ,  H05K3/3452 ,  H05K3/388 ,  H05K2201/0175 ,  H05K2201/0195 ,  H05K2201/099 ,  H05K2203/0577 ,  H01L2224/0401

Abstract: A board on which a wiring having an electrode pad is formed is prepared. A resist film is formed on the board in order to cover the wiring and then the resist film is left on the electrode pad through patterning. An inorganic insulating film is formed on the board in order to cover the wiring and then the resist film is removed, thereby removing the inorganic insulating film provided on the resist film to leave the inorganic insulating film between the wirings. A solder resist layer is formed on the board in order to cover the wiring and then the electrode pad is exposed.

Abstract translation: 制备其上形成有电极焊盘的布线的板。 在板上形成抗蚀剂膜以覆盖布线，然后通过图案化将抗蚀剂膜留在电极焊盘上。 在板上形成无机绝缘膜以覆盖布线，然后除去抗蚀剂膜，从而除去设置在抗蚀剂膜上的无机绝缘膜，以使布线之间的无机绝缘膜离开。 在板上形成阻焊层以覆盖布线，然后暴露电极焊盘。

公开(公告)号：US08233288B2

公开(公告)日：2012-07-31

申请号：US12107454

申请日：2008-04-22

Applicant: Seiji Tokii

Inventor： Seiji Tokii

IPC: H01R9/00

CPC classification number: H01R43/0256 ,  G01N2223/611 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/111 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/09381 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10734 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An electronic component package includes: an insulating carrier substrate; a connection wiring that is provided on one side of the carrier substrate; an IC chip that is connected to the connection wiring; an external connection land that is disposed on the other side of the carrier substrate and is connected to the connection wiring via a wiring in the carrier substrate; and a solder ball that is disposed on the external connection land. A region of the external connection land that can be bonded to the solder ball has an outer shape that includes at least one arc portion and at least one straight portion. With this configuration, it is possible to provide an electronic component mounted apparatus in which bonding failure of the external connection land and the circuit board-side land with the solder ball can be reduced, and the bonding state can be easily inspected, and a method of inspecting a bonding portion therein.

Abstract translation: 电子部件封装包括：绝缘载体基板; 连接布线，其设置在所述载体基板的一侧; 连接到连接线的IC芯片; 外部连接区域，其设置在所述载体基板的另一侧，并且经由所述载体基板中的布线连接到所述连接布线; 以及设置在外部连接台面上的焊球。 可以结合到焊球的外部连接焊盘的区域具有包括至少一个弧形部分和至少一个直线部分的外部形状。 利用这种结构，可以提供一种电子部件安装装置，其中可以减少外部连接焊盘和电路板侧焊盘与焊球的接合故障，并且可以容易地检查接合状态， 检查其中的接合部分。

公开(公告)号：US20120186859A1

公开(公告)日：2012-07-26

申请号：US13353527

申请日：2012-01-19

Applicant: Toru YAMASHITA

Inventor： Toru YAMASHITA

IPC: H05K1/02 ,  H05K3/00

CPC classification number: H05K1/118 ,  H05K1/028 ,  H05K1/0393 ,  H05K1/189 ,  H05K3/28 ,  H05K3/361 ,  H05K3/4691 ,  H05K2201/09481 ,  H05K2201/0969 ,  H05K2201/099

Abstract: A wiring board includes: a substrate; first connection electrode portions which are disposed on a surface of the substrate and which are to be connected to individual-electrode connection terminals of an actuator via first bumps; first wires having electrical continuity with the first connection electrode portions; a second connecting electrode portion which is disposed on the surface of the substrate and which is to be connected to the a common-electrode connection terminal of the actuator via a second bump; and a second wire having electrical continuity with the second connection electrode portion. The second connecting electrode portion is located in an edge portion of the substrate. The second wire has a conducive-material absent portion that is located between an edge of the substrate and the second connecting electrode portion.

Abstract translation: 布线基板包括：基板; 第一连接电极部，其设置在基板的表面上，并且经由第一凸块与致动器的各个电极连接端子连接; 与第一连接电极部分具有电连续性的第一布线; 第二连接电极部，其设置在所述基板的表面上，并且经由第二凸块与所述致动器的公共电极连接端子连接; 以及与所述第二连接电极部分具有导电性的第二导线。 第二连接电极部位于基板的边缘部。 第二线具有位于基板的边缘和第二连接电极部分之间的导电材料缺失部分。

公开(公告)号：US08217403B1

公开(公告)日：2012-07-10

申请号：US13179073

申请日：2011-07-08

Applicant: Shigenobu Sekine ,  Yurina Sekine

Inventor： Shigenobu Sekine ,  Yurina Sekine

IPC: H01L27/15

CPC classification number: H05K1/097 ,  H01L23/49866 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L31/022425 ,  H01L31/0682 ,  H01L33/62 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81395 ,  H01L2224/81903 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8359 ,  H01L2224/83605 ,  H01L2224/83609 ,  H01L2224/83611 ,  H01L2224/83613 ,  H01L2224/83618 ,  H01L2224/83624 ,  H01L2224/83639 ,  H01L2224/83644 ,  H01L2224/83647 ,  H01L2224/83655 ,  H01L2224/8366 ,  H01L2224/83666 ,  H01L2224/83669 ,  H01L2224/83701 ,  H01L2224/83799 ,  H01L2224/83815 ,  H01L2224/83825 ,  H01L2224/83851 ,  H01L2224/83886 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/00011 ,  H01L2924/01327 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1434 ,  H05K1/111 ,  H05K2201/0338 ,  H05K2201/099 ,  Y02E10/547 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/8159 ,  H01L2924/00014 ,  H01L2224/81799 ,  H01L2924/00012 ,  H01L2224/81639 ,  H01L2224/81647 ,  H01L2224/81644 ,  H01L2224/81669 ,  H01L2224/81666 ,  H01L2224/81624 ,  H01L2224/81618 ,  H01L2224/8166 ,  H01L2224/81655 ,  H01L2224/81611 ,  H01L2224/81609 ,  H01L2224/81613 ,  H01L2224/81605 ,  H01L2224/29075

Abstract: An electronic device includes a substrate and an electronic component. The substrate has a metallized trace. The metallized trace has a metallized layer and an insulation layer. The metallized layer has a high melting point metal component and a low melting point metal component, the high melting point metal component and the low melting point metal component being diffusion bonded together. The insulation layer is formed simultaneously with the metallized layer to cover an outer surface of the metallized layer. The electronic component is electrically connected to the metallized layer.

Abstract translation: 电子设备包括基板和电子部件。 衬底具有金属化迹线。 金属化迹线具有金属化层和绝缘层。 金属化层具有高熔点金属成分和低熔点金属成分，高熔点金属成分和低熔点金属成分被扩散接合在一起。 绝缘层与金属化层同时形成以覆盖金属化层的外表面。 电子部件电连接到金属化层。

公开(公告)号：US20120106110A1

公开(公告)日：2012-05-03

申请号：US13306347

申请日：2011-11-29

Applicant: Shinji MORIYAMA ,  Tomio YAMADA

Inventor： Shinji MORIYAMA ,  Tomio YAMADA

IPC: H05K7/02

CPC classification number: H01L23/13 ,  H01L23/10 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/50 ,  H01L23/66 ,  H01L24/48 ,  H01L24/73 ,  H01L25/165 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H03G3/3042 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/183 ,  H05K3/3405 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/099 ,  H05K2201/09909 ,  H05K2201/10371 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A hybrid integrated circuit device having high mount reliability comprises a module substrate which is a ceramic wiring substrate, a plurality of electronic component parts laid out on the main surface of the module substrate, a plurality of electrode terminals laid out on the rear surface of the module substrate, and a cap which is fixed to the module substrate to cover the main surface of the module substrate. The electrode terminals include ones which are aligned along the edges of the module substrate and power voltage supply terminals which are located inner than these electrode terminals. The electrode terminals aligned along the substrate edges are coated, at least in their portions close to the substrate edge, with a protection film having a thickness of several tens micrometers or less. Connection reinforcing terminals consist of a plurality of divided terminals which are independent of each other, and are ground terminals.

公开(公告)号：US20120080400A1

公开(公告)日：2012-04-05

申请号：US13315821

申请日：2011-12-09

Applicant: Sho AKAI ,  Tatsuya Imai ,  Iku Tokihisa

Inventor： Sho AKAI ,  Tatsuya Imai ,  Iku Tokihisa

IPC: H05K3/46

CPC classification number: H05K3/3452 ,  H05K3/244 ,  H05K3/389 ,  H05K3/4644 ,  H05K2201/099 ,  H05K2203/025

Abstract: A multilayer printed wiring board including a first interlayer resin insulation layer, a pad formed on the first interlayer resin insulation layer, a solder resist layer formed on the first interlayer resin insulation layer and the pad, a protective film formed on a portion of the pad exposed by an opening of the solder resist layer, and a coating layer formed between the pad and the solder resist layer. The pad mounts an electronic component. The coating layer has a metal layer and a coating film. The metal layer is formed on the surface of the pad and the coating film is formed on the metal layer.

Abstract translation: 一种多层印刷线路板，包括第一层间树脂绝缘层，形成在第一层间树脂绝缘层上的焊盘，形成在第一层间树脂绝缘层上的阻焊层和焊盘，形成在焊盘的一部分上的保护膜 由阻焊层的开口暴露，以及形成在焊盘和阻焊层之间的涂层。 垫安装电子元件。 涂层具有金属层和涂膜。 金属层形成在焊盘的表面上，涂膜形成在金属层上。