公开(公告)号：US10288791B2

公开(公告)日：2019-05-14

申请号：US15238084

申请日：2016-08-16

Applicant: APACER TECHNOLOGY INC.

Inventor： Hua-Min Tseng ,  Ming-Han Chung ,  Wen-Chin Wu ,  Chien-Pang Chen

IPC: F21V33/00 ,  F21V8/00 ,  F21Y115/10 ,  F21W111/10

Abstract: An expansion card with homogenized light outputs and light-homogenizing device thereof are disclosed. The expansion card includes a circuit board and a light-homogenizing device. The circuit board includes a light-emitting device disposed on a first side edge. The light-homogenizing device includes a light-guiding body, a light-diffusion element, and a light-turning element. The light-guiding body includes a light-input side and a light-output side opposite to each other, and the light-input side is adjacent to the first side edge. The light-diffusion element is disposed on the light-input side of the light-guiding body and opposite to the light-emitting device. The light-diffusion element and the light-out side are configured to diffuse the light beams entering into the light-guiding body from the light-emitting device and form a light-transmitting path. The light-turning element is disposed in the light-guiding body, located on the light-transmitting path and configured to turn the directions of portion of the light beams.

公开(公告)号：US10162723B2

公开(公告)日：2018-12-25

申请号：US15398088

申请日：2017-01-04

Applicant: APACER TECHNOLOGY INC.

Inventor： Jiunn-Chang Lee ,  Hung-Wen Pan

IPC: G06F1/32 ,  G06F11/30 ,  G06F13/32 ,  G06F13/42 ,  G06F13/40

Abstract: An electronic card and a detecting method are provided. The electronic card includes a connector. The detecting method detects whether an output signal from a host is received by Pin 41, Pin 43, Pin 47 and Pin 49 of the connector, or Pin 29, Pin 31, Pin 35 and Pin 37 of the connector, or Pin 17, Pin 19, Pin 23 and Pin 25 of the connector, or Pin 5, Pin 7, 11 and Pin 13 of the connector. According to the detecting result and the output signal, the electronic card judges the communication protocol of the host is a SATA communication protocol, a PCIe communication protocol or a USB3.0 communication protocol.

公开(公告)号：US20170185537A1

公开(公告)日：2017-06-29

申请号：US15014198

申请日：2016-02-03

Applicant: APACER TECHNOLOGY INC.

Inventor： YIN-CHUAN LIAO ,  ZONG-HAN YANG

IPC: G06F12/14 ,  G06F3/06

CPC classification number: G06F12/1458 ,  G06F3/0622 ,  G06F3/0637 ,  G06F3/064 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/1052 ,  G06F2212/7201

Abstract: A data storage device includes a physical storage unit, an authentication unit and a control unit. The authentication unit has a unique identification code. The control unit is electrically connected with the physical storage unit and configured to receive an identification command corresponding to the unique identification code. When the control unit receives the identification command, the control unit generates a logical block starting address and an available space according to the identification command, and determines a specified physical accessing block of plural physical accessing blocks of the physical storage unit according to the logical block starting address and the available space. The logical block starting address is a positive integer. In addition, a size of the physical accessing block is smaller than or equal to a size of the physical storage unit.

公开(公告)号：US20170090782A1

公开(公告)日：2017-03-30

申请号：US14942630

申请日：2015-11-16

Applicant: APACER TECHNOLOGY INC.

Inventor： Jiunn-Chang Lee

IPC: G06F3/06 ,  G06F12/10 ,  G06F12/02

CPC classification number: G06F3/0616 ,  G06F3/061 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/1009 ,  G06F2212/1044 ,  G06F2212/2022 ,  G06F2212/7201

Abstract: A writing management method and a writing management system for a solid state drive are provided. The writing management method includes the following steps. Firstly, plural write commands are transmitted to a firmware so as to write at least one data to the solid state drive, wherein each of the plural write commands contains a logical block address and a sector count. Then, the logical block addresses and the sector counts of the plural write commands are sequentially stored to the firmware. Then, an application program sequentially reads the logical block addresses and the sector counts. Then, a sequential write ratio is determined according to the logical block addresses and the sector counts. Afterwards, the application program updates the firmware to a first firmware according to the sequential write ratio.

公开(公告)号：US20150370487A1

公开(公告)日：2015-12-24

申请号：US14526011

申请日：2014-10-28

Applicant: APACER TECHNOLOGY INC.

Inventor： Jiunn-Chang Lee

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0608 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/0638 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/2022 ,  G06F2212/214 ,  G06F2212/2532 ,  G06F2212/261 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7204 ,  G06F2212/7208

Abstract: A storage device is connected with a host. The storage device includes a control module, a first storage module and a second storage module. The first storage module having a first storage region and a second storage region is connected with the control module. The second storage module is connected with the control module. To-be-accessed data are stored and read in the first storage region or the second storage region of the first storage module by the control module. The to-be-accessed data stored and read in the first storage region are correspondingly stored and read in the second storage module by the control module, so that the second storage region is exclusively used for temporary storage of data, the storage modules are effectively utilized, and the lifetime decrease of the storage device is avoided.

Abstract translation: 存储设备与主机连接。 存储装置包括控制模块，第一存储模块和第二存储模块。 具有第一存储区域和第二存储区域的第一存储模块与控制模块连接。 第二个存储模块与控制模块相连。 被访问的数据由控制模块存储和读取在第一存储模块的第一存储区域或第二存储区域中。 在第一存储区域中存储和读取的要访问的数据由控制模块相应地存储在第二存储模块中，从而第二存储区域专门用于数据的临时存储，存储模块有效地 并且避免了存储装置的寿命减少。

公开(公告)号：US09128575B2

公开(公告)日：2015-09-08

申请号：US13846628

申请日：2013-03-18

Applicant: APACER TECHNOLOGY INC.

Inventor： Yu-Hsuan Lee

IPC: G06F3/044 ,  H04N21/422 ,  G06F3/0488

CPC classification number: G06F3/044 ,  G06F3/04883 ,  G06F2203/0383 ,  H04N21/42224 ,  H04N21/42227

Abstract: An intelligent input method and intelligent input system are disclosed. The intelligent input system includes an electronic device and an input device. The intelligent input method comprises the following steps. Firstly, a touch input is received through an input interface of an input device. Then, plural control areas on the input interface are defined according to a touch position of the touch input on the input interface. The plural control areas are respectively correlated with plural input functions of the input device. The intelligent input method allows the user to input or select a target object or browse a web page or operate any graphical user interface containing randomly-distributed objects in an electronic device such as an intelligent TV or a digital multimedia player. Consequently, the target object can be selected and inputted in an intelligent, quick and intuitive manner.

Abstract translation: 公开了一种智能输入法和智能输入系统。 智能输入系统包括电子设备和输入设备。 智能输入法包括以下步骤： 首先，通过输入设备的输入接口接收触摸输入。 然后，根据输入接口上的触摸输入的触摸位置来定义输入接口上的多个控制区域。 多个控制区域分别与输入装置的多个输入功能相关联。 智能输入方法允许用户输入或选择目标对象或浏览网页，或者操作包含诸如智能电视或数字多媒体播放器的电子设备中的随机分布的物体的任何图形用户界面。 因此，可以以智能，快速和直观的方式选择和输入目标对象。

公开(公告)号：US20240354009A1

公开(公告)日：2024-10-24

申请号：US18614057

申请日：2024-03-22

Applicant: Apacer Technology Inc.

Inventor： Jiunn-Chang Lee

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0673

Abstract: A computer system is provided. The computer system includes a data storage device having a controller and a data storage unit connected to the controller, wherein the controller includes a firmware which defines a backup and recovery operation, and the data storage unit includes a first storage sector and a second storage sector. The first storage sector stores a backup file and has a resident program installed therein. The resident program is executed after the computer system is normally booted for periodically transmitting a handshake instruction to perform a handshaking with the controller. When the computer system is booted and a preset number that the controller does not receive the handshake instruction is reached within a preset time period, the firmware executes the backup and recovery operation to restore the backup file in the first storage sector through a cooperation between the first storage sector and the second storage sector.

公开(公告)号：US20200375064A1

公开(公告)日：2020-11-26

申请号：US16739238

申请日：2020-01-10

Applicant: APACER TECHNOLOGY INC.

Inventor： Chien-Pang CHEN ,  Min-Lung LIN ,  Chih-Hung KUO ,  Sung-Yu TSAI

IPC: H05K7/20 ,  G06F1/20

Abstract: A solid-state drive (SSD) heat dissipation device is disclosed. The SSD heat dissipation device comprises a solid-state drive substrate, a chip heat dissipation component, a memory heat dissipation component, and a spacer. A control IC and a flash memory are disposed on the solid-state drive substrate, the chip heat dissipation component is disposed on the control IC, and the memory heat dissipation component is disposed on the flash memory. The chip heat dissipation component and the memory heat dissipation component are disposed separately.

公开(公告)号：US10395696B1

公开(公告)日：2019-08-27

申请号：US16161699

申请日：2018-10-16

Applicant: APACER TECHNOLOGY INC.

Inventor： Yung-Chih Wu ,  Rui-Cheng Lin

IPC: G11C5/04 ,  G11C7/10 ,  G11C5/02

Abstract: A double data rate memory includes a circuit board, a goldfinger connection interface, at least 16 first IC chips, at least 16 second IC chips, a first and a second read-only memory. The circuit board has a first surface, a second surface, a first region and a second region. The first IC chips are disposed on the first surface. The second IC chips are disposed on the second surface. The first read-only memory is connected with the first and the second IC chips disposed on the first region. The second read-only memory is connected with the first and the second IC chips disposed on the second region. 10 pins of the goldfinger connection interface are connected with the second read-only memory and the first and the second IC chips disposed on the second region to make them operate. At least 32 IC chips are effectively operated in single one memory.

公开(公告)号：US20190121551A1

公开(公告)日：2019-04-25

申请号：US15859060

申请日：2017-12-29

Applicant: Apacer Technology Inc.

Inventor： Jiunn-Chang LEE ,  Yin-Chuan LIAO

IPC: G06F3/06

CPC classification number: G06F3/0616 ,  G06F3/064 ,  G06F3/0661 ,  G06F3/0679 ,  G11C16/14 ,  G11C16/16 ,  G11C16/3445 ,  G11C16/3495 ,  G11C17/14 ,  G11C2211/5641 ,  G11C2211/5644 ,  G11C2216/26

Abstract: The present disclosure illustrates a method of extending a lifetime of a solid state disk (SSD). The SSD includes a flash memory which is a multi-level cell (MLC) flash memory. The method includes steps of: setting a number of logic blocks of the SSD to be one-half of a number of physical blocks of the flash memory; reading, by a control unit of the SSD, a write/erase times of each of the physical blocks of the flash memory; and converting the physical block, of which a number of the write/erase times exceeds an upper limit of the write/erase times, from a multi-level storage format to a single-level storage format. A number of the logic blocks is a constant value.