Substrates for Electronic Circuitry Type Applications
    20.
    发明申请
    Substrates for Electronic Circuitry Type Applications 审中-公开
    电子电路类型应用基板

    公开(公告)号:US20100263919A1

    公开(公告)日:2010-10-21

    申请号:US12086296

    申请日:2006-12-28

    Abstract: An electronic type substrate having 40 to 97 weight-percent polymer and 3 to 60 weight-percent auto-catalytic crystalline filler. An interconnect or a conductor trace is created in the substrate by: i. drilling or ablating with a high energy electromagnetic source, such as a laser, thereby selectively activating the multi cation crystal filler along the surface created by the drilling or ablating step; and ii. metalizing by electroless and/or electrolytic plating into the drilled or ablated portion of the substrate, where the metal layer is formed in a contacting relationship with the activated multi cation crystal filler at the interconnect boundary without a need for a separate metallization seed layer or pre-dip.

    Abstract translation: 具有40至97重量%聚合物和3至60重量%自催化结晶填料的电子型基材。 通过以下方式在衬底中形成互连或导体迹线:i。 用诸如激光器的高能电磁源进行钻孔或烧蚀,从而沿着由钻孔或烧蚀步骤产生的表面选择性地激活多阳离子晶体填料; 和ii。 通过无电镀和/或电解电镀金属化到衬底的钻孔或烧蚀部分中,其中金属层在互连边界处与活化的多阳离子晶体填料形成接触关系,而不需要单独的金属化种子层或预先 -蘸。

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