公开(公告)号：US07659150B1

公开(公告)日：2010-02-09

申请号：US11716156

申请日：2007-03-09

Applicant: Pezhman Monadgemi ,  Roger T. Howe ,  Emmanuel P. Quevy

Inventor： Pezhman Monadgemi ,  Roger T. Howe ,  Emmanuel P. Quevy

IPC: H01L21/00

CPC classification number: H01L23/10 ,  B81B2207/012 ,  B81C1/00293 ,  B81C2203/0136 ,  B81C2203/0145 ,  H01L23/26 ,  H01L2924/0002 ,  H01L2924/13091 ,  H01L2924/3011 ,  H01L2924/00

Abstract: Microshells for encapsulation of devices such as MEMS and microelectronics. In an embodiment, the microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation as a function of the dimension of the perforation to form cavities having different vacuum levels on the same substrate.

Abstract translation: 用于封装MEMS和微电子等器件的微型外壳。 在一个实施例中，微壳包括平面穿孔的预密封层，在其下面存取非平面牺牲层，以及密封层，用于在去除牺牲材料之后封闭预密封层中的穿孔。 密封层可以包括非密封层，以物理地闭塞穿孔，并且在非密封闭塞层上方形成密封层，以密封穿孔，作为穿孔尺寸的函数，以在同一基底上形成具有不同真空度的空腔。

公开(公告)号：US07595209B1

公开(公告)日：2009-09-29

申请号：US11716233

申请日：2007-03-09

Applicant: Pezhman Monadgemi ,  Emmanuel P. Quevy ,  Roger T. Howe

Inventor： Pezhman Monadgemi ,  Emmanuel P. Quevy ,  Roger T. Howe

IPC: H01L21/56 ,  H01L21/50

CPC classification number: B81C1/0023 ,  B81B7/0054 ,  B81C2201/0167 ,  B81C2203/0136 ,  B81C2203/0145 ,  H01L21/568 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: Multi-layered, planar microshells having low stress for encapsulation of devices such as MEMS and microelectronics. The microshells may include a perforated pre-sealing layer, below which a sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. The sealing layer may further include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. The various layers may be formed employing processes having opposing stresses to tune the residual stress of the multi-layered microshell. In an embodiment, the hermetic layer is a metal which is deposited with a process tuned to impart a tensile stress to lower the residual stress in the microshell below the magnitude of cumulative stress present in sealing layer and pre-sealing layer.

Abstract translation: 具有低应力的多层平面微壳体，用于诸如MEMS和微电子器件的封装。 微壳可以包括穿孔的预密封层，在其下方存取牺牲层，以及密封层，用于在去除牺牲材料之后封闭预密封层中的穿孔。 密封层还可以包括非密封层，以物理地封闭穿孔，并且在非密封闭塞层上方形成密封层以密封穿孔。 可以使用具有相反应力的工艺来形成各个层，以调节多层微壳的残余应力。 在一个实施例中，密封层是金属，其沉积有被调整以赋予拉伸应力的工艺，以将微壳中的残余应力降低到低于存在于密封层和预密封层中的累积应力的大小。

公开(公告)号：US07256107B2

公开(公告)日：2007-08-14

申请号：US11121690

申请日：2005-05-03

Applicant: Hideki Takeuchi ,  Emmanuel P. Quevy ,  Tsu-Jae King ,  Roger T. Howe

Inventor： Hideki Takeuchi ,  Emmanuel P. Quevy ,  Tsu-Jae King ,  Roger T. Howe

IPC: H01L21/46 ,  H01L21/78 ,  H01L21/301

CPC classification number: B81C1/00142 ,  B81B2201/0271 ,  B81C2201/0109 ,  Y10S438/933

Abstract: In fabricating a microelectromechanical structure (MEMS), a method of forming a narrow gap in the MEMS includes a) depositing a layer of sacrificial material on the surface of a supporting substrate, b) photoresist masking and at least partially etching the sacrificial material to form at least one blade of sacrificial material, c) depositing a structural layer over the sacrificial layer, and d) removing the sacrificial layer including the blade of the sacrificial material with a narrow gap remaining in the structural layer where the blade of sacrificial material was removed.

Abstract translation: 在制造微机电结构（MEMS）中，在MEMS中形成窄间隙的方法包括：a）在支撑衬底的表面上沉积牺牲材料层，b）光致抗蚀剂掩模并且至少部分蚀刻牺牲材料以形成 至少一个牺牲材料刀片，c）在所述牺牲层上沉积结构层，以及d）去除包括所述牺牲材料刀片的所述牺牲层，其中所述牺牲材料刀片被去除的所述结构层中残留有窄间隙 。

公开(公告)号：US07211926B2

公开(公告)日：2007-05-01

申请号：US11361814

申请日：2006-02-23

Applicant: Emmanuel P. Quevy ,  Roger T. Howe

Inventor： Emmanuel P. Quevy ,  Roger T. Howe

IPC: H03B28/00 ,  H03B5/04

CPC classification number: G01K7/32 ,  G04G3/04 ,  H03H9/02448 ,  H03H9/2473 ,  H03H2009/02496

Abstract: Disclosed is an oscillator that relies on redundancy of similar resonators integrated on chip in order to fulfill the requirement of one single quartz resonator. The immediate benefit of that approach compared to quartz technology is the monolithic integration of the reference signal function, implying smaller devices as well as cost and power savings.

Abstract translation: 公开了一种振荡器，其依赖于集成在芯片上的类似谐振器的冗余，以满足一个单个石英谐振器的要求。 与石英技术相比，该方法的直接好处是参考信号功能的单一集成，意味着较小的器件以及成本和功率节省。

公开(公告)号：US08427251B2

公开(公告)日：2013-04-23

申请号：US11691330

申请日：2007-03-26

Applicant: Emmanuel P. Quevy ,  Roger T. Howe

Inventor： Emmanuel P. Quevy ,  Roger T. Howe

IPC: H03B5/30

CPC classification number: G01K7/32 ,  G04G3/04 ,  H03H9/02448 ,  H03H9/2473 ,  H03H2009/02496

Abstract: Disclosed is an oscillator that relies on redundancy of similar resonators integrated on chip in order to fulfill the requirement of one single quartz resonator. The immediate benefit of that approach compared to quartz technology is the monolithic integration of the reference signal function, implying smaller devices as well as cost and power savings.

Abstract translation: 公开了一种振荡器，其依赖于集成在芯片上的类似谐振器的冗余，以满足一个单个石英谐振器的要求。 与石英技术相比，该方法的直接好处是参考信号功能的单一集成，意味着较小的器件以及成本和功率节省。

公开(公告)号：US20120229220A1

公开(公告)日：2012-09-13

申请号：US11691330

申请日：2007-03-26

Applicant: Emmanuel P. Quevy ,  Roger T. Howe

Inventor： Emmanuel P. Quevy ,  Roger T. Howe

IPC: H03B21/01 ,  G01K11/26

CPC classification number: G01K7/32 ,  G04G3/04 ,  H03H9/02448 ,  H03H9/2473 ,  H03H2009/02496

Abstract: Disclosed is an oscillator that relies on redundancy of similar resonators integrated on chip in order to fulfill the requirement of one single quartz resonator. The immediate benefit of that approach compared to quartz technology is the monolithic integration of the reference signal function, implying smaller devices as well as cost and power savings.

Abstract translation: 公开了一种振荡器，其依赖于集成在芯片上的类似谐振器的冗余，以满足一个单个石英谐振器的要求。 与石英技术相比，该方法的直接好处是参考信号功能的单一集成，意味着较小的器件以及成本和功率节省。

公开(公告)号：US20120171798A1

公开(公告)日：2012-07-05

申请号：US11737545

申请日：2007-04-19

Applicant: Hideki Takeuchi ,  Emmanuel P. Quevy ,  Tsu-Jae King ,  Roger T. Howe

Inventor： Hideki Takeuchi ,  Emmanuel P. Quevy ,  Tsu-Jae King ,  Roger T. Howe

IPC: H01L21/02

CPC classification number: B81C1/00142 ,  B81B2201/0271 ,  B81C2201/0109 ,  Y10S438/933

Abstract: In fabricating a microelectromechanical structure (MEMS), a method of forming a narrow gap in the MEMS includes a) depositing a layer of sacrificial material on the surface of a supporting substrate, b) photoresist masking and at least partially etching the sacrificial material to form at least one blade of sacrificial material, c) depositing a structural layer over the sacrificial layer, and d) removing the sacrificial layer including the blade of the sacrificial material with a narrow gap remaining in the structural layer where the blade of sacrificial material was removed.

Abstract translation: 在制造微机电结构（MEMS）中，在MEMS中形成窄间隙的方法包括：a）在支撑衬底的表面上沉积牺牲材料层，b）光致抗蚀剂掩模并且至少部分蚀刻牺牲材料以形成 至少一个牺牲材料刀片，c）在所述牺牲层上沉积结构层，以及d）去除包括所述牺牲材料刀片的所述牺牲层，其中所述牺牲材料刀片被去除的所述结构层中残留有窄间隙 。

公开(公告)号：US20110121412A1

公开(公告)日：2011-05-26

申请号：US13017844

申请日：2011-01-31

Applicant: Emmanuel P. Quevy ,  Pezhman Monadgemi ,  Roger T. Howe

Inventor： Emmanuel P. Quevy ,  Pezhman Monadgemi ,  Roger T. Howe

IPC: H01L29/84 ,  H01L21/04

CPC classification number: B81C1/00293 ,  B81B7/02 ,  B81C1/00246 ,  B81C2203/0136 ,  B81C2203/0145 ,  B81C2203/0721 ,  B81C2203/0735 ,  B81C2203/0771

Abstract: Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. In an embodiment, the pre-sealing layer has perforations formed with a damascene process to be self-aligned to the chamber below the microshell. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. In a particular embodiment, the hermetic layer is a metal which is electrically coupled to a conductive layer adjacent to the microshell to electrically ground the microshell.

公开(公告)号：US07923790B1

公开(公告)日：2011-04-12

申请号：US11716070

申请日：2007-03-09

Applicant: Emmanuel P. Quevy ,  Pezhman Monadgemi ,  Roger T. Howe

Inventor： Emmanuel P. Quevy ,  Pezhman Monadgemi ,  Roger T. Howe

IPC: H01L29/84

CPC classification number: B81C1/00293 ,  B81B7/02 ,  B81C1/00246 ,  B81C2203/0136 ,  B81C2203/0145 ,  B81C2203/0721 ,  B81C2203/0735 ,  B81C2203/0771

Abstract: Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. In an embodiment, the pre-sealing layer has perforations formed with a damascene process to be self-aligned to the chamber below the microshell. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. In a particular embodiment, the hermetic layer is a metal which is electrically coupled to a conductive layer adjacent to the microshell to electrically ground the microshell.

Abstract translation: 用于MEMS和微电子等器件封装的低温多层平面微型壳体。 微壳包括平面穿孔的预密封层，在其下面接近非平面牺牲层，以及密封层，用于在去除牺牲材料之后封闭预密封层中的穿孔。 在一个实施例中，预密封层具有形成有镶嵌工艺的穿孔，以与微壳下方的腔室自对准。 密封层可以包括非密封层，以物理地封闭穿孔，并且在非密封闭塞层上方具有密封层以密封穿孔。 在特定实施例中，密封层是金属，其电耦合到与微壳相邻的导电层，以电微接地微壳。

公开(公告)号：US07858422B1

公开(公告)日：2010-12-28

申请号：US11716227

申请日：2007-03-09

Applicant: Emmanuel P. Quevy ,  Roger T. Howe

Inventor： Emmanuel P. Quevy ,  Roger T. Howe

IPC: H01L21/00

CPC classification number: B81C1/00039 ,  B81B2201/0271

Abstract: A MEMS coupler and a method to form a MEMS structure having such a coupler are described. In an embodiment, a MEMS structure comprises a member and a substrate. A coupler extends through a portion of the member and connects the member with the substrate. The member is comprised of a first material and the coupler is comprised of a second material. In one embodiment, the first and second materials are substantially the same. In one embodiment, the second material is conductive and is different than the first material. In another embodiment, a method for fabricating a MEMS structure comprises first forming a member above a substrate. A coupler comprised of a conductive material is then formed to connect the member with the substrate.

Abstract translation: 描述了MEMS耦合器和形成具有这种耦合器的MEMS结构的方法。 在一个实施例中，MEMS结构包括构件和衬底。 耦合器延伸穿过构件的一部分并将构件与衬底连接。 该构件由第一材料构成，并且该耦合器由第二材料构成。 在一个实施例中，第一和第二材料基本相同。 在一个实施例中，第二材料是导电的并且不同于第一材料。 在另一个实施例中，一种用于制造MEMS结构的方法包括首先在衬底上形成构件。 然后形成由导电材料构成的耦合器，以将该构件与衬底连接。