公开(公告)号：US20180343006A1

公开(公告)日：2018-11-29

申请号：US15990034

申请日：2018-05-25

Applicant: Indian Institute of Science

Inventor： Shubhadeep Bhattacherjee ,  Kolla Lakshmi Ganapathi ,  Sangeneni Mohan ,  Navakanta Bhat

IPC: H03K17/687 ,  H01L29/78 ,  H01L29/47 ,  H01L29/739 ,  H01L29/772 ,  H01L29/49 ,  H01L29/51 ,  H01L29/24 ,  H01L29/66

CPC classification number: H03K17/687 ,  H01L29/24 ,  H01L29/47 ,  H01L29/495 ,  H01L29/517 ,  H01L29/66969 ,  H01L29/7391 ,  H01L29/7722 ,  H01L29/7831 ,  H01L29/7839 ,  H01L29/786 ,  H03K2017/6878 ,  H03K2217/0018

Abstract: The field effect transistor (FET) of the present subject matter comprises a bottom gate electrode, a bottom gate dielectric provided on the bottom gate electrode, a channel layer provided on the bottom gate dielectric. A top portion comprising a source electrode, a drain electrode, a top gate electrode provided, and a top dielectric layer is provided on the channel layer. The channel layer forms Schottky barriers at points of contact with the source and the drain electrode. A back-gate voltage varies a height and a top-gate voltage varies a width of the Schottky barrier. The FET can be programmed to work in two operating modes-tunnelling (providing low power consumption) and thermionic mode (providing high performance). The FET can also be programmed to combine the tunnelling and thermionic mode in a single operating cycle, yielding high performance with low power consumption.

公开(公告)号：US12265046B2

公开(公告)日：2025-04-01

申请号：US17398169

申请日：2021-08-10

Applicant: INDIAN INSTITUTE OF SCIENCE

Inventor： Neha Sakhuja ,  Ravindra Kumar Jha ,  Ranajit Sai ,  Navakanta Bhat

IPC: G01N27/12 ,  C23C26/00 ,  H01L21/02 ,  H01L29/06 ,  H01L29/267

Abstract: An example heterostructure semiconductor for sensing a gas comprises a substrate made of nanosheets of a compound of a first metal, wherein the compound of the first metal is sensitive to the gas to be sensed; one or more 1-Dimensional (1D) components fabricated on a surface of the substrate, the 1D components comprising a compound of a second metal, wherein the compound of the second metal is selective to the gas to be sensed; and a 2-Dimensional (2D) layer formed on the surface of the substrate in portions excluding the 1D components, wherein the 2D layer comprises compounds of the first and second metal. Method of fabrication of the heterostructure semiconductor and a chemiresistive sensor made thereof are also disclosed.

公开(公告)号：US20210199612A1

公开(公告)日：2021-07-01

申请号：US16755344

申请日：2018-10-10

Applicant: Indian Institute of Science

Inventor： Chandra Shekhar Prajapati ,  Navakanta Bhat

IPC: G01N27/18

Abstract: Nano-sensors, nano-sensor array and methods of fabrication thereof are provided. A nano-sensor comprises a pair of sensing electrode assemblies aligned longitudinally along a first axis. Each sensing electrode assembly comprises an electrode strip coupled to a contact pad at a first end of the electrode strip. A sensing member is disposed between the pair of sensing electrode assemblies to detect, at a predetermined temperature, presence of a gaseous component. A thermally conductive layer is provided in contact with the sensing member. The nano-sensor comprises a heating assembly, comprising a heating strip disposed between and coupled to a pair of heating contact pads, aligned longitudinally along a second axis substantially perpendicular to the first axis. A portion of the heating strip is in contact with the thermally conductive layer to heat the sensing member through the thermally conductive layer.

公开(公告)号：US20200334587A1

公开(公告)日：2020-10-22

申请号：US16957371

申请日：2018-12-24

Applicant: Indian Institute of Science (IISc), Bengaluru

Inventor： Sanjeev Kumar Shrivastava ,  Srinivasarao Ajjampur Shivashankar ,  Navakanta Bhat

IPC: G06Q10/02 ,  H04L29/06 ,  G06F3/0482

Abstract: The invention discloses a system and method for a web-based reservation of geographically dispersed facilities. The system comprises a user registration unit configured to receive information to register a user and to provide an unique login ID to the user to generate a registered user, a user requisition unit configured to receive a requisition from the registered user to schedule a reservation for use of facilities, wherein the requisition from the registered user comprises at least one parameter selected from a date, a time slot, a location, and the facility, a centralized management unit configured to determine a list of available facility by comparing the requisition from the registered user to a database, a reservation display unit configured to present to the registered user the list of available facility along with details of the facility and receive from the registered user a selection of the facility sought by the registered user from the list of available facilities, wherein the details of the chosen facility comprises at least one of the following: location details, an available time for use, booking status, and the associated cost, and a reservation scheduling unit configured to schedule a reservation of the selected/desired facility based from the list of available facility made by the registered user. A method for web-based sharing and efficient use of at least one geographically dispersed facility is also described.

公开(公告)号：US10411695B2

公开(公告)日：2019-09-10

申请号：US15990034

申请日：2018-05-25

Applicant: Indian Institute of Science

Inventor： Shubhadeep Bhattacharjee ,  Kolla Lakshmi Ganapathi ,  Sangeneni Mohan ,  Navakanta Bhat

IPC: H03K17/687 ,  H01L29/78 ,  H01L29/47 ,  H01L29/739 ,  H01L29/772 ,  H01L29/51 ,  H01L29/24 ,  H01L29/66 ,  H01L29/49 ,  H01L29/786

Abstract: The field effect transistor (FET) of the present subject matter comprises a bottom gate electrode, a bottom gate dielectric provided on the bottom gate electrode, a channel layer provided on the bottom gate dielectric. A top portion comprising a source electrode, a drain electrode, a top gate electrode provided, and a top dielectric layer is provided on the channel layer. The channel layer forms Schottky barriers at points of contact with the source and the drain electrode. A back-gate voltage varies a height and a top-gate voltage varies a width of the Schottky barrier. The FET can be programmed to work in two operating modes-tunnelling (providing low power consumption) and thermionic mode (providing high performance). The FET can also be programmed to combine the tunnelling and thermionic mode in a single operating cycle, yielding high performance with low power consumption.

公开(公告)号：US20170241996A1

公开(公告)日：2017-08-24

申请号：US15509460

申请日：2015-09-01

Applicant: INDIAN INSTITUTE OF SCIENCE

Inventor： Vinay Kumar ,  Navakanta Bhat

IPC: G01N33/543 ,  G01N27/327 ,  G01N33/68

CPC classification number: G01N33/5438 ,  G01N27/327 ,  G01N27/3277 ,  G01N33/566 ,  G01N33/6827 ,  G01N2333/76 ,  G01N2333/765

Abstract: An electrochemically active device for collecting and retaining a biological sample with a bioanalyte, the device provided with at least a two-electrode member and an albumin-binding and an electrochemically active receptor in chemical contact with the two-electrode members and the biological sample. The present invention also provides a point-of-care biosensor with the device of the present invention and a method for measuring a bioanalyte in a biological sample. The device, point-of-care biosensor and the method of the present invention facilitate accurate measurements concentrations of urine albumin, human serum albumin (HSA), glycated albumin (GA) and methemalbumin (MHA) by determining redox current values in reduced volumes of biological samples.

公开(公告)号：US09741656B2

公开(公告)日：2017-08-22

申请号：US14441329

申请日：2013-10-30

Applicant: INDIAN INSTITUTE OF SCIENCE

Inventor： Ranajit Sai ,  Srinivasarao Ajjampur Shivshankar ,  Navakanta Bhat ,  Vinoy Kalarickaparambil Joseph

IPC: H01L23/522 ,  H01L23/66 ,  H01L49/02 ,  H01L23/64

CPC classification number: H01L23/5227 ,  H01L23/5223 ,  H01L23/5228 ,  H01L23/645 ,  H01L23/66 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/1421 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00

Abstract: The present invention provides a high-frequency integrated device, comprising a substrate including at least an on-chip active and passive member and a ferrite layer bonded to the substrate through an interfacial bridge and substantially wrapping plurality of surfaces of said at least on-chip active and passive members. The present invention also provides a system incorporating the high-frequency integrated device of the present invention. The present invention further provides a process for the preparation of the high-frequency integrated device.

公开(公告)号：US09297671B2

公开(公告)日：2016-03-29

申请号：US14842502

申请日：2015-09-01

Applicant: INDIAN INSTITUTE OF SCIENCE

Inventor： Bharadwaj Amrutur ,  Navakanta Bhat

IPC: G01R27/26 ,  G01D5/24 ,  G06F3/01 ,  G06F3/041

CPC classification number: G01D5/24 ,  G06F3/016 ,  G06F3/0416

Abstract: A device and method for area sensing and actuation comprises highly scalable sensing and actuation network that can control a high density of sensing and actuation elements over a physical area. The device comprises a matrix of CMOS sensing chips that each comprise a plurality of sensing electrodes arranged in a matrix of columns and rows along horizontal wires and vertical wires. The vertical wires carry an activation signal to activate a column of sensing electrodes, and the vertical wires carry sensing and actuation signals between the column of sensing electrodes and a processing chip. The signals may be amplified by CMOS sensing chips between the source and destination of the signals. In this way, signals may be received from and sent to a dense matrix of sensing electrodes spanning a large geographic area with little or no degradation.

公开(公告)号：US20150287658A1

公开(公告)日：2015-10-08

申请号：US14441329

申请日：2013-10-30

Applicant: INDIAN INSTITUTE OF SCIENCE

Inventor： Ranajit Sai ,  Srinivasarao Ajjampur Shivshankar ,  Navakanta Bhat ,  Vinoy Kalarickaparambil Joseph

IPC: H01L23/29 ,  H01L21/56 ,  H01L23/66

CPC classification number: H01L23/5227 ,  H01L23/5223 ,  H01L23/5228 ,  H01L23/645 ,  H01L23/66 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/1421 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00

Abstract: The present invention provides a high-frequency integrated device, comprising a substrate including at least an on-chip active and passive member and a ferrite layer bonded to the substrate through an interfacial bridge and substantially wrapping plurality of surfaces of said at least on-chip active and passive members. The present invention also provides a system incorporating the high-frequency integrated device of the present invention. The present invention further provides a process for the preparation of the high-frequency integrated device.

Abstract translation: 本发明提供了一种高频集成器件，包括至少片上有源和无源器件的衬底和通过界面桥接到衬底的铁氧体层，并基本上包裹所述至少片上的多个表面 主动和被动的成员。 本发明还提供了结合本发明的高频一体化装置的系统。 本发明还提供了一种用于制备高频一体化装置的方法。