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公开(公告)号：US20230260074A1
公开(公告)日：2023-08-17
申请号：US18140554
申请日：2023-04-27
Applicant: Imagination Technologies Limited
Inventor： Robert Brigg , John Howson , Xile Yang
CPC classification number: G06T1/60 , G06F9/30018 , G06F9/30029 , G06F9/30145 , G06T1/20 , G06T17/10 , G06T15/005
Abstract: A graphics processing system for generating a rendering output includes geometry processing logic having first transformation logic configured to transform a plurality of untransformed primitives into a plurality of transformed primitives, the first transformation logic configured to implement one or more expansion transformation stages which generate one or more sub-primitives; a primitive block generator configured to divide the plurality of transformed primitives into a plurality of groups; and generate an untransformed primitive block for each group comprising (i) information identifying the untransformed primitives related to the transformed primitives in the group; and (ii) an expansion transformation stage mask for at least one or more expansion transformation stages that indicates the sub-primitives generated for the untransformed primitives in that untransformed primitive block used in generating the rendering output. Rasterization logic includes second transformation logic configured to re-transform the plurality of untransformed primitives into the plurality of transformed primitives on an untransformed primitive block-basis in accordance with the expansion transformation stage mask for the one or more expansion transformation stages; and logic configured to render the transformed primitives to generate the rendering output.
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12.发明公开公开(公告)号：US20230252711A1
公开(公告)日：2023-08-10
申请号：US18118262
申请日：2023-03-07
Applicant: Imagination Technologies Limited
Inventor： Diego Jesus , John W. Howson , Panagiotis Velentzas , Robert Brigg , Xile Yang
CPC classification number: G06T15/005 , G06T1/20 , G06T1/60 , G06T9/00 , G06T11/20 , G06T11/40 , G06T15/00 , G06T15/04 , G06T17/10 , G06T2210/12
Abstract: Methods and control stream generators for generating a control stream for a tile group comprising at least two tiles, the control stream identifying primitive blocks that are relevant to rendering at least one tile in the tile group. Information is received identifying one or more primitive blocks relevant to rendering at least one tile in the tile group, each primitive block comprising one or more primitives; generating a primitive block entry for each of the identified primitive blocks; and adding each primitive block entry to the control stream; wherein generating the primitive block entry for at least one of the identified primitive blocks comprises: (i) identifying a bounding box encompassing the one or more primitives of the primitive block; (ii) generating a coverage mask that indicates which tiles of the tile group that intersect the bounding box for the primitive block are valid for the primitive block, a tile being valid for a primitive block if at least one primitive of the primitive blocks falls, at least partially, within the bounds of the tile; and (iii) including the coverage mask in the primitive block entry.
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13.发明授权公开(公告)号：US11699258B2
公开(公告)日：2023-07-11
申请号：US17169607
申请日：2021-02-08
Applicant: Imagination Technologies Limited
Inventor： Xile Yang , Robert Brigg
CPC classification number: G06T15/005 , G06T1/20 , G06T7/13 , G06T11/20 , G06T11/40 , G06T15/00 , G06T15/04 , G06T2210/12
Abstract: Methods and graphics processing systems render primitives using a rendering space which is subdivided into a plurality of regions. Geometry processing logic performs a geometry processing phase which determines, for each of a plurality of primitives which are present in a region, whether the primitive totally covers the region; and stores data for the primitives which are present in the region, wherein the stored data comprises, for each of the primitives which are determined to totally cover the region, data to indicate total coverage of the region. Rendering logic performs a rendering phase for rendering primitives within the region. The rendering phase retrieves the stored data for the primitives which are present in the region; selectively processes the primitives which are present in the region based on the retrieved data to determine which sample points within the region are covered by the primitives, wherein if the retrieved data includes data which indicates total coverage of the region for a particular primitive then the processing determines which sample points within the region are covered by the particular primitive is skipped; and determines rendered values at the sample points within the region based on the primitives which cover the respective sample points.
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公开(公告)号：US20230090166A1
公开(公告)日：2023-03-23
申请号：US18071095
申请日：2022-11-29
Applicant: Imagination Technologies Limited
Inventor： Xile Yang , Robert Brigg , John W. Howson
Abstract: Methods and primitive block generators for generating primitive blocks in a graphics processing system. The methods comprise: receiving transformed position data for a current primitive, the transformed position data indicating a position of the current primitive in rendering space; determining a distance between the position of the current primitive and a position of a current primitive block based on the transformed position data for the current primitive; determining whether to add the current primitive to the current primitive block based on the distance and a fullness of the current primitive block; in response to determining that the current primitive is to be added to the current primitive block, adding the current primitive to the current primitive block; and in response to determining that the current primitive is not to be added to the current primitive block, flushing the current primitive block and adding the current primitive to a new current primitive block.
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公开(公告)号：US20210294750A1
公开(公告)日：2021-09-23
申请号：US17338466
申请日：2021-06-03
Applicant: Imagination Technologies Limited
Inventor： Robert Brigg , Lorenzo Belli
IPC: G06F12/1009 , G06F12/02 , G06T1/60
Abstract: A method of managing access to a physical memory formed of n memory page frames using a set of virtual address spaces having n virtual address spaces each formed of a plurality p of contiguous memory pages. The method includes receiving a write request to write a block of data to a virtual address within a virtual address space i of the n virtual address spaces, the virtual address defined by the virtual address space i, a memory page j within that virtual address space i and an offset from the start of that memory page j; translating the virtual address to an address of the physical memory using a virtual memory table having n by p entries specifying mappings between memory pages of the virtual address spaces and memory page frames of the physical memory, wherein the physical memory address is defined by: (i) the memory page frame mapped to the memory page j as specified by the virtual memory table, and (ii) the offset of the virtual address; and writing the block of data to the physical memory address.
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Patent Agency Ranking
16.发明申请公开(公告)号：US20210248806A1
公开(公告)日：2021-08-12
申请号：US17172313
申请日：2021-02-10
Applicant: Imagination Technologies Limited
Inventor： Xile Yang , Robert Brigg
Abstract: Data structures, methods and tiling engines for storing tiling data in memory wherein the tiles are grouped into tile groups and the primitives are grouped into primitive blocks. The methods include, for each tile group: determining, for each tile in the tile group, which primitives of each primitive block intersect that tile; storing in memory a variable length control data block for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group; and storing in memory a control stream comprising a fixed sized primitive block entry for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group, each primitive block entry identifying a location in memory of the control data block for the corresponding primitive block. Each primitive block entry may comprise valid tile information identifying which tiles of the tile group are valid for the corresponding primitive block. A tile is a valid tile for a primitive block if at least one primitive in the primitive block intersects that tile.
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17.发明授权公开(公告)号：US11030797B2
公开(公告)日：2021-06-08
申请号：US16906256
申请日：2020-06-19
Applicant: Imagination Technologies Limited
Inventor： Robert Brigg , Lorenzo Belli
Abstract: Systems and methods for processing primitive fragments in a rasterization phase of a graphics processing system wherein a rendering space is subdivided into a plurality of tiles. The method includes receiving a plurality of primitive fragments, each primitive fragment corresponding to a pixel sample in a tile; determining whether a depth buffer read is to be performed for hidden surface removal processing of one or more of the primitive fragments; sorting the primitive fragments into a priority queue and a non-priority queue based on the depth buffer read determinations; and performing hidden surface removal processing on the primitive fragments in the priority and non-priority queues wherein priority is given to the primitive fragments in the priority queue.
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18.发明申请公开(公告)号：US20250124642A1
公开(公告)日：2025-04-17
申请号：US18959911
申请日：2024-11-26
Applicant: Imagination Technologies Limited
Inventor： Xile Yang , Robert Brigg
Abstract: A graphics processing system renders primitives using a rendering space which is sub-divided into a plurality of regions. Geometry processing logic performs a geometry processing phase for a current render wherein for each region in the plurality of regions it is determined, for each of a plurality of primitives which are present in the region, whether the primitive totally covers the region, and total coverage data is stored indicating which of the primitives which are present in the region totally cover the region. Rendering logic performs, after the geometry processing logic has completed the geometry processing phase for the current render, a rendering phase for each of the regions of the plurality of regions on a region-by-region basis for the current render using the total coverage data for the region.
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公开(公告)号：US12020362B2
公开(公告)日：2024-06-25
申请号：US18118262
申请日：2023-03-07
Applicant: Imagination Technologies Limited
Inventor： Diego Jesus , John W. Howson , Panagiotis Velentzas , Robert Brigg , Xile Yang
IPC: G06T15/00 , G06T1/20 , G06T1/60 , G06T9/00 , G06T11/20 , G06T11/40 , G06T15/04 , G06T17/10 , G06T17/20
CPC classification number: G06T15/005 , G06T1/20 , G06T1/60 , G06T9/00 , G06T11/20 , G06T11/40 , G06T15/00 , G06T15/04 , G06T17/10 , G06T17/20 , G06T2210/12
Abstract: Methods and control stream generators for generating a control stream for a tile group comprising at least two tiles, the control stream identifying primitive blocks that are relevant to rendering at least one tile in the tile group. Information is received identifying one or more primitive blocks relevant to rendering at least one tile in the tile group, each primitive block comprising one or more primitives; generating a primitive block entry for each of the identified primitive blocks; and adding each primitive block entry to the control stream; wherein generating the primitive block entry for at least one of the identified primitive blocks comprises: (i) identifying a bounding box encompassing the one or more primitives of the primitive block; (ii) generating a coverage mask that indicates which tiles of the tile group that intersect the bounding box for the primitive block are valid for the primitive block, a tile being valid for a primitive block if at least one primitive of the primitive blocks falls, at least partially, within the bounds of the tile; and (iii) including the coverage mask in the primitive block entry.
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公开(公告)号：US11915363B2
公开(公告)日：2024-02-27
申请号：US18202933
申请日：2023-05-28
Applicant: Imagination Technologies Limited
Inventor： Robert Brigg , John W. Howson , Xile Yang
CPC classification number: G06T15/40 , G06T1/60 , G06T15/005
Abstract: A tag buffer implements a tag buffer stage of a rasterization phase in a tile-based rendering graphics processing system having a rendering space sub-divided into a plurality of tiles to which primitives can be associated. A buffer stores an identifier that identifies a visible primitive fragment at each sample position of a tile of the plurality of tiles. A look-up table stores an entry for transformed primitive blocks that indicates whether the tag buffer has received information identifying a primitive fragment associated with that transformed primitive block. The tag buffer receives information identifying primitive fragments that have survived a depth test, updates the buffer to indicate that an identified primitive fragment is the visible primitive fragment at the associated sample position, updates the look-up table to indicate which transformed primitive blocks the identified primitive fragments are associated with, and in response to flushing the contents of the buffer, compares the flushed contents of the buffer to the look-up table to thereby identify transformed primitive blocks that did not survive the tag buffer stage.
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