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公开(公告)号：US20250166276A1
公开(公告)日：2025-05-22
申请号：US19031852
申请日：2025-01-18
Applicant: Imagination Technologies Limited
Inventor： Xile Yang , Robert Brigg , Michael John Livesley
Abstract: A control stream decoder decodes a control stream for a tile group comprising at least two tiles of a rendering space. A primitive block entry analyser received a primitive block entry of the control stream and identifies a location in memory of a control data block for a corresponding primitive block. For the received primitive block entry, in response to determining that a current tile is a valid tile for the corresponding primitive block, the control data block for the corresponding primitive block is retrieved from the identified location in memory. An address of the corresponding primitive block in memory is identified from the control data block and primitives of that primitive block relevant for rendering the current tile, and information identifying the address of the corresponding primitive block and the primitives of that primitive block relevant for rendering the current tile is outputted.
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公开(公告)号：US12211118B2
公开(公告)日：2025-01-28
申请号：US18140554
申请日：2023-04-27
Applicant: Imagination Technologies Limited
Inventor： Robert Brigg , John Howson , Xile Yang
Abstract: A graphics processing system for generating a rendering output includes geometry processing logic having first transformation logic configured to transform a plurality of untransformed primitives into a plurality of transformed primitives, the first transformation logic configured to implement one or more expansion transformation stages which generate one or more sub-primitives; a primitive block generator configured to divide the plurality of transformed primitives into a plurality of groups; and generate an untransformed primitive block for each group comprising (i) information identifying the untransformed primitives related to the transformed primitives in the group; and (ii) an expansion transformation stage mask for at least one or more expansion transformation stages that indicates the sub-primitives generated for the untransformed primitives in that untransformed primitive block used in generating the rendering output. Rasterization logic includes second transformation logic configured to re-transform the plurality of untransformed primitives into the plurality of transformed primitives on an untransformed primitive block-basis in accordance with the expansion transformation stage mask for the one or more expansion transformation stages; and logic configured to render the transformed primitives to generate the rendering output.
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公开(公告)号：US11600034B2
公开(公告)日：2023-03-07
申请号：US17170590
申请日：2021-02-08
Applicant: Imagination Technologies Limited
Inventor： Diego Jesus , John W. Howson , Panagiotis Velentzas , Robert Brigg , Xile Yang
Abstract: Methods and control stream generators for generating a control stream for a tile group comprising at least two tiles, the control stream identifying primitive blocks that are relevant to rendering at least one tile in the tile group. The method includes: receiving information identifying one or more primitive blocks relevant to rendering at least one tile in the tile group, each primitive block comprising one or more primitives; generating a primitive block entry for each of the identified primitive blocks; and adding each primitive block entry to the control stream; wherein generating the primitive block entry for at least one of the identified primitive blocks comprises: (i) identifying a bounding box encompassing the one or more primitives of the primitive block; (ii) generating a coverage mask that indicates which tiles of the tile group that intersect the bounding box for the primitive block are valid for the primitive block, a tile being valid for a primitive block if at least one primitive of the primitive blocks falls, at least partially, within the bounds of the tile; and (iii) including the coverage mask in the primitive block entry.
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公开(公告)号：US11244421B2
公开(公告)日：2022-02-08
申请号：US16775981
申请日：2020-01-29
Applicant: Imagination Technologies Limited
Inventor： Robert Brigg
Abstract: Memories and methods for storing untransformed primitive blocks of variable size in a memory structure of a graphics processing system, the untransformed primitive blocks having been generated by geometry processing logic of the graphics processing system. The method includes: storing an untransformed primitive block in the memory structure, and increasing, by a predetermined amount, a current total amount of memory allocated for storing untransformed primitive blocks; determining an unused amount of the current total amount of memory allocated for storing untransformed primitive blocks; receiving a new untransformed primitive block for storing in the memory structure, and determining whether a size of the new untransformed primitive block is less than or equal to the unused amount; and if it is determined that the size of the new untransformed primitive block is less than or equal to the unused amount, storing the new untransformed primitive block in the memory structure.
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公开(公告)号：US20210383598A1
公开(公告)日：2021-12-09
申请号：US17407719
申请日：2021-08-20
Applicant: Imagination Technologies Limited
Inventor： Robert Brigg , John W. Howson , Xile Yang
Abstract: A cache for use in a tile-based rendering graphics processing system for storing transformed primitive blocks, the graphics processing system having a rendering space sub-divided into a plurality of tiles to which primitives can be associated, the graphics processing system comprising rasterization logic that rasterizes primitives on a per tile basis in a plurality of stages, the cache comprising: memory configured to store a plurality of transformed primitive blocks in the cache, each transformed primitive block comprising transformed geometry data for one or more primitives; control logic configured to: maintain a counter for each of the plurality of transformed primitive blocks stored in the cache that indicates a number of tiles of the plurality of tiles that are currently being processed by the rasterization logic and require access to that transformed primitive block, the counter being updated when any stage of the rasterization logic indicates a tile no longer requires access to the transformed primitive block; in response to receiving a request to add a new transformed primitive block to the cache when the cache is full, select a transformed primitive block to evict from the cache based on the counters associated therewith; and evict the selected transformed primitive block from the cache.
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Patent Agency Ranking
公开(公告)号：US20210295591A1
公开(公告)日：2021-09-23
申请号：US17331537
申请日：2021-05-26
Applicant: Imagination Technologies Limited
Inventor： Robert Brigg , Lorenzo Belli
Abstract: Systems and methods for processing primitive fragments in a rasterization phase of a graphics processing system wherein a rendering space is subdivided into a plurality of tiles. The method includes receiving a plurality of primitive fragments, each primitive fragment corresponding to a pixel sample in a tile; determining whether a depth buffer read is to be performed for hidden surface removal processing of one or more of the primitive fragments; sorting the primitive fragments into a priority queue and a non-priority queue based on the depth buffer read determinations; and performing hidden surface removal processing on the primitive fragments in the priority and non-priority queues wherein priority is given to the primitive fragments in the priority queue.
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公开(公告)号：US20210110510A1
公开(公告)日：2021-04-15
申请号：US17026506
申请日：2020-09-21
Applicant: Imagination Technologies Limited
Inventor： Robert Brigg , Lorenzo Belli
Abstract: Tiling engines and methods for use in a graphics processing system for hierarchically tiling a plurality of primitives. The tiling engine includes: a chain of sorting units comprising a top level sorting unit followed by one or more lower level sorting units, wherein: the top level sorting unit is configured to: determine which of a plurality of regions of a render space each of the plurality of primitives, at least partially, falls within; and for each region a primitive, at least partially, falls within, store an identifier of that primitive in a queue of the top level sorting unit that is associated with that region; and each of the one or more lower level sorting units is configured to: select one or more queues of a preceding sorting unit in the chain to process; for each of the selected queues, determine which of a plurality of sub-regions of the region associated with that queue each of the primitives identified in that queue, at least partially, falls within; and for each sub-region a primitive, at least partially, falls within, store an identifier of that primitive in a queue of the lower level sorting unit that is associated with that sub-region; and an output unit configured to output the primitives identified in the queues of the last lower level sorting unit in the chain on a queue by queue basis.
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公开(公告)号：US20250166117A1
公开(公告)日：2025-05-22
申请号：US19031815
申请日：2025-01-18
Applicant: Imagination Technologies Limited
Inventor： Robert Brigg , John W. Howson , Xile Yang
Abstract: A graphics processing system for generating a rendering output includes geometry processing logic having first transformation logic configured to transform a plurality of untransformed primitives into a plurality of transformed primitives, the first transformation logic configured to implement one or more expansion transformation stages which generate one or more sub-primitives; a primitive block generator configured to divide the plurality of transformed primitives into a plurality of groups; and generate an untransformed primitive block for each group comprising (i) information identifying the untransformed primitives related to the transformed primitives in the group; and (ii) an expansion transformation stage mask for at least one or more expansion transformation stages that indicates the sub-primitives generated for the untransformed primitives in that untransformed primitive block used in generating the rendering output. Rasterization logic includes second transformation logic configured to re-transform the plurality of untransformed primitives into the plurality of transformed primitives on an untransformed primitive block-basis in accordance with the expansion transformation stage mask for the one or more expansion transformation stages; and logic configured to render the transformed primitives to generate the rendering output.
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9.发明公开公开(公告)号：US20240135625A1
公开(公告)日：2024-04-25
申请号：US18401566
申请日：2023-12-31
Applicant: Imagination Technologies Limited
Inventor： Xile Yang , Robert Brigg , Michael John Livesley
CPC classification number: G06T15/005 , G06T1/20 , G06T1/60 , G06T2210/52
Abstract: Data structures, methods and tiling engines for storing tiling data in memory wherein the tiles are grouped into tile groups and the primitives are grouped into primitive blocks. The methods include, for each tile group: determining, for each tile in the tile group, which primitives of each primitive block intersect that tile; storing in memory a variable length control data block for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group; and storing in memory a control stream comprising a fixed sized primitive block entry for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group, each primitive block entry identifying a location in memory of the control data block for the corresponding primitive block. Each primitive block entry may comprise valid tile information identifying which tiles of the tile group are valid for the corresponding primitive block. A tile is a valid tile for a primitive block if at least one primitive in the primitive block intersects that tile.
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公开(公告)号：US11836849B2
公开(公告)日：2023-12-05
申请号：US18071095
申请日：2022-11-29
Applicant: Imagination Technologies Limited
Inventor： Xile Yang , Robert Brigg , John W. Howson
CPC classification number: G06T15/40 , G06T1/60 , G06T15/005
Abstract: Methods and primitive block generators for generating primitive blocks in a graphics processing system. The methods comprise: receiving transformed position data for a current primitive, the transformed position data indicating a position of the current primitive in rendering space; determining a distance between the position of the current primitive and a position of a current primitive block based on the transformed position data for the current primitive; determining whether to add the current primitive to the current primitive block based on the distance and a fullness of the current primitive block; in response to determining that the current primitive is to be added to the current primitive block, adding the current primitive to the current primitive block; and in response to determining that the current primitive is not to be added to the current primitive block, flushing the current primitive block and adding the current primitive to a new current primitive block.
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