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公开(公告)号：US11922555B2
公开(公告)日：2024-03-05
申请号：US18122042
申请日：2023-03-15
Applicant: Imagination Technologies Limited
Inventor： Diego Jesus , John W. Howson , Panagiotis Velentzas , Robert Brigg , Xile Yang
IPC: G06T15/00 , G06T1/20 , G06T1/60 , G06T9/00 , G06T11/20 , G06T11/40 , G06T15/04 , G06T17/10 , G06T17/20
CPC classification number: G06T15/005 , G06T1/20 , G06T1/60 , G06T9/00 , G06T11/20 , G06T11/40 , G06T15/00 , G06T15/04 , G06T17/10 , G06T17/20 , G06T2210/12
Abstract: Methods and tiling engines for tiling primitives in a tile based graphics processing system in which a rendering space is divided into a plurality of tiles. The method includes generating a multi-level hierarchy of tile groups, each level of the multi-level hierarchy comprising one or more tile groups comprising one or more of the plurality of tiles; receiving a plurality of primitive blocks, each primitive block comprising geometry data for one or more primitives; associating each of the plurality of primitive blocks with one or more of the tile groups up to a maximum number of tile groups such that if at least one primitive of a primitive block falls, at least partially, within the bounds of a tile, the primitive block is associated with at least one tile group that includes that tile; and generating a control stream for each tile group based on the associations, wherein each control stream comprises a primitive block entry for each primitive block associated with the corresponding tile group.
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公开(公告)号：US11610358B2
公开(公告)日：2023-03-21
申请号：US17169417
申请日：2021-02-06
Applicant: Imagination Technologies Limited
Inventor： Diego Jesus , John W. Howson , Panagiotis Velentzas , Robert Brigg , Xile Yang
Abstract: Methods and tiling engines for tiling primitives in a tile based graphics processing system in which a rendering space is divided into a plurality of tiles. The method includes generating a multi-level hierarchy of tile groups, each level of the multi-level hierarchy comprising one or more tile groups comprising one or more of the plurality of tiles; receiving a plurality of primitive blocks, each primitive block comprising geometry data for one or more primitives; associating each of the plurality of primitive blocks with one or more of the tile groups up to a maximum number of tile groups such that if at least one primitive of a primitive block falls, at least partially, within the bounds of a tile, the primitive block is associated with at least one tile group that includes that tile; and generating a control stream for each tile group based on the associations, wherein each control stream comprises a primitive block entry for each primitive block associated with the corresponding tile group.
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公开(公告)号：US20230004437A1
公开(公告)日：2023-01-05
申请号：US17678523
申请日：2022-02-23
Applicant: Imagination Technologies Limited
Inventor： Panagiotis Velentzas , John W. Howson , Richard Broadhurst
Abstract: A method of managing resources in a graphics processing pipeline includes conditionally suspending a task when the task reaches a phase boundary during execution of a program within a texture/shading unit. Suspending the task comprises freeing resources allocated to the task and resources are subsequently re-allocated to the task, such that the task is ready to continue execution, only after determining that the conditions associated with un-suspending the task are satisfied.
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公开(公告)号：US11989816B2
公开(公告)日：2024-05-21
申请号：US17680947
申请日：2022-02-25
Applicant: Imagination Technologies Limited
Inventor： Panagiotis Velentzas , John W. Howson , Richard Broadhurst
CPC classification number: G06T15/005 , G06F9/5016
Abstract: A method of managing resources in a graphics processing pipeline includes, in response to selecting a task for execution within a texture/shading unit, allocating to the task both a static allocation of temporary registers for the entire task and a dynamic allocation of temporary registers. The dynamic allocation comprises temporary registers used by a first phase of the task only and the static allocation of temporary registers comprises any temporary registers that are used by the program and are live at a boundary between two phases. When the task subsequently reaches a boundary between two phases, the dynamic allocation of temporary registers are freed and a new dynamic allocation of temporary registers for a next phase of the task is allocated to the task.
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公开(公告)号：US11600034B2
公开(公告)日：2023-03-07
申请号：US17170590
申请日：2021-02-08
Applicant: Imagination Technologies Limited
Inventor： Diego Jesus , John W. Howson , Panagiotis Velentzas , Robert Brigg , Xile Yang
Abstract: Methods and control stream generators for generating a control stream for a tile group comprising at least two tiles, the control stream identifying primitive blocks that are relevant to rendering at least one tile in the tile group. The method includes: receiving information identifying one or more primitive blocks relevant to rendering at least one tile in the tile group, each primitive block comprising one or more primitives; generating a primitive block entry for each of the identified primitive blocks; and adding each primitive block entry to the control stream; wherein generating the primitive block entry for at least one of the identified primitive blocks comprises: (i) identifying a bounding box encompassing the one or more primitives of the primitive block; (ii) generating a coverage mask that indicates which tiles of the tile group that intersect the bounding box for the primitive block are valid for the primitive block, a tile being valid for a primitive block if at least one primitive of the primitive blocks falls, at least partially, within the bounds of the tile; and (iii) including the coverage mask in the primitive block entry.
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Patent Agency Ranking
公开(公告)号：US20220269527A1
公开(公告)日：2022-08-25
申请号：US17678335
申请日：2022-02-23
Applicant: Imagination Technologies Limited
Inventor： Panagiotis Velentzas , John W. Howson , Richard Broadhurst
IPC: G06F9/48
Abstract: A method of repacking tasks in a graphics pipeline includes, in response to a task reaching a checkpoint in a program, determining if the task is eligible for repacking. If the task is eligible for repacking, the task is de-scheduled and it is determined whether repacking conditions are satisfied. In the event that the repacking conditions are satisfied, the method looks for a pair of compatible and non-conflicting tasks at the checkpoint. If such a pair of tasks are found, one or more instances are transferred between the pair of tasks.
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公开(公告)号：US20220012841A1
公开(公告)日：2022-01-13
申请号：US17333695
申请日：2021-05-28
Applicant: Imagination Technologies Limited
Inventor： Roger Hernando Buch , Panagiotis Velentzas , Richard Broadhurst , Xile Yang , John W. Howson
Abstract: Methods and apparatus for merging tasks in a graphics pipeline in which, subsequent to a trigger to flush a tag buffer, one or more tasks from the flushed tag buffer are generated, each task comprising a reference to a program and plurality of fragments on which the program is to be executed, wherein a fragment is an element of a primitive at a sample position. It is then determined whether merging criteria are satisfied and if satisfied, one or more fragments from a next tag buffer flush are added to a last task of the one or more tasks generated from the flushed tag buffer.
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公开(公告)号：US20250054097A1
公开(公告)日：2025-02-13
申请号：US18929703
申请日：2024-10-29
Applicant: Imagination Technologies Limited
Inventor： Roger Hernando Buch , Panagiotis Velentzas , Richard Broadhurst , Xile Yang , John W. Howson
Abstract: Methods and apparatus for merging tasks in a graphics pipeline in which, subsequent to a trigger to flush a tag buffer, one or more tasks from the flushed tag buffer are generated, each task comprising a reference to a program and plurality of fragments on which the program is to be executed, wherein a fragment is an element of a primitive at a sample position. It is then determined whether merging criteria are satisfied and if satisfied, one or more fragments from a next tag buffer flush are added to a last task of the one or more tasks generated from the flushed tag buffer.
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公开(公告)号：US12164958B2
公开(公告)日：2024-12-10
申请号：US18132999
申请日：2023-04-11
Applicant: Imagination Technologies Limited
Inventor： Alistair Goudie , Panagiotis Velentzas
IPC: G06F9/48 , G06F12/0802
Abstract: Logic includes a task builder for building tasks comprising data items, a task scheduler for scheduling tasks for processing by a parallel processor, a data store arranged to map content of each data item to an item ID, and a linked-list RAM comprising an entry for each item ID. For each new data item, the task builder creates a new task by starting a new linked list, or adds the data item to an existing linked list. In each linked list, the entry for each data item records a pointer to a next item ID in the list. The task builder indicates when any of the tasks is ready for scheduling. The task scheduler identifies a ready task based on the indication from the task builder, and in response follows the pointers in the respective linked list in order to schedule the data items of the task for processing.
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公开(公告)号：US12131403B2
公开(公告)日：2024-10-29
申请号：US18231126
申请日：2023-08-07
Applicant: Imagination Technologies Limited
Inventor： Roger Hernando Buch , Panagiotis Velentzas , Richard Broadhurst , Xile Yang , John W. Howson
CPC classification number: G06T1/20 , G06F9/4881 , G06F9/5038 , G06F9/52 , G06F12/0261 , G06T1/60
Abstract: Methods and apparatus for merging tasks in a graphics pipeline in which, subsequent to a trigger to flush a tag buffer, one or more tasks from the flushed tag buffer are generated, each task comprising a reference to a program and plurality of fragments on which the program is to be executed, wherein a fragment is an element of a primitive at a sample position. It is then determined whether merging criteria are satisfied and if satisfied, one or more fragments from a next tag buffer flush are added to a last task of the one or more tasks generated from the flushed tag buffer.
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