公开(公告)号：US20150130037A1

公开(公告)日：2015-05-14

申请号：US14077582

申请日：2013-11-12

Applicant: Infineon Technologies AG

Inventor： Frank Püschner ,  Bernhard Schätzler ,  Teck Sim Lee ,  Franz Gabler ,  Pei Pei Kong ,  Boon Huat Lim

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/66

CPC classification number: H01L23/49541 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/561 ,  H01L22/14 ,  H01L23/3107 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/97 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00

Abstract: A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a periphery of the unit lead frame. A semiconductor die is attached to the die paddles. A molding compound covers the unit lead frames, including the semiconductor dies. Prior to testing or other processing of the lead frame strip, a gap is etched into a region of the leads which are shared by adjacent ones of the unit lead frames. The gap extends at least mostly through the shared leads. A partial cut is made in the molding compound around the periphery of the unit lead frames prior to the subsequent processing, including below the gap in the shared leads, to electrically isolate the leads of the unit lead frames.

Abstract translation: 引线框架条包括多个连接的单元引线框架，每个单元引线框架具有管芯焊盘和连接到单元引线框架的外围的多个引线。 将半导体管芯附接到管芯片。 模制化合物覆盖包括半导体管芯的单元引线框架。 在引线框架条的测试或其它处理之前，间隙被蚀刻到由相邻单元引线框架共享的引线的区域中。 差距至少主要通过共享潜在客户。 在随后的处理之前，在包括在共享引线之间的间隙的下方的单元引线框的周围的模塑料中进行部分切割以使单元引线框架的引线电隔离。

公开(公告)号：US12094793B2

公开(公告)日：2024-09-17

申请号：US18380276

申请日：2023-10-16

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Chii Shang Hong ,  Teck Sim Lee ,  Bernd Schmoelzer ,  Ke Yan Tean ,  Lee Shuang Wang

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/495 ,  H01L23/498

CPC classification number: H01L23/3121 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49506 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49555 ,  H01L23/49568 ,  H01L23/49838 ,  H01L24/46 ,  H01L24/49 ,  H01L24/83 ,  H01L23/49503 ,  H01L23/49575 ,  H01L2924/181

Abstract: A package is disclosed. In one example, the package includes a first main face for mounting a heat sink and an opposing second main face for being mounted on a mounting base. The package comprises a carrier, an electronic component mounted at the carrier, and an encapsulant encapsulating at least part of the electronic component and at least part of the carrier. Electrically insulating material covers electrically conductive material of the carrier at said first main face. The encapsulant comprises at least one step at the first main face.

公开(公告)号：US20210020539A1

公开(公告)日：2021-01-21

申请号：US16929223

申请日：2020-07-15

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Teck Sim Lee ,  Klaus Schiess ,  Xaver Schloegel ,  Lee Shuang Wang ,  Mohd Hasrul Zulkifli

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/31 ,  H01L23/12

Abstract: A semiconductor package is disclosed. In one example, the semiconductor package includes a chip carrier, a semiconductor chip attached to the chip carrier, an encapsulation body encapsulating the semiconductor chip, and a mounting hole configured to receive a screw for screw mounting a heatsink onto a first side of the semiconductor package. A second side of the semiconductor package opposite the first side is configured to be surface mounted to an application board.

公开(公告)号：US10727151B2

公开(公告)日：2020-07-28

申请号：US15605091

申请日：2017-05-25

Applicant: Infineon Technologies AG

Inventor： Liu Chen ,  Teck Sim Lee ,  Jia Yi Wong ,  Wei Han Koo ,  Thomas Stoeck ,  Gilles Delarozee

IPC: H01L23/367 ,  H01L23/492 ,  H01L23/495 ,  H01L21/56 ,  H01L23/433 ,  H01L23/31 ,  H01L23/36 ,  H01L23/498 ,  H01L23/373

Abstract: A semiconductor chip package includes an electrically conducting carrier and a semiconductor chip disposed over the electrically conducting carrier. The semiconductor chip has a first surface facing the electrically conducting carrier and a second surface opposite the first surface. A metal plate has a first surface mechanically connected to the second surface of the semiconductor chip and a second surface opposite the first surface of the metal plate. The metal plate completely overlaps the second surface of the semiconductor chip. The second surface of the metal plate is at least partially exposed at a periphery of the semiconductor chip package.

公开(公告)号：US20180277513A1

公开(公告)日：2018-09-27

申请号：US15469112

申请日：2017-03-24

Applicant: Infineon Technologies AG

Inventor： Stefan Macheiner ,  Amirul Afiq Hud ,  Teck Sim Lee ,  Thomas Stoek ,  Lee Shuang Wang ,  Chooi Mei Chong ,  Wei Hing Tan

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/538 ,  H01L23/057 ,  H01L25/00

CPC classification number: H01L25/0655 ,  H01L23/057 ,  H01L23/49805 ,  H01L23/49844 ,  H01L23/5386 ,  H01L25/50 ,  H01L29/7827

Abstract: In some examples, a device includes a power supply element and a reference voltage element, wherein the reference voltage element is electrically isolated from the power supply element. The device further includes a high-side semiconductor die including at least two high-side transistors, wherein each high-side transistor of the at least two high-side transistors is electrically connected to the power supply element. The device also includes a low-side semiconductor die including at least two low-side transistors, wherein each low-side transistor of the at least two low-side transistors is electrically connected to the reference voltage element. The device includes at least two switching elements, wherein each switching element of the at least two switching elements is electrically connected to a respective high-side transistor of the at least two high-side transistors and to a respective low-side transistor of the at least two low-side transistors.

公开(公告)号：US09230880B2

公开(公告)日：2016-01-05

申请号：US14165754

申请日：2014-01-28

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Teck Sim Lee ,  Xaver Schloegel ,  Klaus Schiess

IPC: H01L23/495 ,  H01L23/40 ,  H01L21/3105 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L23/367 ,  H01L23/433

CPC classification number: H01L23/4006 ,  H01L21/31053 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/367 ,  H01L23/4093 ,  H01L23/4334 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49568 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L2023/4031 ,  H01L2023/405 ,  H01L2023/4087 ,  H01L2224/37147 ,  H01L2224/3754 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An electronic device includes a semiconductor chip including an electrode, a substrate element and a contact element connecting the electrode to the substrate element. The electronic device further includes an encapsulant configured to leave the contact element at least partially exposed such that a heatsink may be connected to the contact element.

Abstract translation: 电子设备包括半导体芯片，其包括电极，基板元件和将电极连接到基板元件的接触元件。 电子设备还包括密封剂，其被配置为使接触元件至少部分地暴露，使得散热器可以连接到接触元件。

公开(公告)号：US11942383B2

公开(公告)日：2024-03-26

申请号：US17501568

申请日：2021-10-14

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Chii Shang Hong ,  Teck Sim Lee ,  Ralf Otremba ,  Daniel Pedone ,  Bernd Schmoelzer

IPC: H01L23/16 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367

CPC classification number: H01L23/16 ,  H01L21/4871 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3672

Abstract: A package for mounting on a mounting base is disclosed. In one example, the package comprises a carrier, an electronic component mounted at the carrier, leads electrically coupled with the electronic component and to be electrically coupled with the mounting base, and a linear spacer for defining a spacing with respect to the carrier.

公开(公告)号：US20240087995A1

公开(公告)日：2024-03-14

申请号：US18453639

申请日：2023-08-22

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Thai Kee Gan ,  Teck Sim Lee ,  Chwee Pang Tommy Khoo ,  Christian Schiele ,  Katrin Unterhofer ,  Patrick Uredat

IPC: H01L23/495 ,  H01L23/00 ,  H01L25/00 ,  H01L25/07 ,  H01L25/18

CPC classification number: H01L23/49555 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/48 ,  H01L25/072 ,  H01L25/18 ,  H01L25/50 ,  H01L24/49 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2224/4903

Abstract: A power semiconductor package includes: a die carrier having first and second opposite sides; and first and second power semiconductor dies each having first and second power electrodes on opposite sides. The second power electrodes face and are electrically coupled to the first side of the carrier. A molded body at least partially encapsulates the dies and has a first and second opposite sides and lateral sides connecting the first and second sides. First and second power contacts and first and second control contacts are arranged laterally next to each other. The first power electrode of the first die is electrically coupled to the first power contact by a first electrical connector. The first power electrode of the second die is electrically coupled to the second power contact by a second electrical connector. A width of each power contact is at least four times the width of each control contact.

公开(公告)号：US11876028B2

公开(公告)日：2024-01-16

申请号：US17502082

申请日：2021-10-15

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Chii Shang Hong ,  Teck Sim Lee ,  Bernd Schmoelzer ,  Ke Yan Tean ,  Lee Shuang Wang

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/495 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/3121 ,  H01L21/56 ,  H01L23/49506 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49555 ,  H01L23/49568 ,  H01L23/49838 ,  H01L24/46 ,  H01L24/49 ,  H01L24/83 ,  H01L23/49503 ,  H01L23/49575 ,  H01L2924/181

Abstract: A package is disclosed. In one example, the package includes a first main face for mounting a heat sink and an opposing second main face for being mounted on a mounting base. The package comprises a carrier, an electronic component mounted at the carrier, and an encapsulant encapsulating at least part of the electronic component and at least part of the carrier. Electrically insulating material covers electrically conductive material of the carrier at said first main face. The encapsulant comprises at least one step at the first main face.

公开(公告)号：US11676881B2

公开(公告)日：2023-06-13

申请号：US16929223

申请日：2020-07-15

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Teck Sim Lee ,  Klaus Schiess ,  Xaver Schloegel ,  Lee Shuang Wang ,  Mohd Hasrul Zulkifli

IPC: H01L23/367 ,  H01L23/12 ,  H01L23/31 ,  H01L21/48

CPC classification number: H01L23/3677 ,  H01L21/4871 ,  H01L23/12 ,  H01L23/3107

Abstract: A semiconductor package is disclosed. In one example, the semiconductor package includes a chip carrier, a semiconductor chip attached to the chip carrier, an encapsulation body encapsulating the semiconductor chip, and a mounting hole configured to receive a screw for screw mounting a heatsink onto a first side of the semiconductor package. A second side of the semiconductor package opposite the first side is configured to be surface mounted to an application board.