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公开(公告)号：US10291246B2
公开(公告)日：2019-05-14
申请号：US15633157
申请日：2017-06-26
Applicant: MaxLinear, Inc.
Inventor： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop , Jianyu Zhu
Abstract: Systems and methods are provided for digital-to-analog conversions with adaptive digital offsets. A digital offset may be determined and applied to a digital input to a digital-to-analog converter (DAC), and digital-to-analog conversions are then applied via the DAC to the digital input with the digital offset. The digital offset may be set to account for one or more conditions relating to inputs to the DAC, with the one or more conditions affecting switching characteristics of one or more of a plurality of conversion elements in the DAC. The digital offset may be determined dynamically and adaptively, such as based on the input and/or conditions relating to the input. The adjustments may be selectively applied to the digital offset for particular input conditions.
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公开(公告)号：US10158368B2
公开(公告)日：2018-12-18
申请号：US15997336
申请日：2018-06-04
Applicant: MaxLinear, Inc.
Inventor： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop , Jianyu Zhu
Abstract: A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.
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公开(公告)号：US20180287624A1
公开(公告)日：2018-10-04
申请号：US15997336
申请日：2018-06-04
Applicant: MaxLinear, Inc.
Inventor： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop , Jianyu Zhu
CPC classification number: H03M1/0624 , H03M1/66
Abstract: A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.
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公开(公告)号：US20180269891A1
公开(公告)日：2018-09-20
申请号：US15983764
申请日：2018-05-18
Applicant: MaxLinear, Inc.
Inventor： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
CPC classification number: H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
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公开(公告)号：US20170279459A1
公开(公告)日：2017-09-28
申请号：US15617515
申请日：2017-06-08
Applicant: MaxLinear, Inc.
Inventor： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
CPC classification number: H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
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Patent Agency Ranking
16.发明授权公开(公告)号：US09762256B2
公开(公告)日：2017-09-12
申请号：US15130617
申请日：2016-04-15
Applicant: MaxLinear, Inc.
Inventor： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop
CPC classification number: H03M1/066 , H03M1/1038 , H03M1/66
Abstract: Systems and methods are provided for digital-to-analog converters (DACs) with enhanced dynamic element matching (DEM) and calibration. DEM may be adapted based on assessment of one or more conditions that may affect the DACs or DEM functions thereof. The one or more condition may comprise amount of signal backoff. The adaption may comprise switching the DEM function (as a whole, or partially—e.g., individual DEM elements) on or off based on the assess conditions. The DACs may incorporate use of calibration. The DEM and/or the calibration may be applied to only a portion of the DAC, such as a particular segment (e.g., a middle segment comprising bits between the MSBs and the LSBs).
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公开(公告)号：US10312928B2
公开(公告)日：2019-06-04
申请号：US15983764
申请日：2018-05-18
Applicant: MaxLinear, Inc.
Inventor： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
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18.发明授权公开(公告)号：US10224946B2
公开(公告)日：2019-03-05
申请号：US15949395
申请日：2018-04-10
Applicant: MaxLinear, Inc.
Inventor： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop
Abstract: Systems and methods are provided for managing dynamic element matching (DEM) in digital-to-analog converters (DACs). One or more parameters associated with the DAC and/or a signal being converted via the DAC; and based on the one or more parameters, conditions affecting dynamic element matching in the DAC may be assessed. Based on the assessing of the conditions, one or more adjustments may be determined and dynamically applied to the dynamic element matching in the DAC.
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19.发明申请公开(公告)号：US20190044524A1
公开(公告)日：2019-02-07
申请号：US16155482
申请日：2018-10-09
Applicant: MaxLinear, Inc.
Inventor： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop
Abstract: In a digital-to-analog converter (DAC) that includes one or more conversion circuits, with each conversion circuit configured to handle one or more bits in an input signal to the DAC, one or more types of errors that occur during operation of the DAC may be detected, and one or more adjustments may be determined for correcting the one or more types of errors that occur during operation of the DAC and/or for reducing effects resulting from the one or more types of errors. At least one of the one or more adjustments may applied, with the at least one of the one or more adjustments is applied to only a subset of one or more conversion circuits. The DAC may be adaptive switched among a plurality of modes, and adjustments may be applied only in one or more of the modes but not in all of the modes.
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公开(公告)号：US20170359080A1
公开(公告)日：2017-12-14
申请号：US15633157
申请日：2017-06-26
Applicant: MaxLinear, Inc.
Inventor： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop , Jianyu Zhu
CPC classification number: H03M1/1023 , H03M1/0607 , H03M1/68
Abstract: Systems and methods are provided for digital-to-analog conversions with adaptive digital offsets. A digital offset may be determined and applied to a digital input to a digital-to-analog converter (DAC), and digital-to-analog conversions are then applied via the DAC to the digital input with the digital offset. The digital offset may be set to account for one or more conditions relating to inputs to the DAC, with the one or more conditions affecting switching characteristics of one or more of a plurality of conversion elements in the DAC. The digital offset may be determined dynamically and adaptively, such as based on the input and/or conditions relating to the input. The adjustments may be selectively applied to the digital offset for particular input conditions.
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