公开(公告)号：US09752938B2

公开(公告)日：2017-09-05

申请号：US14269877

申请日：2014-05-05

Applicant: Renesas Electronics America Inc.

Inventor： Tetsuo Sato ,  Ryotaro Kudo

IPC: G01K7/00 ,  G01K1/02 ,  G01K3/00 ,  G01K7/01 ,  G06F1/20 ,  G06F1/26 ,  H01L23/34 ,  H05K1/02 ,  G01K3/14

CPC classification number: G01K7/00 ,  G01K1/026 ,  G01K3/00 ,  G01K7/01 ,  G01K2003/145 ,  G06F1/206 ,  G06F1/26 ,  H01L23/34 ,  H01L2924/0002 ,  H05K1/0201 ,  H05K1/0262 ,  H05K2201/10151 ,  H05K2201/10166 ,  H05K2203/163 ,  Y02D10/16 ,  H01L2924/00

Abstract: An apparatus, in one embodiment, can include a configuration including a plurality of heat generation devices. The apparatus also includes a plurality of thermal sensors respectively, operably connected to each of the plurality of heat generation devices, wherein each thermal sensor of the plurality of thermal sensors includes a respective output terminal configured to provide a voltage representative of the temperature of the respective heat generation device. The apparatus further includes an output circuit configured to output the highest temperature information among the heat generation devices. The output terminals of the plurality of thermal sensors are tied together. A corresponding method is also discussed.

公开(公告)号：US09667083B2

公开(公告)日：2017-05-30

申请号：US14552894

申请日：2014-11-25

Applicant: Renesas Electronics America Inc.

Inventor： Tetsuo Sato ,  Tsutomu Kawano ,  Koji Kashimoto ,  Takao Hidaka ,  Tsuyoshi Ota ,  Ryoji Kato

IPC: H02J7/06 ,  H02J7/00 ,  G01R19/00 ,  G01R31/36

CPC classification number: H02J7/0047 ,  G01R19/0092 ,  G01R31/3606 ,  G01R31/3686 ,  H02J7/00 ,  H02J7/0031 ,  H02J7/0068 ,  H02J2007/0037 ,  H02J2007/004

Abstract: A battery management method and apparatus. In one embodiment of the method, a source current is divided into Ic and Icr. Ic is transmitted to and charges a battery. A first voltage is generated that is related to Icr. The first voltage is converted into a first digital signal. A processing unit receives and processes the first digital signal in accordance with instructions stored in a memory. The transmission of Ic to the battery is interrupted in response to the processing unit processing the first digital signal. Current provided by the battery is divided into Idc and Idcr. Idc is transmitted to a device. A second voltage is generated that is related to Idcr. The second voltage is converted into a second digital signal. The processing unit receives and processes the second digital signal in accordance with instructions stored in the memory. The transmission of Idc to the battery is interrupted in response to the processing unit processing the second digital signal.

公开(公告)号：US20160322901A1

公开(公告)日：2016-11-03

申请号：US15206990

申请日：2016-07-11

Applicant: Renesas Electronics America Inc.

Inventor： Tetsuo Sato ,  Tomoaki Uno ,  Hirokazu Kato ,  Nobuyoshi Matsuura

IPC: H02M3/158 ,  H01L29/423 ,  H02M1/08 ,  H01L29/40 ,  H03K7/08 ,  H01L29/78 ,  H01L29/49

CPC classification number: H02M3/158 ,  H01L27/0629 ,  H01L28/10 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42336 ,  H01L29/4916 ,  H01L29/7803 ,  H01L29/7813 ,  H02M1/08 ,  H02M1/44 ,  H03K7/08 ,  H03K17/162 ,  H03K17/165 ,  H03K2017/6878 ,  H03K2217/0036

Abstract: A trench MOSFET is disclosed that includes a semiconductor substrate having a vertically oriented trench containing a gate. The trench MOSFET further includes a source, a drain, and a conductive element. The conductive element, like the gate is contained in the trench, and extends between the gate and a bottom of the trench. The conductive element is electrically isolated from the source, the gate, and the drain. When employed in a device such as a DC-DC converter, the trench MOSFET may reduce power losses and electrical and electromagnetic noise.

公开(公告)号：US09401644B2

公开(公告)日：2016-07-26

申请号：US14666503

申请日：2015-03-24

Applicant: Renesas Electronics America Inc.

Inventor： Tetsuo Sato ,  Tomoaki Uno ,  Hirokazu Kato ,  Nobuyoshi Matsuura

IPC: H01L29/76 ,  H01L29/66 ,  H01L21/02 ,  H01L21/31 ,  H02M3/158 ,  H01L29/40 ,  H01L29/417 ,  H01L29/78 ,  H01L27/06 ,  H01L49/02 ,  H02M1/44 ,  H03K17/16 ,  H03K17/687

CPC classification number: H02M3/158 ,  H01L27/0629 ,  H01L28/10 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42336 ,  H01L29/4916 ,  H01L29/7803 ,  H01L29/7813 ,  H02M1/08 ,  H02M1/44 ,  H03K7/08 ,  H03K17/162 ,  H03K17/165 ,  H03K2017/6878 ,  H03K2217/0036

Abstract: A trench MOSFET is disclosed that includes a semiconductor substrate having a vertically oriented trench containing a gate. The trench MOSFET further includes a source, a drain, and a conductive element. The conductive element, like the gate is contained in the trench, and extends between the gate and a bottom of the trench. The conductive element is electrically isolated from the source, the gate, and the drain. When employed in a device such as a DC-DC converter, the trench MOSFET may reduce power losses and electrical and electromagnetic noise.

公开(公告)号：US20150077062A1

公开(公告)日：2015-03-19

申请号：US14552894

申请日：2014-11-25

Applicant: Renesas Electronics America Inc.

Inventor： Tetsuo Sato ,  Tsutomu Kawano ,  Koji Kashimoto ,  Takao Hidaka ,  Tsuyoshi Otal ,  Ryoji Kato

IPC: H02J7/00

CPC classification number: H02J7/0047 ,  G01R19/0092 ,  G01R31/3606 ,  G01R31/3686 ,  H02J7/00 ,  H02J7/0031 ,  H02J7/0068 ,  H02J2007/0037 ,  H02J2007/004

Abstract: A battery management method and apparatus. In one embodiment of the method, a source current is divided into Ic and Icr. Ic is transmitted to and charges a battery. A first voltage is generated that is related to Icr. The first voltage is converted into a first digital signal. A processing unit receives and processes the first digital signal in accordance with instructions stored in a memory. The transmission of Ic to the battery is interrupted in response to the processing unit processing the first digital signal. Current provided by the battery is divided into Idc and Idcr. Idc is transmitted to a device. A second voltage is generated that is related to Idcr. The second voltage is converted into a second digital signal. The processing unit receives and processes the second digital signal in accordance with instructions stored in the memory. The transmission of Idc to the battery is interrupted in response to the processing unit processing the second digital signal.

Abstract translation: 一种电池管理方法和装置。 在该方法的一个实施例中，源电流被分为Ic和Icr。 Ic被传输到电池并对其充电。 产生与Icr有关的第一个电压。 第一电压被转换成第一数字信号。 处理单元根据存储在存储器中的指令接收并处理第一数字信号。 响应于处理单元处理第一数字信号，Ic对电池的传输中断。 电池提供的电流分为Idc和Idcr。 Idc被发送到设备。 产生与Idcr相关的第二电压。 第二电压被转换为第二数字信号。 处理单元根据存储在存储器中的指令接收和处理第二数字信号。 响应于处理单元处理第二数字信号，Idc到电池的传输被中断。

公开(公告)号：US10673254B2

公开(公告)日：2020-06-02

申请号：US15657134

申请日：2017-07-22

Applicant: Renesas Electronics America Inc.

Inventor： Kota Kano ,  Tetsuo Sato ,  Shigeru Maeta

IPC: H02J7/00 ,  H02J7/14

Abstract: A simple battery and battery charger. In one embodiment, the battery charger includes an output terminal that provides a charging voltage Vout and charging current Iout. The battery is contained in a battery pack having an input terminal, which can be connected to the output terminal in order to receive Vout and Iout. The battery charger may include a first circuit for controlling the magnitude of Vout. The battery pack may include a second circuit that generates a control signal when the output terminal is connected to the input terminal. The first circuit is configured to control the magnitude of Vout based on the control signal.

公开(公告)号：US10135328B2

公开(公告)日：2018-11-20

申请号：US15804241

申请日：2017-11-06

Applicant: Renesas Electronics America Inc.

Inventor： Tetsuo Sato ,  Ryotaro Kudo ,  Hideo Ishii ,  Kenichi Nakano

IPC: G05F3/16 ,  H02M1/088 ,  H02M3/158 ,  H02M1/00

Abstract: A step down convertor with a distributed driving system. In one embodiment, an apparatus is disclosed that includes an inductor coupled to an output node. The apparatus also includes first and second circuits. The first circuit can transmit current to the output node via the inductor, and the second can transmit current to the output node via the inductor. The apparatus also includes a third circuit for modifying operational aspects of the first circuit or the second circuit based on a magnitude of current flowing through the inductor.

公开(公告)号：US10082428B2

公开(公告)日：2018-09-25

申请号：US15659009

申请日：2017-07-25

Applicant: Renesas Electronics America Inc.

Inventor： Tetsuo Sato ,  Ryotaro Kudo

IPC: G01K7/00 ,  G01K1/02 ,  G01K3/00 ,  G01K7/01 ,  G06F1/20 ,  G06F1/26 ,  H01L23/34 ,  H05K1/02 ,  G01K3/14

CPC classification number: G01K7/00 ,  G01K1/026 ,  G01K3/00 ,  G01K7/01 ,  G01K2003/145 ,  G06F1/206 ,  G06F1/26 ,  H01L23/34 ,  H01L2924/0002 ,  H05K1/0201 ,  H05K1/0262 ,  H05K2201/10151 ,  H05K2201/10166 ,  H05K2203/163 ,  Y02D10/16 ,  H01L2924/00

Abstract: An apparatus, in one embodiment, can include a configuration including a plurality of heat generation devices. The apparatus also includes a plurality of thermal sensors respectively, operably connected to each of the plurality of heat generation devices, wherein each thermal sensor of the plurality of thermal sensors includes a respective output terminal configured to provide a voltage representative of the temperature of the respective heat generation device. The apparatus further includes an output circuit configured to output the highest temperature information among the heat generation devices. The output terminals of the plurality of thermal sensors are tied together. A corresponding method is also discussed.

公开(公告)号：US20170117815A1

公开(公告)日：2017-04-27

申请号：US14922269

申请日：2015-10-26

Applicant: Renesas Electronics America Inc.

Inventor： Tetsuo Sato

IPC: H02M3/335

CPC classification number: H02M3/33546 ,  H02M3/33523

Abstract: A method and apparatus for isolating voltages while transmitting data signals. In one embodiment of the method, a modulation circuit modulates a carrier signal using an input data signal. A demodulation circuit receives the modulated carrier signal via a first capacitor coupled in series between the modulation circuit and the demodulation circuit. The demodulation circuit also receives the carrier signal via a second capacitor coupled in series between the demodulation circuit and the circuit that generates the carrier signal. The demodulation circuit demodulates the modulated carrier signal using the carrier signal.

公开(公告)号：US20160254808A1

公开(公告)日：2016-09-01

申请号：US14634195

申请日：2015-02-27

Applicant: Renesas Electronics America Inc.

Inventor： Tetsuo Sato ,  Koichi Yamazaki

IPC: H03K17/687 ,  H03K17/74 ,  H02M3/158 ,  H03K17/567

CPC classification number: H03K17/6871 ,  H02M7/003 ,  H03K17/04163 ,  H03K17/567 ,  H03K17/74 ,  Y02B70/1483

Abstract: An apparatus that includes a first device connected to an inductor. The first device includes a first silicon carbide (SiC) junction gate field-effect transistor (JFET), a first SiC schottky barrier diode (SBD) connected to a gate and a drain of the first SiC JFET, and a first silicon (Si) transistor connected to transmit current to a source of the first SiC JFET. An inductor input terminal is connected to the drain of the first SiC JFET.

Abstract translation: 一种包括连接到电感器的第一装置的装置。 第一器件包括第一碳化硅（SiC）结栅场效应晶体管（JFET），连接到第一SiC JFET的栅极和漏极的第一SiC肖特基势垒二极管（SBD）和第一硅（Si） 连接的晶体管将电流传输到第一SiC JFET的源极。 电感器输入端连接到第一SiC JFET的漏极。