公开(公告)号：US20220019615A1

公开(公告)日：2022-01-20

申请号：US17414802

申请日：2019-12-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jungho PARK ,  Yunsu LEE ,  Jaehun LEE ,  Mirae JEONG ,  Jiyoung KANG ,  Sejin KWAK

IPC: G06F16/532 ,  H04L29/08 ,  G06K9/00

Abstract: An electronic device is disclosed. The electronic device comprises: a memory including at least one command; and a processor connected to the memory to control the electronic device, wherein by executing the at least one command, the processor obtains an image according to a user's interaction with the electronic device, obtains information about the user's intention according to information about an object obtained from the image and context information obtained during the interaction, and obtains information concerning the obtained object from a knowledge base stored in the memory, according to the information about the user's intention, wherein the knowledge base includes device information about a plurality of electronic devices used during the user's activity, object information about a plurality of objects obtained according to the activity, and intention information corresponding to correlative information, and the processor obtains, from the knowledge base, information concerning the obtained object according to the intention information corresponding to the obtained object.

公开(公告)号：US20210020600A1

公开(公告)日：2021-01-21

申请号：US16748138

申请日：2020-01-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yeonho JANG ,  Gwangjae JEON ,  Dongkyu KIM ,  Jungho PARK ,  Seokhyun LEE

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/78

Abstract: Provided is a method of manufacturing a semiconductor package including providing a carrier substrate, providing sacrificial layer on the carrier substrate, the sacrificial layer including a first sacrificial layer and a second sacrificial layer, providing a redistribution wiring layer on the sacrificial layer, providing a plurality of semiconductor chips on the redistribution wiring layer, providing a mold layer provided on the sacrificial layer, the redistribution wiring layer, and the plurality of semiconductor chips, detaching the first sacrificial layer from the second sacrificial layer, and dicing the second sacrificial layer, the redistribution wiring layer, and the mold layer, wherein a diameters of the first sacrificial layer and the second sacrificial layer are respectively less than a diameter of the carrier substrate, and a diameter of the mold layer is greater than the diameter of the redistribution wiring layer and less than the diameter of the first sacrificial layer.

公开(公告)号：US20240387231A1

公开(公告)日：2024-11-21

申请号：US18521678

申请日：2023-11-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungho PARK ,  Hojae KIM

IPC: H01L21/683 ,  H01L21/687

Abstract: A collet for pickup a semiconductor chip may include a base and a holder. The base may have a first surface oriented toward the semiconductor chip and a second surface opposite to the first surface. The holder may be arranged at a central portion of the first surface of the base to fix the semiconductor chip using vacuum. An edge portion of the first surface of the base may be exposed. Thus, any structure may not exist in the edge portion of the base corresponding to a peripheral region of the collet so that a peripheral semiconductor chip vertically erected in picking the semiconductor chip from a film may not interfere with the holder. As a result, the vertically erected semiconductor chip may not be stuck in the holder to prevent damages of other semiconductor chip by the vertically erected semiconductor chip.

公开(公告)号：US20240264934A1

公开(公告)日：2024-08-08

申请号：US18426975

申请日：2024-01-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jungho PARK ,  Insu kim ,  Beomkyu Shin ,  Jaeyong Jeong

IPC: G06F12/02 ,  G06F12/0882 ,  G06F13/16

CPC classification number: G06F12/0246 ,  G06F12/0882 ,  G06F13/1668 ,  G06F2212/7201

Abstract: In some embodiments, the memory system for communicating with a host includes a non-volatile memory device storing first mapping information, a volatile memory device storing second mapping information, and a memory controller. The first mapping information indicates a relationship between a logical address and a portion of a first physical address. The first physical address indicates a location where user data is stored. The second mapping information indicates a second relationship between the logical address and a second physical address that corresponds to a remaining portion of the first physical address. The memory controller is configured to obtain a target logical address that has been received from the host, and determine, based on the second mapping information, a target second physical address mapped to the target logical address. The non-volatile memory device is configured to obtain a target first physical address by using the first mapping information.

公开(公告)号：US20240056520A1

公开(公告)日：2024-02-15

申请号：US18313722

申请日：2023-05-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngsub KIM ,  Jungho PARK ,  Kwanghyun BAEK ,  Jungyub LEE ,  Juneseok LEE ,  Dohyuk HA

IPC: H04M1/02 ,  H05K1/14 ,  H05K1/02

CPC classification number: H04M1/0277 ,  H05K1/144 ,  H05K1/028 ,  H05K2201/041 ,  H05K2201/10734 ,  H05K2201/10098

Abstract: In various embodiments, a module for a wireless communication includes: a radiator, a plurality of resonators, a first substrate on which the radiator and the plurality of resonators are disposed, and a second substrate including a power supply. The first substrate includes a plurality of first layers. The second substrate includes a plurality of second layers. The radiator is disposed on a radiation layer of the plurality of first layers of the first substrate. The plurality of resonators is disposed on a resonance layer of the plurality of first layers of the first substrate. At least part of the plurality of resonators in the resonance layer is disposed in an area in the radiation layer, different from an area in which the radiator is disposed.

公开(公告)号：US20230299506A1

公开(公告)日：2023-09-21

申请号：US18192910

申请日：2023-03-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghoon PARK ,  Kwanghyun BAEK ,  Juneseok LEE ,  Dohyuk HA ,  Jungho PARK ,  Youngju LEE ,  Jungyub LEE ,  Jinsu HEO

IPC: H01Q21/28 ,  H01Q1/22

CPC classification number: H01Q21/28 ,  H01Q1/2283

Abstract: The disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting a higher data transmission rate than a 4th generation (4G) communication system such as long term evolution (LTE). An antenna module is provided. The antenna module includes a plurality of antennas, a first printed circuit board (PCB) on which the plurality of antennas are disposed, a second PCB on which one or more elements for processing a radio frequency (RF) signal are disposed, and an adhesive material for bonding the first PCB and the second PCB, wherein the first PCB includes a first metal layer, a second metal layer, a dielectric, and a coupling structure plated along the first metal layer, the second metal layer, and a via hole between the first metal layer and the second metal layer, and may be disposed to provide a coupling connection through the coupling structure of the first PCB.

公开(公告)号：US20230148218A1

公开(公告)日：2023-05-11

申请号：US18153601

申请日：2023-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeonho JANG ,  Jongyoun KIM ,  Jungho PARK ,  Jaegwon JANG

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/49816 ,  H01L23/49822 ,  H01L21/4857 ,  H01L23/49866 ,  H01L23/49838 ,  H01L24/16 ,  H01L21/4853 ,  H01L2224/16227

Abstract: A semiconductor package includes a semiconductor chip; a redistribution insulating layer including a first opening; an external connection bump including a first part in the first opening; a lower bump pad including a first surface in physical contact with the first part of the external connection bump and a second surface opposite to the first surface, wherein the first surface and the redistribution insulating layer partially overlap; and a redistribution pattern that electrically connects the lower bump pad to the semiconductor chip.

公开(公告)号：US20230019144A1

公开(公告)日：2023-01-19

申请号：US17946688

申请日：2022-09-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juneseok LEE ,  Youngsub KIM ,  Sanghoon PARK ,  Jungho PARK ,  Kwanghyun BAEK ,  Youngju LEE ,  Jungyub LEE ,  Dohyuk HA ,  Jinsu HEO

IPC: H01Q1/22 ,  H01Q1/24 ,  H01Q1/38

Abstract: The disclosure relates to a pre-5th-Generation (5G) or 5G communication system for supporting higher data rates Beyond 4th-Generation (4G) communication system, such as long term evolution (LTE). An antenna device is provided. The antenna device includes a first printed circuit board (PCB), a second PCB for a plurality of antenna elements, and a radio frequency integrated circuit (RFIC) coupled through a first surface of the first PCB. The second PCB may include a radio frequency (RF) routing layer including RF lines for the respective plurality of antenna elements. The first PCB may include a feeding structure for connecting the RF routing layer and the RFIC. The second PCB may be electrically connected to a second surface of the first PCB opposite to the first surface of the first PCB, through a first surface of the second PCB. The second PCB may be coupled to the plurality of antenna elements.