-
公开(公告)号:US11782345B2
公开(公告)日:2023-10-10
申请号:US16704169
申请日:2019-12-05
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chien-Chih Chen , Ching-Yu Chang
IPC: G03F7/038 , G03F7/039 , G03F7/09 , G03F7/004 , G03F7/20 , G03F7/16 , G03F7/32 , G03F7/11 , G03F7/38 , C09D165/00 , C09D5/00
CPC classification number: G03F7/091 , C09D5/006 , C09D165/00 , G03F7/038 , G03F7/039 , G03F7/11 , G03F7/162 , G03F7/168 , G03F7/2004 , G03F7/2006 , G03F7/322 , G03F7/38
Abstract: A method according to the present disclosure includes providing a substrate, depositing an underlayer over the substrate, depositing a photoresist layer over the underlayer, exposing a portion of the photoresist layer and a portion of the underlayer to a radiation source according to a pattern, baking the photoresist layer and underlayer, and developing the exposed portion of the photoresist layer to transfer the pattern to the photoresist layer. The underlayer includes a polymer backbone, a polarity switchable group, a cross-linkable group bonded to the polymer backbone, and photoacid generator. The polarity switchable group includes a first end group bonded to the polymer backbone, a second end group including fluorine, and an acid labile group bonded between the first end group and the second end group. The exposing decomposes the photoacid generator to generate an acidity moiety that detaches the second end group from the polymer backbone during the baking.
-
公开(公告)号:US11703766B2
公开(公告)日:2023-07-18
申请号:US17814773
申请日:2022-07-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jing Hong Huang , Chien-Wei Wang , Shang-Wern Chang , Ching-Yu Chang
IPC: G03F7/38
CPC classification number: G03F7/38
Abstract: A method includes forming a bottom layer over a semiconductor substrate, where the bottom layer includes a polymer bonded to a first cross-linker and a second cross-linker, the first cross-linker being configured to be activated by ultraviolet (UV) radiation and the second cross-linker being configured to be activated by heat at a first temperature. The method then proceeds to exposing the bottom layer to a UV source to activate the first cross-linker, resulting in an exposed bottom layer, where the exposing activates the first cross-linker. The method further includes baking the exposed bottom layer, where the baking activates the second cross-linker.
-
公开(公告)号:US11681226B2
公开(公告)日:2023-06-20
申请号:US17121261
申请日:2020-12-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: An-Ren Zi , Joy Cheng , Ching-Yu Chang
CPC classification number: G03F7/26 , G03F7/0043 , G03F7/162 , G03F7/168 , G03F7/3057 , G03F7/38 , H01L21/0206 , H01L21/0209 , H01L21/0274 , G03F7/40
Abstract: A photoresist layer is coated over a wafer. The photoresist layer includes a metal-containing material. An extreme ultraviolet (EUV) lithography process is performed to the photoresist layer to form a patterned photoresist. The wafer is cleaned with a cleaning fluid to remove the metal-containing material. The cleaning fluid includes a solvent having Hansen solubility parameters of delta D in a range between 13 and 25, delta P in a range between 3 and 25, and delta H in a range between 4 and 30. The solvent contains an acid with an acid dissociation constant less than 4 or a base with an acid dissociation constant greater than 9.
-
公开(公告)号:US11676852B2
公开(公告)日:2023-06-13
申请号:US17119692
申请日:2020-12-11
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wei-Ren Wang , Shing-Chyang Pan , Ching-Yu Chang , Wan-Lin Tsai , Jung-Hau Shiu , Tze-Liang Lee
IPC: H01L21/76 , H01L21/768 , H01L21/311 , H01L21/02 , H01L21/033
CPC classification number: H01L21/76802 , H01L21/0228 , H01L21/02167 , H01L21/02211 , H01L21/02274 , H01L21/0337 , H01L21/31144 , H01L21/76879
Abstract: Semiconductor devices and methods of forming semiconductor devices are provided. A method includes forming a first mask layer over an underlying layer, patterning the first mask layer to form a first opening, forming a non-conformal film over the first mask layer, wherein a first thickness of the non-conformal film formed on the top surface of the first mask layer is greater than a second thickness of the non-conformal film formed on a sidewall surface of the first mask layer, performing a descum process, wherein the descum process removes a portion of the non-conformal film within the first opening, and etching the underlying layer using the patterned first mask layer and remaining portions of the non-conformal film as an etching mask.
-
公开(公告)号:US20230154753A1
公开(公告)日:2023-05-18
申请号:US17686184
申请日:2022-03-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jung-Hau Shiu , Ching-Yu Chang , Wei-Ren Wang , JeiMing Chen
IPC: H01L21/033 , H01L21/311
CPC classification number: H01L21/0337 , H01L21/31116 , H01L21/31144
Abstract: Methods of patterning semiconductor devices and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a first dielectric layer over a semiconductor substrate; forming a first hard mask layer over the first dielectric layer; etching the first hard mask layer to form a first opening exposing a top surface of the first dielectric layer; performing a plasma treatment process on the top surface of the first dielectric layer and a top surface of the first hard mask layer; after performing the plasma treatment process, selectively depositing a spacer on a side surface of the first hard mask layer, the top surface of the first dielectric layer and the top surface of the first hard mask layer being free from the spacer after selectively depositing the spacer; and etching the first dielectric layer using the spacer as a mask.
-
公开(公告)号:US11482411B2
公开(公告)日:2022-10-25
申请号:US16916499
申请日:2020-06-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ching-Yu Chang , Jei Ming Chen , Tze-Liang Lee
IPC: H01L21/02 , H01L21/768 , H01L21/308 , H01L21/3065
Abstract: A method of forming a semiconductor device includes forming a mask layer over a substrate and forming an opening in the mask layer. A gap-filling material is deposited in the opening. A plasma treatment is performed on the gap-filling material. The height of the gap-filling material is reduced. The mask layer is removed. The substrate is patterned using the gap-filling material as a mask.
-
公开(公告)号:US11387104B2
公开(公告)日:2022-07-12
申请号:US16889506
申请日:2020-06-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Siao-Shan Wang , Ching-Yu Chang , Chin-Hsiang Lin
IPC: H01L21/033 , H01L21/027 , G03F7/40
Abstract: A method for lithography patterning includes forming an opening in a first layer over a substrate and coating a grafting solution over the first layer and filling in the opening. The grafting solution comprises a grafting compound and a solvent. The grafting compound comprises a grafting unit chemically bonded to a linking unit chemically bonded to a polymer backbone. The grafting unit is attachable to the first layer. The method further includes curing the grafting solution so that a first portion of the grafting compound is attached to a surface of the first layer, thereby forming a second layer over the surface of the first layer. The method further includes transferring a pattern including the first layer and the second layer to the substrate.
-
公开(公告)号:US11320738B2
公开(公告)日:2022-05-03
申请号:US16366290
申请日:2019-03-27
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chien-Wei Wang , Ching-Yu Chang , Shang-Wern Chang , Yen-Hao Chen
Abstract: In a pattern formation method, a bottom layer is formed over an underlying layer. A middle layer is formed over the bottom layer. A resist pattern is formed over the middle layer. The middle layer is patterned by using the resist pattern as an etching mask. The bottom layer is patterned by using the patterned middle layer. The underlying layer is patterned. The middle layer contains silicon in an amount of 50 wt % or more and an organic material. In one or more of the foregoing and following embodiments, an annealing operation is further performed after the middle layer is formed.
-
公开(公告)号:US11281107B2
公开(公告)日:2022-03-22
申请号:US16905016
申请日:2020-06-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ming-Hui Weng , Ching-Yu Chang , Chin-Hsiang Lin
IPC: G03F7/40 , H01L21/027 , G03F7/30 , G03F7/20
Abstract: Methods for performing a lithography process are provided. The method for performing a lithography process includes forming a resist layer over a substrate and exposing a portion of the resist layer to form an exposed portion between unexposed portions. The method for performing a lithography process further includes developing the resist layer to remove the exposed portion of the resist layer such that an opening is formed between the unexposed portions and forming a post treatment coating material in the opening and over the unexposed portions of the resist layer. The method for performing a lithography process further includes reacting a portion of the unexposed portions of the resist layer with the post treatment coating material by performing a post treatment process and removing the post treatment coating material.
-
公开(公告)号:US11276568B2
公开(公告)日:2022-03-15
申请号:US16732146
申请日:2019-12-31
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yu-Ling Chang Chien , Chien-Chih Chen , Chin-Hsiang Lin , Ching-Yu Chang , Yahru Cheng
IPC: C09D125/06 , C09D125/18 , C09D133/12 , H01L21/02 , H01L21/027 , H01L21/311 , C09D125/16 , H01L21/768 , H01L21/033
Abstract: In a method of manufacturing a semiconductor device, an underlying structure is formed. A surface grafting layer is formed on the underlying structure. A photo resist layer is formed on the surface grafting layer. The surface grafting layer includes a coating material including a backbone polymer, a surface grafting unit coupled to the backbone polymer and an adhesion unit coupled to the backbone polymer.
-
-
-
-
-
-
-
-
-