CIRCUIT BOARD STRUCTURE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20220256717A1

    公开(公告)日:2022-08-11

    申请号:US17234805

    申请日:2021-04-20

    Abstract: A circuit board structure includes a first sub-board including a plurality of circuit patterns, a second sub-board including a plurality of pads, and a connecting structure layer having a plurality of through holes and including an insulating layer, first and second adhesive layers, and a plurality of conductive blocks. The first adhesive layer is directly connected to the first sub-board. The second adhesive layer is directly connected to the second sub-board. The through holes penetrate through the first adhesive layer, the insulating layer, and the second adhesive layer. The conductive blocks are located in the through holes. An upper surface and a lower surface of each conductive block are respectively lower than a first surface of the first adhesive layer and a second surface of the second adhesive layer relatively away from the insulating layer. Each circuit pattern contacts the upper surface, and each pad contacts the lower surface.

    CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF AND ELECTRONIC DEVICE

    公开(公告)号:US20220240369A1

    公开(公告)日:2022-07-28

    申请号:US17574551

    申请日:2022-01-13

    Abstract: A circuit board includes a first dielectric material, a second dielectric material, a third dielectric material, a first external circuit layer, a second external circuit layer, multiple conductive structures, and a conductive via structure. Dielectric constants of the first, the second and the third dielectric materials are different. The first and the second external circuit layers are respectively disposed on the first and the third dielectric materials. The conductive via structure at least penetrates the first and the second dielectric materials and is electrically connected to the first and the second external circuit layers to define a signal path. The conductive structures are electrically connected to each other and surround the first, the second and the third dielectric materials. The conductive structures are electrically connected to the first and the second external circuit layers to define a ground path surrounding the signal path.

    CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF AND ELECTRONIC DEVICE

    公开(公告)号:US20220232694A1

    公开(公告)日:2022-07-21

    申请号:US17496791

    申请日:2021-10-08

    Abstract: Provided is a circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The second substrate is disposed between the first substrate and the third substrate. The third substrate is disposed between the second substrate and the fourth substrate. The third substrate has an opening penetrating the third substrate and includes a first dielectric layer filling the opening. The conductive via structure penetrates the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate, and is electrically connected to the first substrate and the fourth substrate to define a signal path. The first substrate, the second substrate, the third substrate and the fourth substrate are electrically connected through the conductive structures to define a ground path, and the ground path surrounds the signal path.

    CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20220095464A1

    公开(公告)日:2022-03-24

    申请号:US17224078

    申请日:2021-04-06

    Abstract: A circuit board includes a composite structure layer, at least one conductive structure, a thermally conductive substrate, and a thermal interface material layer. The composite structure layer has a cavity and includes a first structure layer, a second structure layer, and a connecting structure layer. The first structure layer includes at least one first conductive member, and the second structure layer includes at least one second conductive member. The cavity penetrates the first structure layer and the connecting structure layer to expose the second conductive member. The conductive structure at least penetrates the connecting structure layer and is electrically connected to the first conductive member and the second conductive member. The thermal interface material layer is disposed between the composite structure layer and the thermally conductive substrate, and the second structure layer is connected to the thermally conductive substrate through the thermal interface material layer.

    CIRCUIT BOARD STRUCTURE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20220071015A1

    公开(公告)日:2022-03-03

    申请号:US17191559

    申请日:2021-03-03

    Abstract: A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first sub-circuit board, the second sub-circuit board, and the third sub-circuit board are electrically connected to one another.

    Multilayer circuit board structure and manufacturing method thereof

    公开(公告)号:US10736215B1

    公开(公告)日:2020-08-04

    申请号:US16421467

    申请日:2019-05-23

    Abstract: A multilayer circuit board structure includes a first multilayer circuit board and a second multilayer circuit board. The first multilayer circuit board includes a first patterned circuit layer and a first dummy circuit layer. The first dummy circuit layer surrounds the first patterned circuit layer. The second multilayer circuit board is disposed on the first multilayer circuit board, and includes a second patterned circuit layer and a second dummy circuit layer surrounding the second patterned circuit layer. The first patterned circuit layer is bonded to the second patterned circuit layer and the first dummy circuit layer is bonded to the second dummy circuit layer. A hollow space is defined between the first multilayer circuit board and the second multilayer circuit board.

    STRUCTURE AND MANUFACTURING METHOD OF HEAT DISSIPATION SUBSTRATE AND PACKAGE STRUCTURE AND METHOD THEREOF

    公开(公告)号:US20190067543A1

    公开(公告)日:2019-02-28

    申请号:US15826702

    申请日:2017-11-30

    Abstract: A heat dissipation substrate structure includes a multilayer circuit board including a core board and build-up boards, a heat conduction layer, a cavity structure, bonding pads, and vias. The heat conduction layer is disposed within the core board, or on a surface of the core board, or on a surface of one of the build-up boards. The cavity structure is in the multilayer circuit board with respect to the heat conduction layer and exposes a first surface of the heat conduction layer. The bonding pads are on the surface of the multilayer circuit board at a side of a second surface of the heat conduction layer. The portions of the vias are connected to portions of the bonding pads and the heat conduction layer. Accordingly, heat flow can be distributed via a heat dissipation path from the bonding pads through the vias to the heat conduction layer.

    CHIP PACKAGE CIRCUIT BOARD MODULE
    20.
    发明申请

    公开(公告)号:US20180368263A1

    公开(公告)日:2018-12-20

    申请号:US15622078

    申请日:2017-06-14

    Abstract: A chip package circuit board module including a circuit board and at least one original chip is provided. The circuit board includes at least one first pad, at least one second pad and at least one substitute pad. The at least one second pad is located besides the at least one first pad and separated from the at least one first pad. The at least one substitute pad is adjacent to the at least one second pad and separated from the at least one first pad and the at least one second pad. The at least one original chip is connected to the at least one first pad and at least one the second pad, respectively. A total width of a portion corresponding to each of the at least one second pad and a portion corresponding to the substitute pad adjacent to the second pad of the first pad is greater than or equal to twice a width of the original chip.

Patent Agency Ranking