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    Built-up substrate, method for manufacturing same, and semiconductor integrated circuit package
    15.
    发明授权
    Built-up substrate, method for manufacturing same, and semiconductor integrated circuit package 有权
    建立基板，制造方法及半导体集成电路封装

    公开(公告)号：US09236338B2

    公开(公告)日：2016-01-12

    申请号：US14122323

    申请日：2012-10-29

    Applicant: Panasonic Corporation

    Inventor： Seiichi Nakatani ,  Koji Kawakita ,  Susumu Sawada ,  Yoshihisa Yamashita

    IPC: H01L21/48 ,  H05K1/03 ,  H01L23/498 ,  H05K3/46 ,  H01L23/15 ,  H01L23/373

    CPC classification number: H01L23/49822 ,  H01L21/4857 ,  H01L23/15 ,  H01L23/3731 ,  H01L23/49827 ,  H01L2224/16225 ,  H05K1/0306 ,  H05K1/0313 ,  H05K3/4673 ,  H05K3/4682 ,  H05K2201/017 ,  H05K2201/0175 ,  H05K2203/0126 ,  H05K2203/0514 ,  H05K2203/1366

    Abstract: A method for manufacturing a build-up substrate, the build-up substrate comprising an insulating layer and a wiring pattern layer stacked over a circuit substrate, said method comprising the steps of: (i) applying a photoactive metal oxide precursor material to one or both sides of the circuit substrate with a wiring pattern, and drying the applied photoactive metal oxide precursor material to form an insulating film; (ii) forming an opening for a via hole in the insulating film by exposure and development of the insulating film; (iii) applying a heat treatment to the insulating film to convert the insulating film into a metal oxide film, thereby forming a build-up insulating layer of the metal oxide film; and (iv) plating the build-up insulating layer to form via holes in the openings, forming a metal layer on the build-up insulating layer, and etching the metal layer to form a build-up wiring pattern; and (v) repeating the steps from (i) to (iv) at least one time.

    Abstract translation: 一种用于制造积聚基板的方法，所述堆积基板包括层叠在电路基板上的绝缘层和布线图案层，所述方法包括以下步骤：（i）将光活性金属氧化物前体材料施加到一个或 电路基板的两侧具有布线图案，并干燥所施加的光活性金属氧化物前体材料以形成绝缘膜; （ii）通过曝光和显影绝缘膜形成绝缘膜中的通孔的开口; （iii）对绝缘膜进行热处理以将绝缘膜转换为金属氧化物膜，由此形成金属氧化物膜的堆积绝缘层; 和（iv）电镀积层绝缘层以在开口中形成通孔，在积层绝缘层上形成金属层，并蚀刻金属层以形成积聚布线图案; 和（v）至少一次重复（i）至（iv）的步骤。

    Embedded thin films
    18.
    发明授权
    Embedded thin films 有权
    嵌入式薄膜

    公开(公告)号：US08882983B2

    公开(公告)日：2014-11-11

    申请号：US12482202

    申请日：2009-06-10

    Applicant: Junghyun Cho ,  Bahgat Sammakia ,  Mark D. Poliks ,  Roy Magnuson ,  Biplab Kumar Roy

    Inventor： Junghyun Cho ,  Bahgat Sammakia ,  Mark D. Poliks ,  Roy Magnuson ,  Biplab Kumar Roy

    IPC: C25D9/08 ,  C25D5/48 ,  H05K1/16 ,  H05K3/18

    CPC classification number: H05K3/0011 ,  C25D5/48 ,  C25D9/08 ,  C25D21/12 ,  H05K1/0306 ,  H05K1/09 ,  H05K1/162 ,  H05K1/167 ,  H05K3/184 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2203/092 ,  H05K2203/135 ,  H05K2203/163

    Abstract: A method for forming a film on a conductive substrate, comprising immersing a substrate having a conductive portion in a solution comprising a metal ion ceramic precursor for the film and a peroxide; applying a voltage potential to the conductive portion with respect to a counter electrode in the solution, sufficient to protect the conductive portion from corrosion by the solution, and drive formation of a film on the substrate, controlling a pH of the solution while limiting a production of hydrogen by electrolysis of the solution proximate to the conductive portion; and maintaining the voltage potential for a sufficient duration to produce a film on the conductive portion. An electrode may be formed over the film to produce an electrical device. The film may be, for example, insulating, dielectric, resistive, semiconductive, magnetic, or ferromagnetic.

    Abstract translation: 一种在导电性基板上形成膜的方法，其特征在于，将具有导电性部分的基板浸渍在包含所述膜的金属离子陶瓷前体和过氧化物的溶液中; 对导电部分相对于溶液中的对电极施加电压电位，足以保护导电部分免受溶液的腐蚀，并且驱动在衬底上形成膜，控制溶液的pH，同时限制生产 的氢气通过电解接近导电部分的溶液; 并且保持电压电势足够的持续时间以在导电部分上产生膜。 可以在膜上形成电极以产生电气装置。 该膜可以是例如绝缘，电介质，电阻，半导体，磁性或铁磁性的。

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