公开(公告)号：US20120292091A1

公开(公告)日：2012-11-22

申请号：US13563258

申请日：2012-07-31

Applicant: Sang-Guk Han ,  Seok-Joon Moon

Inventor： Sang-Guk Han ,  Seok-Joon Moon

IPC: H05K1/11

CPC classification number: H01L25/0657 ,  G01R31/2808 ,  G01R31/2818 ,  G11C5/02 ,  G11C5/025 ,  G11C5/06 ,  G11C29/04 ,  G11C29/12 ,  G11C29/56 ,  G11C29/56016 ,  G11C2029/5602 ,  H01L22/30 ,  H01L22/32 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/538 ,  H01L24/09 ,  H01L24/48 ,  H01L24/49 ,  H01L24/80 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/0912 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4912 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/181 ,  H05K1/0268 ,  H05K1/111 ,  H05K1/117 ,  H05K1/181 ,  H05K3/002 ,  H05K3/245 ,  H05K3/28 ,  H05K3/288 ,  H05K3/323 ,  H05K2201/0187 ,  H05K2201/035 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/099 ,  H05K2201/10159 ,  H05K2203/162 ,  Y10T29/49117 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided.

Abstract translation: 提供具有印刷电路板的电子设备。 在一个实施例中，印刷电路板包括要与外部装置耦合的多个外部焊盘和用于测试电路的多个旁路焊盘。 外部焊盘被暴露，并且多个旁路焊盘中的至少一个不暴露于PCB的外表面。 还提供了使用电子设备的系统和测试电子设备的方法。

公开(公告)号：US08026851B2

公开(公告)日：2011-09-27

申请号：US11909570

申请日：2006-03-22

Applicant: Kiyohiko Itoh ,  Kentaro Mori

Inventor： Kiyohiko Itoh ,  Kentaro Mori

IPC: H01Q1/38

CPC classification number: H01Q1/38 ,  G06K19/0775 ,  G06K19/07779 ,  G06K19/07783 ,  H01Q1/2225 ,  H01Q7/00 ,  H05K3/06 ,  H05K3/061 ,  H05K3/067 ,  H05K3/247 ,  H05K2201/035 ,  H05K2203/0793 ,  Y10T29/49016

Abstract: A planar antenna has a circuit pattern including an antenna part and a connection terminal part on a plastic film, in which the circuit pattern has a metal layer and a heat-sealable conductive layer provided on a surface layer of a connection terminal part of the metal layer. The planar antenna is obtained by forming a circuit pattern including a metal layer on a plastic film, providing a heat-sealable conductive layer in a connection terminal part of the circuit pattern, and then removing an unnecessary part with etching.

Abstract translation: 平面天线具有在塑料薄膜上包括天线部分和连接端子部分的电路图案，其中电路图案具有金属层和设置在金属的连接端子部分的表面层上的可热封的导电层 层。 通过在塑料膜上形成包括金属层的电路图案，在电路图案的连接端子部分中提供可热封的导电层，然后用蚀刻去除不需要的部分，获得平面天线。

公开(公告)号：US07928558B2

公开(公告)日：2011-04-19

申请号：US11631711

申请日：2005-07-06

Applicant: Sebastian Brunner ,  Thomas Feichtinger ,  Günter Pudmich ,  Horst Schlick ,  Patrick Schmidt-Winkel

Inventor： Sebastian Brunner ,  Thomas Feichtinger ,  Günter Pudmich ,  Horst Schlick ,  Patrick Schmidt-Winkel

IPC: H01L23/053 ,  H01L23/12

CPC classification number: H05K3/4061 ,  H01L2924/0002 ,  H05K3/248 ,  H05K3/28 ,  H05K2201/035 ,  Y10T29/49155 ,  H01L2924/00

Abstract: An electrical component includes a base body made using ceramic, metallization surfaces that at least partly define component structures on the base body, a passivation layer that is electrically insulating and over a surface of the base body, solder contacts on the passivation layer, and through-hole contacts inside the base body that are electrically connected to corresponding metallization surfaces. The solder contacts are electrically connected to corresponding through-hole contacts through the passivation layer.

Abstract translation: 电气部件包括使用陶瓷制成的基体，至少部分地限定基体上的部件结构的金属化表面，电绝缘并且在基体的表面上方的钝化层，钝化层上的焊料接触，以及通过 在基体内的电触点与相应的金属化表面电连接。 焊接触头通过钝化层与相应的通孔触点电连接。

公开(公告)号：US07820490B2

公开(公告)日：2010-10-26

申请号：US11450417

申请日：2006-06-12

Applicant: Cynthia W. Berry ,  Alex E. Bailey

Inventor： Cynthia W. Berry ,  Alex E. Bailey

IPC: H01L29/74

CPC classification number: H01L23/49883 ,  H01L23/13 ,  H01L23/49833 ,  H01L2224/73265 ,  H01L2924/09701 ,  H05K1/092 ,  H05K1/182 ,  H05K3/248 ,  H05K3/328 ,  H05K2201/035 ,  H05K2203/049 ,  Y10T29/49018 ,  Y10T29/49078 ,  Y10T29/49155

Abstract: An LTCC (low temperature cofired ceramic) structure which has conductors to which leads are to be bonded for connection to external circuitry. The conductors include additives to promote adhesion to the ceramic layer. The presence of these additives degrade bonding performance. For better bondability of the leads, a pure conductor metal layer, devoid of the additives is placed on the conductors in areas where leads are to be bonded. This pure conductor metal layer may be cofired with the stack of ceramic layers or may be post fired after stack firing.

Abstract translation: LTCC（低温共烧陶瓷）结构，其具有用于连接到外部电路的引线的导体。 导体包括用于促进与陶瓷层的粘附的添加剂。 这些添加剂的存在降低了粘合性能。 为了使引线具有更好的粘合性，在引线要被接合的区域中的导体上放置没有添加剂的纯导体金属层。 该纯导体金属层可以与陶瓷层的堆叠共烧，或者可以在堆叠烧制之后进行烧制。

公开(公告)号：US20100105173A1

公开(公告)日：2010-04-29

申请号：US12603081

申请日：2009-10-21

Applicant: Joji Fujimori

Inventor： Joji Fujimori

IPC: H01L21/60

CPC classification number: H01L24/12 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/11822 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/81011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10329 ,  H01L2924/30105 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/035 ,  H05K2203/0338 ,  Y02P70/613 ,  H01L2224/13099 ,  H01L2924/00014

Abstract: A method for manufacturing a semiconductor device by mounting a semiconductor element on a circuit board, the semiconductor element having a first electrode made of a first material on a semiconductor substrate, the circuit board having a second electrode made of a second material on an insulating substrate, the method includes forming a connecting member on the first electrode, a melting point of the connecting member being lower than a melting point of the first material, placing the semiconductor element on the circuit board, so as to face the connecting member toward the second electrode, and connecting the first electrode and the second electrode, so as to interpose the connecting member between the first electrode and the second electrode, at a temperature that is lower than the melting point of the first material and higher than the melting point of the connecting member.

Abstract translation: 一种通过将半导体元件安装在电路板上来制造半导体器件的方法，所述半导体元件具有由半导体衬底上的第一材料制成的第一电极，所述电路板具有由绝缘衬底上的第二材料制成的第二电极 所述方法包括在所述第一电极上形成连接构件，所述连接构件的熔点低于所述第一材料的熔点，将所述半导体元件放置在所述电路板上，以朝向所述第二电极的所述连接构件 电极，并且连接第一电极和第二电极，以使连接构件在第一电极和第二电极之间的温度低于第一材料的熔点并高于第一电极的熔点 连接构件。

公开(公告)号：US07674984B2

公开(公告)日：2010-03-09

申请号：US11426399

申请日：2006-06-26

Applicant: Tomoyuki Kubo

Inventor： Tomoyuki Kubo

IPC: H05K1/00

CPC classification number: B41J2/14072 ,  H05K1/0271 ,  H05K1/189 ,  H05K3/245 ,  H05K3/3457 ,  H05K2201/035 ,  H05K2201/09781 ,  H05K2201/10681 ,  H05K2201/10689 ,  H05K2201/2009 ,  Y10T428/24917

Abstract: In order to prevent stress caused by bending a flexible wiring board from being applied to the connection section between the flexible wiring board and a driving IC, solder is deposited as a reinforcement member, on both sides of the driving IC connected onto the flexible wiring board.

Abstract translation: 为了防止弯曲柔性布线板施加到柔性布线板和驱动IC之间的连接部分上的应力引起的焊料作为加强件沉积在连接到柔性布线板上的驱动IC的两侧 。

公开(公告)号：US20100006325A1

公开(公告)日：2010-01-14

申请号：US12495860

申请日：2009-07-01

Applicant: Masayuki KITAJIMA ,  Takeshi Ishitsuka ,  Satoshi Emoto

Inventor： Masayuki KITAJIMA ,  Takeshi Ishitsuka ,  Satoshi Emoto

IPC: H05K1/09 ,  H01B1/00 ,  H01B1/22 ,  H01B1/24 ,  H05K3/00 ,  H05K1/00 ,  H05K1/03

CPC classification number: H05K3/249 ,  H05K1/118 ,  H05K2201/0272 ,  H05K2201/035 ,  H05K2201/0769 ,  H05K2203/1105

Abstract: A printed wiring board includes a first conductive paste forming a wiring pattern, and a second conductive paste including kneaded first conductive material and second conductive material whose particles are finer than those of the first conductive material.

Abstract translation: 印刷布线板包括形成布线图案的第一导电浆料和包含捏合的第一导电材料的第二导电浆料和其颗粒比第一导电材料的颗粒更细的第二导电材料。

公开(公告)号：US20090321499A1

公开(公告)日：2009-12-31

申请号：US12439282

申请日：2007-08-23

Applicant: Takeshi Morita ,  Masanori Hiyoshi

Inventor： Takeshi Morita ,  Masanori Hiyoshi

IPC: B23K31/02 ,  B23K3/06 ,  B23K37/00

CPC classification number: H05K3/3484 ,  H05K2201/035 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2203/0139 ,  H05K2203/0338

Abstract: The present invention aims at providing an electronic component mounting apparatus and an electronic component mounting method that perform automated setting of a thickness of a paste film.The electronic component mounting apparatus of the present invention has a paste transfer unit 10 that horizontally, relatively moves a squeegee 11b and a transfer surface 13 with respect to each other, thereby spreading, over the transfer surface 13, a paste film 3 whose thickness is equivalent to the height of a squeegee gap “c” formed from clearance between the squeegee 11b and the transfer surface 13; a storage unit 18 that stores a database defining correlation among bump heights, paste types, and squeegee-gap heights; a computing unit 20 that derives, from the database, a squeegee-gap height G21 in correspondence with a height H1 of a bump of an electronic component to be mounted and a type P2 of paste to be transferred; and a vertical movement mechanism 16b that adjusts the height of the squeegee gap “c” formed from clearance between the squeegee 11b and the transfer surface 13 to a derived squeegee-gap height.

Abstract translation: 本发明的目的在于提供一种执行膏膜厚度的自动设定的电子部件安装装置和电子部件安装方法。 本发明的电子部件安装装置具有：水平方向相对于彼此移动刮板11b和转印面13的浆料转印单元10，从而在转印面13上铺展厚度为 相当于由刮板11b和转印面13之间的间隙形成的刮板间隙“c”的高度; 存储单元18，其存储限定凸起高度，糊剂类型和刮刀间隙高度之间的相关性的数据库; 计算单元20从数据库导出与要安装的电子部件的凸起的高度H1相对应的刮板间隙高度G21和待传送的浆料的类型P2; 以及垂直移动机构16b，其将由刮板11b和转印面13之间的间隙形成的刮板间隙“c”的高度调节到衍生的刮刀间隙高度。

公开(公告)号：US20090067145A1

公开(公告)日：2009-03-12

申请号：US12131474

申请日：2008-06-02

Applicant: Nobuo Kasagi ,  Yasutaka Kataoka

Inventor： Nobuo Kasagi ,  Yasutaka Kataoka

IPC: H05K1/16 ,  H05K3/12 ,  H05K7/00

CPC classification number: H05K3/247 ,  H05K1/095 ,  H05K1/16 ,  H05K1/167 ,  H05K3/3484 ,  H05K2201/035 ,  H05K2203/043 ,  H05K2203/1461

Abstract: In a method of preparing a circuit pattern on a printed circuit board, reflow wiring is performed by printing the circuit pattern on an insulative board with an electroconductive coating material and printing a cream solder in a wiring pattern portion of the circuit pattern to form a metal conductor. Other portions of the printed, electroconductive coating material are arranged to function as any one of a resistor (R), a capacitor (C), and a coil (L), by taking advantage of the resistance and electrostatic capacitance of the electroconductive coating material.

Abstract translation: 在制作印刷电路板上的电路图案的方法中，通过在电路图案的布线图形部分中印刷具有导电涂层材料的绝缘板上的电路图案并印刷奶油焊料来进行回流布线以形成金属 导体。 通过利用导电涂层材料的电阻和静电电容，印刷的导电涂层材料的其它部分被布置成用作电阻器（R），电容器（C）和线圈（L）中的任何一个 。

公开(公告)号：US20090008784A1

公开(公告)日：2009-01-08

申请号：US12152021

申请日：2008-05-12

Applicant: Christian Gobl ,  Heiko Braml

Inventor： Christian Gobl ,  Heiko Braml

IPC: H01L23/48 ,  H01L21/44

CPC classification number: H01L21/4867 ,  C04B35/645 ,  C04B37/021 ,  C04B37/026 ,  C04B2237/124 ,  C04B2237/125 ,  C04B2237/343 ,  C04B2237/407 ,  C04B2237/408 ,  C04B2237/704 ,  C04B2237/706 ,  C04B2237/72 ,  H01L23/3735 ,  H01L23/49811 ,  H01L24/48 ,  H01L25/072 ,  H01L2224/05644 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/75317 ,  H01L2224/85444 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K1/0306 ,  H05K3/06 ,  H05K3/1283 ,  H05K3/247 ,  H05K2201/0133 ,  H05K2201/035 ,  H05K2203/0191 ,  H05K2203/0278 ,  H05K2203/1131 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A power semiconductor substrate comprising an insulating planar base, at least one conductor track and at least one contact area as part of the conductor track, wherein a layer of a metallic material is disposed on the contact area by means of pressure sintering. The associated method comprises the steps of: producing a power semiconductor substrate that includes a planar insulating base, conductor tracks and contact areas; arranging a pasty layer, composed of a metallic material and a solvent, on at least one contact area of the power semiconductor substrate; and applying pressure to the pasty layer.

Abstract translation: 一种功率半导体衬底，包括绝缘平面基底，至少一个导体轨道和作为导体轨道的一部分的至少一个接触区域，其中金属材料层通过压力烧结设置在接触区域上。 相关方法包括以下步骤：产生功率半导体衬底，其包括平面绝缘基底，导体轨迹和接触区域; 在所述功率半导体衬底的至少一个接触区域上布置由金属材料和溶剂组成的糊状层; 并向糊状层施加压力。