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11.发明申请公开(公告)号：US20180263115A1
公开(公告)日：2018-09-13
申请号：US15841439
申请日：2017-12-14
Applicant: SHENGYI TECHNOLOGY CO., LTD.
Inventor： Minshe SU , Duye LI , Shanyin YAN , Qianfa LIU , Zhongqiang YANG
CPC classification number: H05K1/0373 , B32B5/26 , B32B17/02 , B32B25/16 , B32B2262/101 , B32B2307/204 , C08J5/24 , C08J2300/24 , C08J2325/10 , C08J2400/26 , C08J2423/16 , H05K1/0237 , H05K1/0366 , H05K2201/0154 , H05K2201/0278 , H05K2201/068
Abstract: The present invention relates to a composite, a high-frequency circuit substrate prepared therefrom and a process for preparing the same. Such composite comprises (1) from 20 to 70 parts by weight of a thermosetting mixture, comprising (A) a thermosetting resin based on polybutadiene or a copolymer resin of polybutadiene and styrene having a molecular weight of 11,000 or less, being composed of carbon and hydrogen elements and containing 60% or more of vinyl groups, and (B) an ethylene-propylene rubber having a weight-average molecular weight of greater than 100,000 and less than 150,000 and a number-average molecular weight of greater than 60,000 and less than 100,000 and being in a solid state at room temperature; (2) from 10 to 60 parts by weight of a glass fiber cloth; (3) from 0 to 70 parts by weight of a powder filler; and (4) from 1 to 3 parts by weight of a curing initiator. The composite of the present invention has good solvent solubility and good process operability. The high-frequency circuit substrate made by using the composite has good high frequency dielectric properties and better thermal oxidative aging performance.
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12.发明申请公开(公告)号：US20180255649A1
公开(公告)日：2018-09-06
申请号：US15760487
申请日：2016-09-16
Applicant: AT&S (China) Co. Ltd.
Inventor： Annie Tay , Nikolaus Bauer-Oeppinger , Giordano DiGregorio , Philips DAI
CPC classification number: H05K3/4682 , H05K1/0269 , H05K1/0271 , H05K3/0097 , H05K3/022 , H05K3/108 , H05K3/32 , H05K3/4007 , H05K3/4638 , H05K2201/068 , H05K2201/09918 , H05K2201/09936 , H05K2203/0156 , H05K2203/0264 , H05K2203/1536
Abstract: A semifinished product with a sacrificial structure and two component carriers releasably formed on opposing main surfaces of the sacrificial structure. The sacrificial structure includes a central structure and releasing layers on or over both opposing main surfaces of the central structure The central structure includes a dummy core being covered, in particular fully, on or over both main surfaces thereof with a respective one of two spatially separated sections of separate material, in particular separate dielectric material.
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公开(公告)号：US10039180B2
公开(公告)日：2018-07-31
申请号：US15511841
申请日：2016-04-05
Inventor： Samson Shahbazi , Steven Grabey , Mark Challingsworth , Ryan Persons
IPC: C03C8/16 , H05K1/02 , C03C8/20 , C03C8/02 , C03C3/062 , C03C3/076 , C03C4/16 , C09K5/14 , H05K1/05 , H05K3/46 , C03B19/00
CPC classification number: H05K1/0204 , C03B19/00 , C03C3/062 , C03C3/076 , C03C4/16 , C03C8/02 , C03C8/16 , C03C8/20 , C03C2204/00 , C03C2205/00 , C09K5/14 , H05K1/0209 , H05K1/0271 , H05K1/0373 , H05K1/05 , H05K1/056 , H05K3/4608 , H05K2201/0209 , H05K2201/068
Abstract: A dielectric tape suitable for use in an electronic device is provided. A dielectric slip composition comprises an organic vehicle and a dielectric glass composition comprising at least about 20 wt % and no more than about 50 wt % silicon dioxide, based upon 100% total weight of the glass composition, at least about 10 wt % and no more than about 50 wt % alkali metal oxides, based upon 100% total weight of the glass composition, and at least about 1 wt % and no more than about 10 wt % of at least one transition metal oxide. A method of forming an electronic device is also provided. The method includes the steps of applying at least one dielectric tape to at least one non-planar surface of a substrate, and subjecting the at least one dielectric tape to one or more thermal treatment steps to form a dielectric layer.
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14.发明授权公开(公告)号：US10015879B2
公开(公告)日：2018-07-03
申请号：US15416663
申请日：2017-01-26
Applicant: Corning Incorporated
Inventor： Daniel Warren Hawtof , Archit Lal , Jen-Chieh Lin , Gary Richard Trott
CPC classification number: H05K1/024 , H01Q1/12 , H01Q1/38 , H01Q9/04 , H01Q9/285 , H05K1/0271 , H05K1/028 , H05K1/0306 , H05K1/115 , H05K3/381 , H05K2201/068 , H05K2201/10098
Abstract: A high silica content substrate, such as for a device, is provided. The substrate has a high silica content and is thin. The substrate may include a surface with a topography or profile that facilitates bonding with a conductive metal layer, such as a metal layer for a circuit or antenna. The substrate may be flexible, have high temperature resistance, very low CTE, high strength and/or be non-reactive. The substrate may be suitable for use in circuits intended for use in high temperature environments, low temperature environments, reactive environments, or other harsh environments. The substrate may be suitable for high frequency antenna applications.
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公开(公告)号：US09991311B2
公开(公告)日：2018-06-05
申请号：US14642563
申请日：2015-03-09
Applicant: Joseph T. Smith , Michael Marrs
Inventor： Joseph T. Smith , Michael Marrs
IPC: H01L27/146 , H01L31/105 , H01L31/0392 , G01N23/04 , H01L21/683 , H01L29/66 , H01L29/786 , H05K1/03
CPC classification number: H01L27/14663 , G01N23/04 , H01L21/6835 , H01L27/1203 , H01L27/1218 , H01L27/1225 , H01L27/14636 , H01L29/66765 , H01L29/66969 , H01L29/78603 , H01L29/78648 , H01L29/7869 , H01L31/03926 , H01L31/105 , H01L2221/6835 , H01L2924/3025 , H05K1/0393 , H05K2201/0145 , H05K2201/0154 , H05K2201/068 , H05K2201/10128
Abstract: Some embodiments include an imaging system. The imaging system includes an active matrix pixel array having a flexible substrate and a pixel. The pixel includes a transistor over the flexible substrate, and the transistor includes multiple active layers having a first active layer and a second active layer over the first active layer. Further, the active matrix pixel array also includes a photodiode over the transistor, and the photodiode includes an N-type layer over the transistor, an I layer over the N-type layer, and a P-type layer over the I layer. Meanwhile, the imaging system also includes a flexible scintillator layer over the active matrix pixel array. Other embodiments of related systems and methods are also disclosed.
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Patent Agency Ranking
公开(公告)号：US20180063951A1
公开(公告)日：2018-03-01
申请号：US15251230
申请日：2016-08-30
Inventor： Nitesh Kumbhat , Li Sun , Aaron Lee , Deog-Soon Choi , Hyun-Mo Ku , Jack Ajoian
CPC classification number: H05K1/111 , H05K1/0271 , H05K1/0373 , H05K1/185 , H05K3/0014 , H05K9/0081 , H05K2201/068 , H05K2201/10977
Abstract: A process for forming an encapsulating mold compound into a molded solder mask on a bottom surface of a PCB is provided that allows the molded solder mask to have a very precise, preselected thickness, or height, while also ensuring that no gaps between the solder mask and side walls of the electrical contact pads exist. A circuit board and circuit board assembly that incorporate the molded solder mask are also provided. The molded solder mask is fabricated in such a way that overlap between the molded solder mask and the electrical contact pads and gaps between the molded solder mask and the side walls of the electrical contact pads are avoided. In addition, the molded solder mask allows the pitch between adjacent electrical contact pads to be greatly reduced compared to the pitch that is possible using a traditional solder mask formed by the traditional photolithographic approach.
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公开(公告)号：US09907169B1
公开(公告)日：2018-02-27
申请号：US15251230
申请日：2016-08-30
Inventor： Nitesh Kumbhat , Li Sun , Aaron Lee , Deog-Soon Choi , Hyun-Mo Ku , Jack Ajoian
CPC classification number: H05K1/111 , H05K1/0271 , H05K1/0373 , H05K1/185 , H05K3/0014 , H05K9/0081 , H05K2201/068 , H05K2201/10977
Abstract: A process for forming an encapsulating mold compound into a molded solder mask on a bottom surface of a PCB is provided that allows the molded solder mask to have a very precise, preselected thickness, or height, while also ensuring that no gaps between the solder mask and side walls of the electrical contact pads exist. A circuit board and circuit board assembly that incorporate the molded solder mask are also provided. The molded solder mask is fabricated in such a way that overlap between the molded solder mask and the electrical contact pads and gaps between the molded solder mask and the side walls of the electrical contact pads are avoided. In addition, the molded solder mask allows the pitch between adjacent electrical contact pads to be greatly reduced compared to the pitch that is possible using a traditional solder mask formed by the traditional photolithographic approach.
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公开(公告)号：US20180048079A1
公开(公告)日：2018-02-15
申请号：US15797942
申请日：2017-10-30
Applicant: SAINT-GOBAIN GLASS FRANCE
Inventor： Klaus SCHMALBUCH , Bernhard REUL , Mitja RATEICZAK , Lothar LESMEISTER
CPC classification number: H01R4/187 , H01Q1/3291 , H01R4/02 , H01R4/183 , H01R4/184 , H01R12/53 , H01R12/57 , H01R2201/02 , H01R2201/26 , H05B3/84 , H05B2203/016 , H05K1/0212 , H05K2201/0323 , H05K2201/0326 , H05K2201/068 , Y10T29/49149
Abstract: A pane having an electrical connection element, said pane having: a substrate; an electrically conductive structure in a region of the substrate; and a connection element in a region of the electrically conductive structure, the connection element containing at least a chromium-containing steel. The connection element has a region which is crimped about a connecting cable and connected to the electrically conductive structure by means of a solder.
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19.发明授权公开(公告)号：US09872385B2
公开(公告)日：2018-01-16
申请号：US15180472
申请日：2016-06-13
Applicant: Hyundai Motor Company , Kia Motors Corporation
Inventor： Seung Woo Choi , Sung Cheul Jeong , Ho Sub Kim , Young Do Kim , Cheol Ho Kim
CPC classification number: H05K1/09 , B32B15/08 , B32B15/20 , B32B2250/40 , B32B2307/306 , B32B2307/546 , B32B2307/732 , B32B2307/734 , B32B2457/08 , B32B2605/08 , H05K1/028 , H05K1/0353 , H05K3/0014 , H05K3/4611 , H05K2201/0129 , H05K2201/068
Abstract: Disclosed is a flexible copper clad laminate including a first copper foil layer, a composite layer, and a second copper foil layer. Preferably, the composite layer includes a polyimide layer and a plurality of thermoplastic polyimide layers as an outermost layer thereof being the thermoplastic polyimide layers. In particular, with respect to a total thickness of the composite layer, a total thickness of the plurality of thermoplastic polyimide layers is in a range of from about 15 to about 50%, and a total thickness of the polyimide layer is in a range of from about 50 to about 85%. Each thickness of the first copper foil layer and the second copper foil layer is in a range of from about 30 to about 80 μm, and the total thickness of the composite layer is in a range of from about 40 to about 60 μm.
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公开(公告)号：US09837727B2
公开(公告)日：2017-12-05
申请号：US14424939
申请日：2013-07-10
Applicant: SAINT-GOBAIN GLASS FRANCE
Inventor： Klaus Schmalbuch , Bernhard Reul , Mitja Rateiczak , Lothar Lesmeister
CPC classification number: H01R4/187 , H01Q1/3291 , H01R4/02 , H01R4/183 , H01R4/184 , H01R12/53 , H01R12/57 , H01R2201/02 , H01R2201/26 , H05B3/84 , H05B2203/016 , H05K1/0212 , H05K2201/0323 , H05K2201/0326 , H05K2201/068 , Y10T29/49149
Abstract: A pane having an electrical connection element, said pane having: a substrate; an electrically conductive structure in a region of the substrate; and a connection element in a region of the electrically conductive structure, the connection element containing at least a chromium-containing steel. The connection element has a region which is crimped about a connecting cable and connected to the electrically conductive structure by means of a solder.
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