公开(公告)号：US20230262882A1

公开(公告)日：2023-08-17

申请号：US17651436

申请日：2022-02-17

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hiroyuki Mori

IPC: H05K1/02 ,  G01B21/24

CPC classification number: H05K1/0269 ,  G01B21/24 ,  H05K2201/09936

Abstract: Embodiments of present invention provide a multilayer printed circuit board. The printed circuit board includes a first conducting layer (CL) having a first measurement mark area (MMA) and a second CL having a second MMA. A first polygonal measurement mark (MM) in the first MMA and a second and a third polygonal MM in the second MMA, wherein the second polygonal MM is positioned along an extended first angle bisector bisecting a first vertex of the first polygonal MM and a first vertex of the second polygonal MM is substantially aligned with the first vertex of the first polygonal MM, and wherein the third polygonal MM is positioned along an extended second angle bisector bisecting a second vertex of the first polygonal MM and a first vertex of the third polygonal MM is substantially aligned with the second vertex of the first polygonal MM.

公开(公告)号：US20180255649A1

公开(公告)日：2018-09-06

申请号：US15760487

申请日：2016-09-16

Applicant: AT&S (China) Co. Ltd.

Inventor： Annie Tay ,  Nikolaus Bauer-Oeppinger ,  Giordano DiGregorio ,  Philips DAI

IPC: H05K3/46 ,  H05K3/00 ,  H05K3/32 ,  H05K3/40 ,  H05K3/10 ,  H05K3/02

CPC classification number: H05K3/4682 ,  H05K1/0269 ,  H05K1/0271 ,  H05K3/0097 ,  H05K3/022 ,  H05K3/108 ,  H05K3/32 ,  H05K3/4007 ,  H05K3/4638 ,  H05K2201/068 ,  H05K2201/09918 ,  H05K2201/09936 ,  H05K2203/0156 ,  H05K2203/0264 ,  H05K2203/1536

Abstract: A semifinished product with a sacrificial structure and two component carriers releasably formed on opposing main surfaces of the sacrificial structure. The sacrificial structure includes a central structure and releasing layers on or over both opposing main surfaces of the central structure The central structure includes a dummy core being covered, in particular fully, on or over both main surfaces thereof with a respective one of two spatially separated sections of separate material, in particular separate dielectric material.

公开(公告)号：US20170140616A1

公开(公告)日：2017-05-18

申请号：US14940708

申请日：2015-11-13

Applicant: AVEXIR TECHNOLOGIES CORPORATION

Inventor： Han-Hung CHENG ,  Chi-Fen KUO

IPC: G08B5/36 ,  G11C11/401

CPC classification number: G08B5/36 ,  G11C5/00 ,  G11C5/04 ,  H01L23/00 ,  H01L25/167 ,  H01L27/00 ,  H05K1/0269 ,  H05K3/288 ,  H05K2201/0989 ,  H05K2201/09936

Abstract: A dynamic random access memory includes a main body which has a substrate portion and a light-emitting portion and a transmission port, the substrate portion includes a board and a first coating layer, the board has a light-transmittable portion and a first face, the first coating layer is coated on the first face and has an emergent light-transmittable portion corresponding to the light-transmittable portion, and the substrate portion has a memory module. The transmission port is disposed on the substrate portion and electrically connected with the memory module. The electronic device includes the dynamic random access memory and further includes a shell portion. The shell portion is covered on two opposite lateral faces of the dynamic random access memory and at least shields the light-emitting portion, and the shell portion further has a second light-transmittable portion corresponding to the emergent light-transmittable portion.

公开(公告)号：US09585243B1

公开(公告)日：2017-02-28

申请号：US14757470

申请日：2015-12-23

Applicant: OCZ Storage Solutions, Inc.

Inventor： Stephen K. Pardoe ,  Nigel Rowe

IPC: B32B3/02 ,  H05K1/02 ,  H05K3/00

CPC classification number: H05K1/0266 ,  H05K1/0269 ,  H05K3/0047 ,  H05K3/0052 ,  H05K2201/09063 ,  H05K2201/09145 ,  H05K2201/09936 ,  H05K2203/0228

Abstract: Methods of manufacturing circuit boards and circuit boards formed thereby to have a surface that is configured to receive circuitry and a notch of a selectable configuration in a lateral edge along the surface of the circuit board boards, and where the selectable configuration is configured to convey identifying information relating to the circuit boards. Such a circuit board can be produced from a panel containing one or more circuit boards, wherein at least one circuit board has a border adjoined and defined by a partition feature that is configured to enable the circuit board to be physically separated from other portions of the panel. Notches having the same of varying selectable configurations may be formed on the at least one circuit board during the manufacturing of the circuit board.

Abstract translation: 制造电路板和电路板的方法由此形成，所述电路板和电路板具有被配置成在沿着电路板板的表面的横向边缘中接收电路和可选择配置的凹口的表面，并且其中可选配置被配置为传送识别 有关电路板的信息。 这样的电路板可以由包含一个或多个电路板的面板制成，其中至少一个电路板具有由划分特征邻接并限定的边界，该分隔特征被配置为使得电路板能够与 面板。 在制造电路板期间，可以在至少一个电路板上形成具有不同可选配置的相同的凹口。

公开(公告)号：US09484309B2

公开(公告)日：2016-11-01

申请号：US14419841

申请日：2013-07-11

Applicant: SHARP KABUSHIKI KAISHA

Inventor： Toshio Hata ,  Makoto Agatani ,  Shinya Ishizaki ,  Makoto Matsuda ,  Tomokazu Nada ,  Toyonori Uemura

IPC: H01L23/544 ,  G03F9/00 ,  H01L33/60 ,  H01L25/075 ,  H01L33/62 ,  H05K1/02 ,  H05K3/12 ,  H05K3/28

CPC classification number: H01L33/60 ,  G03F9/7073 ,  G03F9/7076 ,  G03F9/708 ,  G03F9/7084 ,  H01L23/544 ,  H01L25/0753 ,  H01L33/486 ,  H01L33/62 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/45144 ,  H01L2224/48137 ,  H05K1/0269 ,  H05K3/12 ,  H05K3/28 ,  H05K2201/09918 ,  H05K2201/09936 ,  H01L2924/00

Abstract: A light emitting device (10) includes light emitting elements (12), conductor wirings (14), and alignment marks (18) formed on a substrate (11). The alignment marks (18) and the conductor wirings (14) are formed by printing.

Abstract translation: 发光器件（10）包括发光元件（12），导体布线（14）和形成在基板（11）上的对准标记（18）。 对准标记（18）和导体布线（14）通过印刷形成。

公开(公告)号：US20140110152A1

公开(公告)日：2014-04-24

申请号：US13777056

申请日：2013-02-26

Applicant: FUKUI PRECISION COMPONENT (SHENZHEN) CO., LTD. ,  ZHEN DING TECHNOLOGY CO., LTD.

Inventor： QING ZUO ,  BIN-QIN LUO

IPC: H05K1/02 ,  H05K3/00

CPC classification number: H05K3/00 ,  H05K1/0269 ,  H05K1/0298 ,  H05K2201/0108 ,  H05K2201/09063 ,  H05K2201/09936 ,  Y10T156/1056

Abstract: A printed circuit board includes a first outer electrically conductive pattern layer, a first insulation layer, a first inner electrically conductive pattern layer, a connection adhesive sheet, a second inner electrically conductive layer, a second insulation layer, a second outer electrically conductive pattern layer, and a identification mark, which are arranged in that order. The first outer electrically conductive pattern layer includes many first gold fingers. The second outer electrically conductive pattern layer includes many second gold fingers. The blind hole corresponds to the identification mark. The first outer electrically conductive pattern layer, the second outer electrically conductive pattern layer, and the at least one identification mark are simultaneously formed.

Abstract translation: 印刷电路板包括第一外部导电图案层，第一绝缘层，第一内部导电图案层，连接粘合片，第二内部导电层，第二绝缘层，第二外部导电图案层 ，以及以该顺序排列的识别标记。 第一外部导电图案层包括许多第一金指。 第二外导电图案层包括许多第二金指。 盲孔对应于识别标记。 同时形成第一外部导电图案层，第二外部导电图案层和至少一个识别标记。

公开(公告)号：US08694148B2

公开(公告)日：2014-04-08

申请号：US11719390

申请日：2005-11-14

Applicant: Michael Tyler ,  Robert W. Colby ,  Jeffrey W. Leonard ,  Lindsey M. Dotson ,  David A. Watt ,  Cris E. Hill ,  Laura H. Campbell

Inventor： Michael Tyler ,  Robert W. Colby ,  Jeffrey W. Leonard ,  Lindsey M. Dotson ,  David A. Watt ,  Cris E. Hill ,  Laura H. Campbell

IPC: G06F19/00 ,  G01R31/00

CPC classification number: H05K3/0026 ,  B23K26/02 ,  B23K26/382 ,  B23K26/389 ,  B23K26/40 ,  B23K31/12 ,  B23K2101/42 ,  B23K2103/12 ,  B23K2103/172 ,  B23K2103/42 ,  B23K2103/50 ,  H05K3/225 ,  H05K2201/09936 ,  H05K2203/163

Abstract: A method and system increase processed specimen yield in the laser processing of target material that includes multiple specimens formed on a common substrate. Preferred embodiments implement a feature that enables storage in the laser processing system a list of defective specimens that have somehow been subject to error during laser processing. Once the common substrate has been completely processed, the system alerts an operator to the number of improperly processed specimens and gives the operator an opportunity to run a software routine, which in a preferred embodiment uses a laser to scribe a mark on the top surface of each improperly processed specimen.

Abstract translation: 一种方法和系统在目标材料的激光加工中增加了加工样品产量，其包括在公共基底上形成的多个样品。 优选实施例实现能够在激光处理系统中存储在激光处理期间以某种方式遭受错误的缺陷样本的列表的特征。 一旦共同的基板被完全处理，系统就会向操作人员提供不正确处理的标本的数量，并给予操作者运行一个软件程序的机会，在一个优选的实施例中，该程序使用激光来刻划在 每个不正确加工的样品。

公开(公告)号：US20130319745A1

公开(公告)日：2013-12-05

申请号：US13519374

申请日：2012-06-11

Applicant: Hua Zheng ,  Cheng-hung Chen

Inventor： Hua Zheng ,  Cheng-hung Chen

IPC: H05K1/11

CPC classification number: H05K1/0269 ,  H05K1/0289 ,  H05K2201/09281 ,  H05K2201/09936

Abstract: The present invention provides a routing structure and display panel. The routing structure includes a plurality of routing, disposed separately. Each routing corresponds to a symbol, and the symbol is disposed on the routing to act as a part of the routing to conduct electricity. In this manner, the routing structure and display panel of the present invention allow expansion of routing width, effectively reduce RC constant and energy-consumption, and improve yield rate.

Abstract translation: 本发明提供一种路由结构和显示面板。 路由结构包括多个路由，分开设置。 每个路由对应于符号，并且该符号被布置在路由上以充当路由的一部分以进行电力。 以这种方式，本发明的路由结构和显示面板允许扩展路由宽度，有效降低RC常数和能量消耗，并提高成品率。

公开(公告)号：US08584924B2

公开(公告)日：2013-11-19

申请号：US10506611

申请日：2003-03-06

Applicant: Jürgen Schulz-Harder

Inventor： Jürgen Schulz-Harder

IPC: B23K20/24

CPC classification number: C04B37/021 ,  B32B2311/12 ,  C04B2237/407 ,  H05K1/0266 ,  H05K1/0306 ,  H05K3/061 ,  H05K3/244 ,  H05K3/3452 ,  H05K3/38 ,  H05K3/383 ,  H05K2201/0355 ,  H05K2201/09909 ,  H05K2201/09936 ,  H05K2203/0369 ,  H05K2203/0571 ,  H05K2203/0588

Abstract: The invention relates to a novel process for producing a metal ceramic substrate, especially a copper-ceramic substrate, in which at least one metal foil at a time is applied to the surface sides of a ceramic layer or a ceramic substrate using a high temperature bonding process and the metal foil is structured on at least one surface side for forming conductive tracks, contact surfaces, and the like.

Abstract translation: 本发明涉及一种用于制造金属陶瓷基板，特别是铜陶瓷基板的新方法，其中使用高温接合将至少一个金属箔一次施加到陶瓷层或陶瓷基板的表面侧 工艺，并且金属箔被构造在用于形成导电轨道，接触表面等的至少一个表面侧上。

公开(公告)号：US20130186960A1

公开(公告)日：2013-07-25

申请号：US13553997

申请日：2012-07-20

Applicant: Hidetoshi SUZUKI ,  Yuichi Hotta ,  Yuji Shimoda ,  Yuuji Ogawa ,  Taku Nishiyama ,  Tadanobu Okubo ,  Junichi Onodera ,  Takeshi Ikuta ,  Naohisa Okumura ,  Katsuyoshi Watanabe ,  Kazuhide Doi

Inventor： Hidetoshi SUZUKI ,  Yuichi Hotta ,  Yuji Shimoda ,  Yuuji Ogawa ,  Taku Nishiyama ,  Tadanobu Okubo ,  Junichi Onodera ,  Takeshi Ikuta ,  Naohisa Okumura ,  Katsuyoshi Watanabe ,  Kazuhide Doi

IPC: G06K19/077

CPC classification number: G06K19/07732 ,  H01L23/3107 ,  H01L23/49838 ,  H01L23/49855 ,  H01L23/544 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/165 ,  H01L25/18 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/19107 ,  H05K1/0259 ,  H05K1/0269 ,  H05K1/113 ,  H05K1/117 ,  H05K3/284 ,  H05K3/321 ,  H05K2201/09563 ,  H05K2201/0979 ,  H05K2201/09936 ,  H05K2201/10287 ,  H05K2203/1327 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

Abstract: According to one embodiment, a semiconductor storage device is provided with a memory chip including a storage circuit, a controller chip that controls a memory chip, and a substrate having a first surface and a second surface opposing one another, on the first surface of which the controller chip is mounted. Further, the semiconductor storage device is provided with an external connection terminal formed on the second surface of the substrate, and resin that encapsulates the memory chip, the controller chip, and the substrate, includes a third surface and a fourth surface opposing one another, and has a predetermined mark directly printed only on the fourth surface that is adjacent to the second surface of the substrate.

Abstract translation: 根据一个实施例，半导体存储装置设置有存储芯片，存储芯片包括存储电路，控制存储芯片的控制器芯片和具有第一表面和第二表面的基板，第一表面和第二表面在其第一表面上 安装控制器芯片。 此外，半导体存储装置设置有形成在基板的第二表面上的外部连接端子，并且封装存储芯片，控制器芯片和基板的树脂包括彼此相对的第三表面和第四表面， 并且具有仅在与基板的第二表面相邻的第四表面上直接印刷的预定标记。