公开(公告)号：US20230240011A1

公开(公告)日：2023-07-27

申请号：US17581824

申请日：2022-01-21

Applicant: Analog Devices, Inc.

Inventor： Hien Minh Pham

IPC: H05K1/18 ,  H05K3/30 ,  H05K1/11

CPC classification number: H05K1/181 ,  H05K3/303 ,  H05K1/115 ,  H05K2201/10515 ,  H05K2201/10545 ,  H05K2201/10954

Abstract: In one embodiment, an electronic assembly can include: a first electronic device package configured to be mounted on and electrically connected with a system substrate; a second electronic device package electrically connected to the system substrate; and an electrical pathway configured to extend from the system substrate through the first electronic device package and connected to an input terminal of the second electronic device package, the electrical pathway bypassing processing circuitry of the first electronic device package.

公开(公告)号：US11700692B2

公开(公告)日：2023-07-11

申请号：US17395893

申请日：2021-08-06

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Akito Yoshida ,  Mahmoud Dreiza ,  Curtis Michael Zwenger

IPC: H05K1/14 ,  H05K3/36 ,  H01L23/31 ,  H01L23/00 ,  H05K1/11 ,  H05K1/18 ,  H05K3/30 ,  H05K3/34 ,  H01L21/56 ,  H01L23/498 ,  H05K3/40

CPC classification number: H05K1/14 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49811 ,  H01L24/10 ,  H01L24/16 ,  H01L24/81 ,  H05K1/11 ,  H05K1/181 ,  H05K1/184 ,  H05K1/185 ,  H05K3/303 ,  H05K3/34 ,  H05K3/363 ,  H05K3/4007 ,  H01L23/3171 ,  H01L2224/1191 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/1607 ,  H01L2224/16055 ,  H01L2224/16111 ,  H01L2224/16113 ,  H01L2224/16238 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2924/01029 ,  H01L2924/01079 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/10977 ,  H05K2203/043 ,  Y10T29/49165 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: A stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A

公开(公告)号：US20230197622A1

公开(公告)日：2023-06-22

申请号：US17559431

申请日：2021-12-22

Applicant: Intel Corporation

Inventor： Karumbu Meyyappan ,  Jeffory L, Smalley ,  Gregorio Murtagian ,  Srikant Nekkanty ,  Pooya Tadayon ,  Eric J.M. Moret ,  Bijoyraj Sahu

IPC: H01L23/538 ,  H01L23/498 ,  H01R12/52 ,  H01L25/00 ,  H01L25/18 ,  H01L25/065 ,  H01R12/58 ,  H05K3/32 ,  H05K1/18

CPC classification number: H01L23/5384 ,  H01L23/49827 ,  H01L23/5385 ,  H01R12/52 ,  H01L25/50 ,  H01L25/18 ,  H01L25/0655 ,  H01R12/58 ,  H05K3/32 ,  H05K1/181 ,  H05K2201/10189 ,  H05K2201/10378 ,  H05K2201/10515 ,  H05K2201/1053

Abstract: An electronic system and associated methods are disclosed. In one example, the electronic system includes an interposer including electrically conductive interposer interconnect, a first interposer surface, and a second interposer surface; a processor package including at least one processor integrated circuit (IC), the processor package attached to the first interposer surface and electrically connected to the interposer interconnect; a first liquid metal well array including multiple liquid metal wells attached to a second interposer surface and the interposer interconnect; a second liquid metal well array including a first array surface attached to the first interposer surface and the interposer interconnect; and a packaged companion IC to the processor IC attached to a second array surface of the second liquid metal well array.

公开(公告)号：US11658106B2

公开(公告)日：2023-05-23

申请号：US17183405

申请日：2021-02-24

Applicant: FUJITSU LIMITED

Inventor： Kenichi Kawai

IPC: H05K1/18 ,  H01L23/498 ,  G06F30/394 ,  H01L23/64 ,  G06F115/12

CPC classification number: H01L23/49838 ,  G06F30/394 ,  H01L23/642 ,  H05K1/181 ,  G06F2115/12 ,  H01L23/49816 ,  H01L23/49822 ,  H05K2201/10015 ,  H05K2201/10378 ,  H05K2201/10515

Abstract: An electronic device includes: a board that includes an insulating film, a wiring layer and a via provided in the insulating film, and a plurality of power source pads and a plurality of ground pads which are provided in the insulating film so as to surround a capacitor region in which a capacitor is provided and to which a plurality of bumps is coupled; and an electronic component that is mounted at the board, and is electrically coupled to the plurality of power source pads and the plurality of ground pads through the wiring layer and the via. Further, a method for supporting design of the electronic device is provided.

公开(公告)号：US20190244948A1

公开(公告)日：2019-08-08

申请号：US16389475

申请日：2019-04-19

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto PAGANI

IPC: H01L27/02 ,  H01L23/00 ,  H01L25/10 ,  H01L21/683 ,  H01L23/66 ,  H01L23/48 ,  H01L23/31 ,  H05K1/18 ,  H01L25/065 ,  H01L21/768

CPC classification number: H01L27/0203 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/768 ,  H01L22/22 ,  H01L23/3128 ,  H01L23/48 ,  H01L23/49833 ,  H01L23/66 ,  H01L24/02 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/09 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/94 ,  H01L24/95 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2223/6677 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/02319 ,  H01L2224/02321 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05569 ,  H01L2224/06187 ,  H01L2224/08137 ,  H01L2224/08146 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/14183 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2105 ,  H01L2224/211 ,  H01L2224/28105 ,  H01L2224/29024 ,  H01L2224/30183 ,  H01L2224/32145 ,  H01L2224/32227 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/48 ,  H01L2224/48091 ,  H01L2224/48175 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73251 ,  H01L2224/82106 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2225/06531 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2225/1023 ,  H01L2225/1064 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15159 ,  H01L2924/207 ,  H05K1/181 ,  H05K1/189 ,  H05K2201/10515 ,  Y02P70/611 ,  H01L2224/02 ,  H01L2224/08 ,  H01L2224/16 ,  H01L2224/32 ,  H01L2224/19 ,  H01L2924/00

Abstract: An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.

公开(公告)号：US20190120895A1

公开(公告)日：2019-04-25

申请号：US16120611

申请日：2018-09-04

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Kazuyuki KUBOTA ,  Tomoki KOBAYASHI

IPC: G01R31/28 ,  H05K1/18 ,  H05K1/11 ,  H05K1/14 ,  H01R12/71 ,  H01R33/74 ,  H01R13/24 ,  H01R13/639 ,  H01R33/97 ,  G01R1/04

CPC classification number: G01R31/2808 ,  G01R1/0408 ,  H01L25/105 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01R12/714 ,  H01R13/24 ,  H01R13/639 ,  H01R33/74 ,  H01R33/97 ,  H01R2201/20 ,  H05K1/11 ,  H05K1/144 ,  H05K1/18 ,  H05K2201/042 ,  H05K2201/10515 ,  H05K2203/162

Abstract: A socket has a main body that accommodates a PCBA (Printed Circuit Board Assembly) to be inspected. The PCBA includes a substrate mounted with an electronic component, and terminals protruding from the substrate and having side surfaces exposed at an outer peripheral surface of the substrate, and the terminals are positioned within a cavity or opening of the main body in a state in which the PCBA is accommodated in the cavity or opening. The socket further has probes respectively including a fixed part fixed to the main body, and a movable part movable with respect to the fixed part, and a pressing part to press against the movable part of the probe. The movable part includes a tip end part that moves to a position contactable to the side surface of one terminal within the cavity or opening, when the pressing part presses against the movable part.

公开(公告)号：US10080293B2

公开(公告)日：2018-09-18

申请号：US15658532

申请日：2017-07-25

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Junji Sato ,  Katsuya Fukase

IPC: H05K1/16 ,  H05K1/18 ,  H01L23/13 ,  H01L23/498 ,  H01L21/683 ,  H01L21/48 ,  H01L23/00

CPC classification number: H05K1/186 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/6836 ,  H01L23/13 ,  H01L23/145 ,  H01L23/15 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19102 ,  H05K1/181 ,  H05K3/4644 ,  H05K2201/10015 ,  H05K2201/10515 ,  H05K2201/10522 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: An electronic component-embedded board includes: a core substrate; a cavity which penetrates the core substrate; a wiring layer formed on one face of the core substrate; a component mounting pattern formed of the same material as the wiring layer and laid across the cavity to partition the cavity into through holes in plan view; an electronic component mounted on the component mounting pattern and arranged inside the cavity; a first insulating layer formed on the one face of the core substrate to cover one face of the electronic component; and a second insulating layer formed on the other face of the core substrate to cover the other face of the electronic component. The cavity is filled with the first insulating layer and the second insulating layer.

公开(公告)号：US20180242455A1

公开(公告)日：2018-08-23

申请号：US15961859

申请日：2018-04-24

Applicant: SKYWORKS SOLUTIONS, INC.

Inventor： Mark A. KUHLMAN ,  Anthony James LOBIANCO ,  Thomas NOLL ,  Robert W WARREN ,  Howard E. CHEN

IPC: H05K1/18 ,  H01L23/00 ,  H01L23/31 ,  H01L25/16 ,  H05K3/32 ,  H05K3/28

CPC classification number: H05K1/181 ,  H01L23/3121 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/16265 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/48472 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19103 ,  H01L2924/19104 ,  H05K3/284 ,  H05K3/321 ,  H05K2201/10166 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Single-die or multi-die packaged modules that incorporate three-dimensional integration of active devices with discrete passive devices to create a package structure that allows active devices (such as, silicon or gallium-arsenide devices) to share the same footprint area as an array of passive surface mount components. In one example, a module includes at least one active device stacked on top of an array of passive surface mount components on a substrate. A conductive or non-conductive adhesive can be used to adhere the active device to the array of passive devices.

公开(公告)号：US20180240723A1

公开(公告)日：2018-08-23

申请号：US15958949

申请日：2018-04-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Lin Lu ,  Kai-Chiang Wu ,  Yen-Ping Wang ,  Shih-Wei Liang ,  Ching-Feng Yang

IPC: H01L23/24 ,  H01L21/56 ,  H01L25/10 ,  H01L21/48 ,  H05K1/18 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/24 ,  H01L21/481 ,  H01L21/4885 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H05K1/181 ,  H05K2201/049 ,  H05K2201/10378 ,  H05K2201/10515 ,  H05K2201/10734 ,  H05K2201/2036 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An interposer may comprise a metal layer above a substrate. A dam or a plurality of dams may be formed above the metal layer. A dam surrounds an area of a size larger than a size of a die which may be connected to a contact pad above the metal layer within the area. A dam may comprise a conductive material, or a non-conductive material, or both. An underfill may be formed under the die, above the metal layer, and contained within the area surrounded by the dam, so that no underfill may overflow outside the area surrounded by the dam. Additional package may be placed above the die connected to the interposer to form a package-on-package structure.

公开(公告)号：US20180236368A1

公开(公告)日：2018-08-23

申请号：US15886884

申请日：2018-02-02

Applicant: Yu-Wei CHEN

Inventor： Yu-Wei CHEN ,  Lin-Yu KAO

IPC: A63H33/04 ,  H05K1/14 ,  H05K1/18 ,  H02J50/10 ,  H05K1/11 ,  A63H33/08 ,  G09B23/18

CPC classification number: A63H33/042 ,  A63H33/08 ,  A63H33/086 ,  G09B23/185 ,  H02J50/10 ,  H05K1/115 ,  H05K1/144 ,  H05K1/18 ,  H05K2201/10037 ,  H05K2201/10151 ,  H05K2201/10515 ,  H05K2201/1056

Abstract: An electronic building block set with a metal layer on the outer surface of each building block includes a main and an auxiliary building block. The top of the main building block includes plural main hollow posts, each with a main sensing contact, and has a main metal layer on the outer surface. The main sensing contacts and the main metal layer are electrically connected to opposite-polarity main electrode circuits respectively. The bottom of the auxiliary building block includes a first sensing element and has an auxiliary metal layer on the outer surface. The first sensing element and the auxiliary metal layer are electrically connected to opposite-polarity auxiliary electrode circuits respectively. When the building blocks are engaged, the first sensing element is electrically connected to the corresponding main sensing contact, and the auxiliary metal layer, to the main metal layer to enable electricity or signal transmission between the building blocks.