公开(公告)号：US08450817B2

公开(公告)日：2013-05-28

申请号：US12191857

申请日：2008-08-14

Applicant: Anthony Minervini

Inventor： Anthony Minervini

IPC: H01L29/84

CPC classification number: B81B7/0048 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2203/0109 ,  H01L2924/0002 ,  H04R1/04 ,  H04R2201/003 ,  H01L2924/00

Abstract: A strain absorption bridge for use in a MEMS package includes a first substrate that is configured to be attachable to a circuit board. A first elastically deformable element is coupled to the first substrate and the first elastically deformable element is configured to be attachable to a MEMS device. Alternatively, the MEMS device may be attached to the first substrate. The elastically deformable element at least partially absorbs and dissipates mechanical strain communicated from the circuit board before the mechanical strain can reach the MEMS device.

Abstract translation: 用于MEMS封装的应变吸收桥包括被配置为可附接到电路板的第一衬底。 第一可弹性变形的元件被耦合到第一基板，并且第一可弹性变形元件构造成可附接到MEMS装置。 或者，MEMS器件可以附接到第一衬底。 可弹性变形的元件至少部分地吸收并消散在机械应变到达MEMS装置之前从电路板传递的机械应变。

公开(公告)号：US20130105999A1

公开(公告)日：2013-05-02

申请号：US13281734

申请日：2011-10-26

Applicant: Xiaoyi Ding ,  Jeffrey James Frye

Inventor： Xiaoyi Ding ,  Jeffrey James Frye

IPC: H01L23/29 ,  H01L21/56

CPC classification number: B81B7/0048 ,  B81B2201/0264 ,  B81B2203/0109 ,  B81C2201/019 ,  B81C2203/032 ,  G01L19/147 ,  H01L2224/29188 ,  H01L2924/10155

Abstract: A semiconductor die is attached to a substrate by a glass frit layer. Gas that might be trapped between the die and the glass frit layer during firing of the glass frit can escape through passages that are formed against the bottom surface of the die by topographies that extend away from and which are substantially orthogonal to the bottom of the die.

Abstract translation: 半导体管芯通过玻璃料层附接到基板。 在烧结玻璃料期间可能被捕获在模具和玻璃料层之间的气体可以通过通过离开模具的底部表面形成的通道的形状逃逸，该拓扑结构远离模具并且基本上垂直于模具的底部 。

公开(公告)号：US08420428B2

公开(公告)日：2013-04-16

申请号：US12873685

申请日：2010-09-01

Applicant: Gabriele Barlocchi ,  Pietro Corona ,  Dino Faralli ,  Flavio Francesco Villa

Inventor： Gabriele Barlocchi ,  Pietro Corona ,  Dino Faralli ,  Flavio Francesco Villa

IPC: H01L21/00 ,  H01L21/76

CPC classification number: B81C1/00047 ,  B01L3/502707 ,  B01L7/52 ,  B01L2200/12 ,  B01L2300/0636 ,  B01L2300/0645 ,  B01L2300/0816 ,  B01L2300/1827 ,  B81B2201/0264 ,  B81B2203/0315

Abstract: A method for the formation of buried cavities within a semiconductor body envisages the steps of: providing a wafer having a bulk region made of semiconductor material; digging, in the bulk region, trenches delimiting between them walls of semiconductor material; forming a closing layer for closing the trenches in the presence of a deoxidizing atmosphere so as to englobe the deoxidizing atmosphere within the trenches; and carrying out a thermal treatment such as to cause migration of the semiconductor material of the walls and to form a buried cavity. Furthermore, before the thermal treatment is carried out, a barrier layer that is substantially impermeable to hydrogen is formed on the closing layer on top of the trenches.

Abstract translation: 一种用于在半导体主体内形成掩埋空腔的方法，设想了以下步骤：提供具有由半导体材料制成的体区的晶片; 在本体区域中挖掘在它们的半导体材料壁之间划定的沟槽; 形成用于在脱氧气氛存在下关闭所述沟槽的闭合层，以便使所述沟槽内的脱氧气氛充满; 进行热处理，使壁的半导体材料迁移并形成掩埋腔。 此外，在进行热处理之前，在沟槽顶部的闭合层上形成基本上不透氢的阻挡层。

公开(公告)号：US20130063905A1

公开(公告)日：2013-03-14

申请号：US13636560

申请日：2011-03-22

Applicant: Bernhard Brinkhaus ,  Werner Waser

Inventor： Bernhard Brinkhaus ,  Werner Waser

IPC: H05K1/02 ,  G01R3/00

CPC classification number: H05K1/02 ,  B81B3/0021 ,  B81B2201/0264 ,  B81B2207/07 ,  B81C2201/019 ,  G01R3/00 ,  Y10T29/49002

Abstract: The invention relates to a circuit board sensor (1) for measuring physical variables, comprising a substrate board (2) and a second board (3) both made of glass, wherein at least the second board (3) is designed such that said board is elastically deformable, wherein the substrate board (2) and the second board (3) each comprise a first and a second side (2a, 2b, 3a, 3b), wherein the second side (2b) of the substrate board (2) and the first side (3a) of the second board (3) are disposed opposite each other, and wherein a spacer element (7) is disposed between the substrate board (2) and the second board (3) and holds the substrate board (2) and the second board (3) at a mutual distance, wherein the substrate board (2) and the second board (3) extend in particular parallel to each other, wherein the second side (2b) of the substrate board (2) comprises a first metal or polymer surface (5a) and the first side (3a) of the second board (3) comprises a second metal or polymer surface (5b), and wherein the first and second metal or polymer surfaces (5a, 5b) are disposed at least partially opposite each other, and wherein conductors (4) are attached on the first side of the substrate board (2), and wherein the substrate board (2) comprises at least one first and one second through-plating (9) disposed such that the first through-plating (9a) electrically conductively connects the conductors (4) to the first metal or polymer surface (5a), and such that the second through-plating (9b) electrically conductively connects the conductor (4) to the second metal or polymer surface (5b).

Abstract translation: 本发明涉及一种用于测量物理变量的电路板传感器（1），包括由玻璃制成的基板（2）和第二板（3），其中至少第二板（3）被设计成使得所述板 其中所述基板（2）和所述第二板（3）各自包括第一和第二侧（2a，2b，3a，3b），其中所述基板（2）的第二侧（2b） 并且第二板（3）的第一侧（3a）彼此相对地设置，并且其中间隔元件（7）设置在基板（2）和第二板（3）之间并保持基板（ 2）和所述第二板（3）之间相互距离，其中所述基板（2）和所述第二板（3）特别是彼此平行地延伸，其中所述基板（2）的第二侧（2b） 包括第一金属或聚合物表面（5a），并且第二板（3）的第一侧（3a）包括第二金属或聚合物表面（5b）， 并且其中所述第一和第二金属或聚合物表面（5a，5b）至少部分地彼此相对设置，并且其中导体（4）附接在所述基板（2）的第一侧上，并且其中所述基板 2）包括至少一个第一和第二通孔（9），其布置成使得第一贯通电镀（9a）将导体（4）导电地连接到第一金属或聚合物表面（5a），并且使得 第二通镀（9b）将导体（4）导电连接到第二金属或聚合物表面（5b）。

公开(公告)号：US20130032905A1

公开(公告)日：2013-02-07

申请号：US13640723

申请日：2010-04-30

Applicant: Chi Kwong Lo ,  Lik Hang Wan ,  Ming Wa Tam

Inventor： Chi Kwong Lo ,  Lik Hang Wan ,  Ming Wa Tam

IPC: H01L29/84 ,  H01L21/78

CPC classification number: H01L23/055 ,  B81B7/007 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2207/012 ,  B81B2207/092 ,  B81B2207/096 ,  H01L21/50 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00

Abstract: In some examples, a semiconductor package can be configured to electrically couple to a printed circuit board. The semiconductor package can include: (a) a lid having one or more first electrically conductive leads; (b) a base coupled to the lid and having one or more second electrically conductive leads electrically coupled to the one or more first electrically conductive leads; (c) one or more first semiconductor devices mechanically coupled to the lid and electrically coupled to the one or more first electrically conductive leads; and (d) one or more first micro-electrical-mechanical system devices mechanically coupled to the lid and electrically coupled to the one or more first electrically conductive leads. At least one of the lid or the base can have at least one port hole. The one or more first electrically conductive leads can be configured to couple to the printed circuit board. Other embodiments are disclosed.

Abstract translation: 在一些示例中，半导体封装可以被配置为电耦合到印刷电路板。 半导体封装可以包括：（a）具有一个或多个第一导电引线的盖; （b）耦合到所述盖并具有电耦合到所述一个或多个第一导电引线的一个或多个第二导电引线的基座; （c）一个或多个第一半导体器件，其机械耦合到所述盖并电耦合到所述一个或多个第一导电引线; 和（d）一个或多个第一微电机械系统装置，其机械地联接到所述盖并电耦合到所述一个或多个第一导电引线。 盖子或底座中的至少一个可以具有至少一个端口孔。 一个或多个第一导电引线可以被配置为耦合到印刷电路板。 公开了其他实施例。

公开(公告)号：US20130001711A1

公开(公告)日：2013-01-03

申请号：US13489124

申请日：2012-06-05

Applicant: Hubert BENZEL ,  Frank Henning ,  Armin Scharping ,  Christoph Schelling

Inventor： Hubert BENZEL ,  Frank Henning ,  Armin Scharping ,  Christoph Schelling

IPC: H01L29/84

CPC classification number: B81C3/001 ,  B81B2201/0264 ,  B81C2201/019 ,  G01L9/0055

Abstract: A micromechanical component including a first composite of a plurality of semiconductor chips, the first composite having a first front and back surfaces, a second composite of a corresponding plurality of carrier substrates, the second composite having a second front and back surfaces; wherein the first front surface and the second front surface are connected via a structured adhesion promoter layer in such a way that each semiconductor chip is connected, essentially free of cavities, to a corresponding carrier substrate corresponding to a respective micromechanical component.

Abstract translation: 一种微机械部件，包括多个半导体芯片的第一复合材料，所述第一复合材料具有第一正面和背面，相应的多个载体基板的第二复合材料，所述第二复合材料具有第二前表面和后表面; 其中所述第一前表面和所述第二前表面经由结构化粘合促进剂层连接，使得每个半导体芯片基本上不含空腔连接到对应于相应的微机械部件的对应的载体基板。

公开(公告)号：US20130001550A1

公开(公告)日：2013-01-03

申请号：US13536798

申请日：2012-06-28

Applicant: Joseph SEEGER ,  Igor TCHERTKOV ,  Hasan AKYOL ,  Goksen G. YARALIOGLU ,  Steven S. NASIRI ,  Ilya GURIN

Inventor： Joseph SEEGER ,  Igor TCHERTKOV ,  Hasan AKYOL ,  Goksen G. YARALIOGLU ,  Steven S. NASIRI ,  Ilya GURIN

IPC: H01L29/84 ,  H01L21/66 ,  H01L21/50

CPC classification number: G01L9/0073 ,  B81B7/02 ,  B81B2201/025 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2207/015 ,  B81C99/0045 ,  B81C2203/0771 ,  G01L1/142 ,  G01L5/223 ,  G01L19/0636 ,  G01L27/007 ,  G01P15/125 ,  G01P2015/084 ,  H01L2924/16235

Abstract: A system and method for providing a MEMS device with integrated electronics are disclosed. The MEMS device comprises an integrated circuit substrate and a MEMS subassembly coupled to the integrated circuit substrate. The integrated circuit substrate includes at least one circuit coupled to at least one fixed electrode. The MEMS subassembly includes at least one standoff formed by a lithographic process, a flexible plate with a top surface and a bottom surface, and a MEMS electrode coupled to the flexible plate and electrically coupled to the at least one standoff. A force acting on the flexible plate causes a change in a gap between the MEMS electrode and the at least one fixed electrode.

Abstract translation: 公开了一种用于向MEMS器件提供集成电子器件的系统和方法。 MEMS器件包括集成电路基板和耦合到集成电路基板的MEMS子组件。 集成电路基板包括耦合到至少一个固定电极的至少一个电路。 MEMS子组件包括由光刻工艺形成的至少一个支座，具有顶表面和底表面的柔性板，以及耦合到柔性板并电耦合到至少一个支座的MEMS电极。 作用在柔性板上的力导致MEMS电极与至少一个固定电极之间的间隙的变化。

公开(公告)号：US08216882B2

公开(公告)日：2012-07-10

申请号：US12861509

申请日：2010-08-23

Applicant: Yizhen Lin ,  Woo Tae Park ,  Mark E. Schlarmann ,  Hemant D. Desai

Inventor： Yizhen Lin ,  Woo Tae Park ,  Mark E. Schlarmann ,  Hemant D. Desai

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L28/60 ,  B81B7/02 ,  B81B2201/025 ,  B81B2201/0264 ,  G01L9/0073 ,  G01L19/0092 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814 ,  G01P2015/088 ,  H01G5/18

Abstract: A device (20, 90) includes sensors (28, 30) that sense different physical stimuli. A pressure sensor (28) includes a reference element (44) and a sense element (52), and an inertial sensor (30) includes a movable element (54). Fabrication (110) entails forming (112) a first substrate structure (22, 92) having a cavity (36, 100), forming a second substrate structure (24) to include the sensors (28, 30), and coupling (128) the substrate structures so that the first sensor (28) is aligned with the cavity (36, 100) and the second sensor (30) is laterally spaced apart from the first sensor (28). Forming the second structure (24) includes forming (118) the sense element (52) from a material layer (124) of the second structure (24) and following coupling (128) of the substrate structures, concurrently forming (132) the reference element (44) and the movable element (54) in a wafer substrate (122) of the second structure (24).

Abstract translation: 装置（20,90）包括感测不同物理刺激的传感器（28,30）。 压力传感器（28）包括参考元件（44）和感测元件（52），惯性传感器（30）包括可移动元件（54）。 制造（110）需要形成（112）具有空腔（36,100）的第一衬底结构（22,92），形成包括传感器（28,30）的第二衬底结构（24）和耦合（128） 所述基板结构使得所述第一传感器（28）与所述空腔（36,100）对准，并且所述第二传感器（30）与所述第一传感器（28）横向间隔开。 形成第二结构（24）包括从第二结构（24）的材料层（124）和衬底结构的耦合（128）形成（118）感测元件（52），同时形成（132）参考 元件（44）和第二结构（24）的晶片衬底（122）中的可移动元件（54）。

公开(公告)号：US08212326B2

公开(公告)日：2012-07-03

申请号：US12835328

申请日：2010-07-13

Applicant: Ando Feyh

Inventor： Ando Feyh

IPC: H01L29/84

CPC classification number: G01P15/0802 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/0264 ,  B81C1/00476 ,  G01L9/0042 ,  G01P15/125

Abstract: A manufacturing method for a micromechanical component having a thin-layer capping. The method includes the following: forming a functional layer on a substrate; structuring the functional layer in first cutout regions having a first width and in regions of the functional layer to be removed having a second width, the second width being substantially greater than the first width; forming a first oxide layer on the structured functional layer; forming a first sealing layer on the thermally oxidized and structured functional layer, the first cutout regions having the first width being sealed; forming a cap layer on the first sealing layer; forming first through holes which extend through the cap layer, the first sealing layer, and the first oxide layer for at least partially exposing the regions of the functional layer to be removed; and selectively removing the regions of the functional layer to be removed, by introducing a first etching medium through the first through holes, resulting in second cutout regions in the functional layer which have the second width.

Abstract translation: 具有薄层封盖的微机械部件的制造方法。 该方法包括：在基板上形成功能层; 在具有第一宽度的第一切口区域中和在要移除的功能层的区域中具有第二宽度的第二宽度基本上大于第一宽度; 在所述结构化功能层上形成第一氧化物层; 在所述热氧化结构的功能层上形成第一密封层，所述第一切口区域具有第一宽度被密封; 在所述第一密封层上形成盖层; 形成延伸穿过盖层的第一通孔，第一密封层和第一氧化物层，用于至少部分地暴露要去除的功能层的区域; 并通过引入第一蚀刻介质通过第一通孔选择性去除待去除的功能层的区域，从而产生具有第二宽度的功能层中的第二切除区域。

公开(公告)号：US20120149153A1

公开(公告)日：2012-06-14

申请号：US13404376

申请日：2012-02-24

Applicant: Xiaoyi Ding ,  Jeffrey J. Frye ,  Gregory A. Miller

Inventor： Xiaoyi Ding ,  Jeffrey J. Frye ,  Gregory A. Miller

IPC: H01L21/78

CPC classification number: G01L9/0042 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81C1/00873 ,  G01L9/0052 ,  G01L9/0055 ,  H01L21/6835 ,  H01L21/6836 ,  H01L2221/68327 ,  H01L2221/6835 ,  H01L2221/68381

Abstract: Ultra-thin semiconductor devices, including piezoresistive sensing elements can be formed in a wafer stack that facilitates handling many thin device dice at a wafer level. Three embodiments are provided to form the thin dice in a wafer stack using three different fabrication techniques that include anodic bonding, adhesive bonding and fusion bonding. A trench is etched around each thin die to separate the thin die from others in the wafer stack. A tether layer, also known as a tether, is used to hold thin dice or dice in a wafer stack. Such as wafer stack holds many thin dice together at a wafer level for handling and enables easier die picking in packaging processes.

Abstract translation: 包括压阻感测元件的超薄半导体器件可以形成在晶片堆叠中，这有助于在晶片级处理许多薄的器件管芯。 提供三个实施例以使用三种不同的制造技术在晶片叠层中形成薄的骰子，这些制造技术包括阳极接合，粘结和粘合。 在每个薄模具周围蚀刻沟槽，以将薄晶片与晶片堆叠中的其它芯片分离。 系绳层（也称为系绳）用于将薄骰子或骰子保持在晶片堆叠中。 例如晶片堆叠在晶片级将许多薄的骰子保持在一起以进行处理，并且能够在包装过程中更容易地进行拣选。