-
公开(公告)号:US06251698B1
公开(公告)日:2001-06-26
申请号:US09424223
申请日:1999-11-23
Applicant: Olivier Lefort , Isabelle Thomas
Inventor: Olivier Lefort , Isabelle Thomas
IPC: H01L2100
CPC classification number: B81C1/0015 , B81B2201/0235 , B81C2201/053 , G01P15/0802 , G01P15/125
Abstract: A process for the production of microsensors machined in silicon, and in particular accelerometers for applications of assisting with navigation in aircraft, and pressure sensors. In order to improve the production of certain active parts of the sensor, and in particular of a beam forming a resonator, which needs to have well-controlled width and thickness characteristics, the following procedure is adopted. A beam having a thickness equal to the desired final thickness, and a width greater than the desired final width, is produced by micromachining the silicon on a first plate, the beam being covered on its upper face by a mask defining the desired final width. The plate is assembled with another plate. The two faces of the beam are oxidized in order to cover them with a thin protective layer. The thin protective layer on the upper face is removed, by vertical directional etching, without removing the mask already present. The silicon in the area exposed by the preceding operation is attacked by a vertical directional etch on the upper face, until the entire part of the beam not protected by the mask is eliminated, and the beam having the desired width is thus formed.
Abstract translation: 用于生产在硅中加工的微传感器的方法,特别是用于辅助航空器导航和压力传感器的加速度计。 为了改善传感器的某些有源部分的生产,特别是需要具有良好控制的宽度和厚度特性的形成谐振器的光束的生产,采用以下步骤。 具有等于期望最终厚度的厚度和大于期望最终宽度的宽度的光束通过在第一板上微加工硅而产生,所述光束通过限定所需最终宽度的掩模在其上表面上被覆盖。 板与另一块板组装。 梁的两个表面被氧化以便用薄的保护层覆盖它们。 通过垂直方向蚀刻去除上表面上的薄保护层,而不去除已经存在的掩模。 在前面的操作中暴露的区域中的硅被上面的垂直定向蚀刻所侵蚀,直到没有被掩模保护的光束的整个部分被消除,因此形成了所需宽度的光束。
-
公开(公告)号:US6093330A
公开(公告)日:2000-07-25
申请号:US867060
申请日:1997-06-02
Applicant: John M. Chong , Scott G. Adams , Noel C. MacDonald , Kevin A. Shaw
Inventor: John M. Chong , Scott G. Adams , Noel C. MacDonald , Kevin A. Shaw
IPC: B81B3/00 , H01L21/302
CPC classification number: B81C1/0015 , B81C1/00047 , B81C1/00071 , B81B2203/0338 , B81C2201/053 , B81C2203/0136
Abstract: A single-mask process for fabricating enclosed, micron-scale subsurface cavities in a single crystal silicon substrate includes the steps of patterning the substrate to form vias, etching the cavities through the vias, and sealing the vias. Single cavities of any configuration may be produced, but a preferred embodiment includes closely spaced cavity pairs. The cavities may be separated by a thin membrane, or may be merged to form an enlarged merged cavity having an overhanging bar to which electrical leads may be connected. A three-mask process for fabricating enclosed cavities with electrical contacts and electrical connections is also disclosed.
Abstract translation: 用于在单晶硅衬底中制造封闭的微米级次表面空穴的单掩模工艺包括以下步骤:使衬底图案化以形成通孔,通过通孔蚀刻空腔,并密封通孔。 可以制造任何构造的单个空腔,但是优选实施例包括紧密间隔的空腔对。 空腔可以由薄膜分离,或者可以被合并以形成具有可以连接电引线的悬伸杆的扩大的合并腔。 还公开了一种用于制造具有电触点和电连接的封闭腔的三掩模工艺。
-
213.
公开(公告)号:US5770465A
公开(公告)日:1998-06-23
申请号:US668378
申请日:1996-06-21
Applicant: Noel C. MacDonald , Xiaojun Trent Huang , Liang-Yuh Chen
Inventor: Noel C. MacDonald , Xiaojun Trent Huang , Liang-Yuh Chen
CPC classification number: B81C1/00619 , B81C1/00484 , B81B2203/0118 , B81B2203/0361 , B81C2201/053
Abstract: A process is described for manufacturing submicron, ultra-high aspect ratio microstructures using a trench-filling etch masking technique. Deep trenches are etched into a substrate, the trenches are filled with an appropriate trench-filling material, and deep etching into the substrate is carried out with the trench-filling material serving as a mask.
Abstract translation: 描述了使用沟槽填充蚀刻掩模技术制造亚微米,超高纵横比微结构的方法。 将深沟槽蚀刻到衬底中,用合适的沟槽填充材料填充沟槽,并且用沟槽填充材料作为掩模进行对衬底的深刻蚀。
-
公开(公告)号:US5719073A
公开(公告)日:1998-02-17
申请号:US312797
申请日:1994-09-27
Applicant: Kevin A. Shaw , Z. Lisa Zhang , Noel C. MacDonald
Inventor: Kevin A. Shaw , Z. Lisa Zhang , Noel C. MacDonald
IPC: C23F4/00 , B81B3/00 , G01P15/08 , G01P15/125 , H01L21/302 , H01L21/3065 , H01L29/82 , H01L29/84 , H01L21/44
CPC classification number: B81C1/00619 , B81C1/00142 , B81C1/0015 , B81C1/00626 , G01P15/0802 , G01P15/125 , B81C2201/0112 , B81C2201/0132 , B81C2201/053 , G01P2015/0814 , G01P2015/0817 , G01P2015/0828 , Y10S148/05 , Y10S73/01
Abstract: A single mask, low temperature reactive ion etching process for fabricating high aspect ratio, released single crystal microelectromechanical structures independently of crystal orientation.
-
215.
公开(公告)号:US5597767A
公开(公告)日:1997-01-28
申请号:US369838
申请日:1995-01-06
Applicant: Michael A. Mignardi , Laurinda Ng , Ronald S. Croff , Robert McKenna , Lawrence D. Dyer
Inventor: Michael A. Mignardi , Laurinda Ng , Ronald S. Croff , Robert McKenna , Lawrence D. Dyer
IPC: B81C1/00 , H01L21/301 , H01L21/78 , H01L21/302
CPC classification number: B81C1/00873 , H01L21/78 , B81C2201/053 , Y10S148/012 , Y10S148/028
Abstract: A method of separating wafers, such as those used for semiconductor device manufacture, into die. A partly fabricated wafer is covered with a protective coating over its top surface (10). The wafer is then inscribed to define separation lines between die, with the separation lines being of a predetermined depth (12). The protective coating is then removed (14), and at least one processing step is performed at the wafer level (15, 22-24), before the inscribed wafer is separated into die. Then, the wafer is separated into die along the separation lines (17).
Abstract translation: 将诸如用于半导体器件制造的晶片的晶片分离成芯片的方法。 部分制造的晶片在其顶表面(10)上被覆盖有保护涂层。 然后将晶片刻上以限定管芯之间的分隔线,分离线具有预定深度(12)。 然后去除保护涂层(14),并且在将内切晶片分离成模具之前,在晶片级(15,22-24)处执行至少一个处理步骤。 然后,将晶片沿分离线(17)分离成模具。
-
216.
公开(公告)号:US20230356998A1
公开(公告)日:2023-11-09
申请号:US18357784
申请日:2023-07-24
Applicant: TDK Corporation , TDK Electronics AG
Inventor: Pirmin Hermann Otto Rombach , Kurt Rasmussen , Dennis Mortensen , Cheng-Yen Liu , Morten Ginnerup , Jan Tue Ravnkilde , Jotaro Akiyama
CPC classification number: B81B3/0051 , B81C1/00158 , H04R1/08 , H04R2201/003 , B81C2201/056 , B81B2201/0257 , B81B2203/0127 , B81C2201/053
Abstract: In an embodiment, a method for fabricating a Microelectromechanical System (MEMS) microphone includes depositing, on a frontside of a wafer, a first oxide layer over a silicon nitride thin film and over and adjacent the wafer, wherein the silicon nitride thin film is disposed over the wafer, depositing a membrane protection layer over the first oxide layer between a first side of a first cavity formed in the wafer and a second side of a second cavity formed in the wafer, depositing a second oxide layer over and adjacent the membrane protection layer, depositing a first membrane nitride layer over the second oxide layer, depositing a membrane polysilicon layer over the first membrane nitride layer, depositing a second membrane nitride layer over the membrane polysilicon layer, depositing a third oxide layer over the second membrane nitride layer and depositing a fourth oxide layer over the third oxide layer.
-
217.
公开(公告)号:US11746001B2
公开(公告)日:2023-09-05
申请号:US17308340
申请日:2021-05-05
Applicant: TDK Electronics AG , TDK Corporation
Inventor: Pirmin Hermann Otto Rombach , Kurt Rasmussen , Dennis Mortensen , Cheng-Yen Liu , Morten Ginnerup , Jan Tue Ravnkilde , Jotaro Akiyama
CPC classification number: B81B3/0051 , B81C1/00158 , H04R1/08 , B81B2201/0257 , B81B2203/0127 , B81C2201/053 , B81C2201/056 , H04R2201/003
Abstract: A microelectromechanical (MEMS) microphone with membrane trench reinforcements and method of fabrication is provided. The MEMS microphone includes a flexible plate and a rigid plate mechanically coupled to the flexible plate. The MEMS microphone includes a stoppage member affixed to the rigid plate and extending perpendicular relative to a surface of the rigid plate opposite the surface of the flexible plate. The stoppage member limits motion of the flexible plate. The rigid plate includes a reverse bending edge that include a first lateral etch stop that includes a first corner radius and a second lateral etch stop that includes a second corner radius. The first corner radius is more than 100 nanometers and the second corner radius is more than 25 nanometers. Further, a lateral step width between the first corner radius and the second corner radius is less than around 4 micrometers.
-
公开(公告)号:US20180288549A1
公开(公告)日:2018-10-04
申请号:US16001032
申请日:2018-06-06
Inventor: Jung-Huei Peng , Chia-Hua Chu , Chun-wen Cheng , Chin-Yi Cho , Li-Min Hung , Yao-Te Huang
CPC classification number: H04R31/003 , B81C1/00158 , B81C2201/0125 , B81C2201/013 , B81C2201/053 , B81C2203/036 , H04R19/005 , H04R19/04 , H04R31/006 , H04R2201/003 , H04R2307/027
Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.
-
219.
公开(公告)号:US20180257932A1
公开(公告)日:2018-09-13
申请号:US15914092
申请日:2018-03-07
Applicant: Robert Bosch GmbH
Inventor: Benjamin Steuer , Christoph Schelling , Daniel Pantel , Stefan Pinter
CPC classification number: B81C1/00626 , B81B7/0067 , B81B2201/042 , B81C2201/0123 , B81C2201/0133 , B81C2201/016 , B81C2201/053 , G02B26/0833
Abstract: A method for manufacturing a micromechanical device includes providing a silicon substrate having a front side and a rear side, where a first normal of the front side deviates by a first angle from the direction of the silicon substrate; forming in the front side first and second trenches that are spaced apart from and essentially parallel to each other, with the first and second trenches extending along a direction of the deviation; forming on the front side a first etching mask that covers the front side except for a first opening area between the first and second trenches; and anisotropically etching the front side using the etching mask, thereby forming in the opening area an oblique surface having a second angle to the first normal, which approximately corresponds to the first angle.
-
公开(公告)号:US10017377B2
公开(公告)日:2018-07-10
申请号:US15196395
申请日:2016-06-29
Applicant: Akustica, Inc. , Robert Bosch GmbH
Inventor: Mikko VA Suvanto
CPC classification number: B81B7/0058 , B81B2203/033 , B81C1/00404 , B81C1/00825 , B81C1/00896 , B81C2201/053 , H01L21/78 , H01L23/562
Abstract: A coating for protecting a wafer from moisture and debris due to dicing, singulating, or handling the wafer is provided. A semiconductor sensor device comprises a wafer having a surface and at least one trench feature and the protective coating covering the trench feature. The trench feature comprises a plurality of walls and the walls are covered with the protective coating, wherein the walls of the trench feature are formed as a portion of the semiconductor sensor device. The semiconductor sensor device further comprises a patterned mask formed on the wafer before the trench feature is formed, wherein the protective coating is formed directly to the trench feature and the patterned mask. The semiconductor sensor device is selected from a group consisting of a MEMS die, a sensor die, a sensor circuit die, a circuit die, a pressure die, an accelerometer, a gyroscope, a microphone, a speaker, a transducer, an optical sensor, a gas sensor, a bolometer, a giant magnetoresistive sensor (GMR), a tunnel magnetoresistive (TMR) sensor, an environmental sensor, and a temperature sensor.
-
-
-
-
-
-
-
-
-