公开(公告)号：US08474135B2

公开(公告)日：2013-07-02

申请号：US12504339

申请日：2009-07-16

Applicant: Ki-Hyun Kim ,  Se Ho Park ,  Seok-Myong Kang ,  Young-Min Lee

Inventor： Ki-Hyun Kim ,  Se Ho Park ,  Seok-Myong Kang ,  Young-Min Lee

IPC: H01K3/10

CPC classification number: H05K3/4069 ,  H05K1/0393 ,  H05K1/095 ,  H05K3/12 ,  H05K3/246 ,  H05K2201/0347 ,  H05K2201/0352 ,  H05K2201/09981 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method for fabricating a printed circuit board is provided. The method includes manufacturing a base film including a first side and a second side opposite to the first side; printing a first wiring on the first side with a high-viscosity conductive material having a viscosity of 5,000 to 300,000 centipoise (CPS); forming a via-hole that passes through both sides of the base film, and passes by the first wiring; and printing a second wiring on the second side with a low-viscosity conductive material having a viscosity of 100 to 5,000 CPS. The low-viscosity conductive material is applied to an inner wall of the via-hole to conductively connect the first wiring to the second wiring.

Abstract translation: 提供一种制造印刷电路板的方法。 该方法包括制造包括第一侧和与第一侧相对的第二侧的基膜; 用粘度为5000至300,000厘泊（CPS）的高粘度导电材料在第一侧印刷第一布线; 形成穿过基膜的两侧的通孔，并通过第一布线; 以及使用粘度为100-5,000CPS的低粘度导电材料在第二侧上印刷第二布线。 将低粘度导电材料施加到通孔的内壁，以将第一布线导电连接到第二布线。

公开(公告)号：US08424202B2

公开(公告)日：2013-04-23

申请号：US12783851

申请日：2010-05-20

Applicant: Tzyy-Jang Tseng ,  Shu-Sheng Chiang ,  Tsung-Yuan Chen

Inventor： Tzyy-Jang Tseng ,  Shu-Sheng Chiang ,  Tsung-Yuan Chen

IPC: H01K3/10

CPC classification number: H05K3/06 ,  H05K1/0298 ,  H05K3/465 ,  H05K2201/0347 ,  Y10T29/49126 ,  Y10T29/49165

Abstract: A process for fabricating a circuit board is provided. A circuit substrate having a first surface and a first circuit layer is provided. A first dielectric layer having a second surface is formed on the circuit substrate and covers the first surface and the first circuit layer. An antagonistic activation layer is formed on the second surface. The antagonistic activation layer is irradiated by a laser beam to form at least a blind via extended from the antagonistic activation layer to the first circuit layer and an intaglio pattern. A first conductive layer is formed inside the blind via. A second conductive layer is formed in the intaglio pattern and the blind via. The second conductive layer covers the first conductive layer and is electrically connected with the first circuit layer through the first conductive layer. The antagonistic activation layer is removed to expose the second surface.

Abstract translation: 提供一种制造电路板的工艺。 提供具有第一表面和第一电路层的电路基板。 具有第二表面的第一电介质层形成在电路基板上并覆盖第一表面和第一电路层。 在第二表面上形成拮抗活化层。 通过激光束照射拮抗激活层，以形成从拮抗活化层延伸到第一电路层和凹版图案的至少盲目通孔。 在盲通孔内形成第一导电层。 在凹版图案和盲孔中形成第二导电层。 第二导电层覆盖第一导电层，并通过第一导电层与第一电路层电连接。 去除拮抗活化层以暴露第二表面。

公开(公告)号：US08261437B2

公开(公告)日：2012-09-11

申请号：US12525967

申请日：2008-02-27

Applicant: Hiroshi Yanagimoto ,  Takeshi Bessho ,  Hidemi Nawafune ,  Kensuke Akamatsu

Inventor： Hiroshi Yanagimoto ,  Takeshi Bessho ,  Hidemi Nawafune ,  Kensuke Akamatsu

IPC: H05K3/02

CPC classification number: H05K3/107 ,  H05K3/20 ,  H05K3/207 ,  H05K3/246 ,  H05K2201/0347 ,  H05K2201/09736 ,  H05K2203/0108 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49158

Abstract: According to the present invention, a circuit board having a further-microfabricated circuit pattern that can be manufactured in further simplified steps is obtained. For such purpose, a mold 10, which has protrusions 11 formed in a pattern corresponding to a circuit pattern, is used to apply a conductive material layer (metal paste) 13 to head portions of the protrusions 11 of the mold 10. The mold is heat- and pressure-welded to the surface of a substrate 20 that is made of a resin film or the like. Accordingly, a pattern comprising the protrusions 11 and the conductive material layer (metal paste) 13 are transferred to the substrate 20. After transfer, the resin substrate (resin molding 30) is immersed in a copper sulfate plating bath for electrolytic plating treatment. Copper ions in the plating bath were deposited inside each recess 31 while the conductive material layer 13 is used as a base material for the formation of a metal wiring 32. A pattern of the recesses 31 transferred to the substrate-20 side is determined depending on a pattern comprising the protrusions 11 on the mold 10. Thus, a microfabricated high-density circuit pattern formed with metal wirings 32 having arbitrary aspect ratios can be obtained.

Abstract translation: 根据本发明，可以获得可以进一步简化的步骤制造的具有更微细加工电路图案的电路板。 为此目的，使用具有与电路图案相对应的图案形成的突起11的模具10，将导电材料层（金属糊）13施加到模具10的突起11的头部。模具为 热压并且被压焊到由树脂膜等制成的基板20的表面上。 因此，将包括突起11和导电材料层（金属膏）13的图案转印到基板20上。转印后，将树脂基板（树脂成型体30）浸渍在用于电解电镀处理的硫酸铜电镀浴中。 将电镀液中的铜离子沉积在每个凹部31内，同时使用导电材料层13作为形成金属布线32的基材。转移到基板20侧的凹部31的图案根据 在模具10上包括突起11的图案。因此，可以获得由具有任意长宽比的金属布线32形成的微细加工的高密度电路图案。

公开(公告)号：US08240016B2

公开(公告)日：2012-08-14

申请号：US12770914

申请日：2010-04-30

Applicant: Akihiro Motoki ,  Makoto Ogawa ,  Kenichi Kawasaki ,  Shunsuke Takeuchi

Inventor： Akihiro Motoki ,  Makoto Ogawa ,  Kenichi Kawasaki ,  Shunsuke Takeuchi

IPC: H01G7/00

CPC classification number: H01G4/30 ,  H01G4/232 ,  H01G4/2325 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/102 ,  H05K3/246 ,  H05K3/403 ,  H05K2201/0347 ,  H05K2203/025 ,  Y10T29/417 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T428/25

Abstract: A method for manufacturing a multilayer electronic component includes a step of preparing a laminate which includes a plurality of stacked insulator layers and a plurality of internal electrodes extending along the interfaces between the insulator layers, and in which an end of each of the plurality of internal electrodes is exposed at a predetermined surface corresponding to one of the first and second end surfaces; a step of forming external electrodes on the predetermined surfaces; and a step of forming thick-film edge electrodes at edge portions. The step of forming external electrodes includes a step of attaching a plurality of conductive particles having a particle size of about 1 μm or more to the predetermined surfaces of the laminate, and a step of performing plating directly on the predetermined surfaces to which the conductive particles are attached.

Abstract translation: 一种制造多层电子部件的方法包括制备层压体的步骤，该层压体包括多个堆叠的绝缘体层和沿着绝缘体层之间的界面延伸的多个内部电极，并且其中多个内部 电极在对应于第一和第二端面之一的预定表面处露出; 在所述预定表面上形成外部电极的步骤; 以及在边缘部分形成厚膜边缘电极的步骤。 形成外部电极的步骤包括将多个具有约1μm以上的粒径的导电粒子附着在层叠体的规定表面上的步骤，以及在导电粒子的规定表面上直接进行电镀的工序 附上。

公开(公告)号：US08225503B2

公开(公告)日：2012-07-24

申请号：US12163252

申请日：2008-06-27

Applicant: Takashi Kariya ,  Toshiki Furutani

Inventor： Takashi Kariya ,  Toshiki Furutani

IPC: H05K3/10

CPC classification number: H05K3/428 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/12105 ,  H01L2224/26175 ,  H01L2224/73204 ,  H01L2224/83132 ,  H01L2224/83192 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01093 ,  H01L2924/14 ,  H05K1/187 ,  H05K3/205 ,  H05K3/243 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0341 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/09918 ,  H05K2201/10674 ,  H05K2203/0361 ,  H05K2203/063 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A method for manufacturing a board with a built-in electronic element, includes providing a support substrate including a support base and a metal foil, forming a protective film made of a metal material on the metal foil of the support substrate, forming a conductive pattern made of a metal material on the protective film by an additive method, placing an electronic element on the support substrate with the conductive pattern such that a surface of the electronic element where a circuit is formed faces the conductive pattern, covering the electronic element with an insulative resin, etching away the metal foil using a first etching solution such that the protective film is not dissolved by the first etching solution or that the protective film has an etching speed which is slower than an etching speed of the metal foil, and electrically connecting terminals of the electronic element and a part of the conductive pattern.

Abstract translation: 一种用于制造具有内置电子元件的板的方法，包括提供包括支撑基底和金属箔的支撑基板，在支撑基板的金属箔上形成由金属材料制成的保护膜，形成导电图案 通过添加方法在保护膜上由金属材料制成，将电子元件放置在具有导电图案的支撑基板上，使得形成电路的电子元件的表面面向导电图案，用电子元件覆盖电子元件 绝缘树脂，使用第一蚀刻溶液蚀刻掉金属箔，使得保护膜不被第一蚀刻溶液溶解，或者保护膜具有比金属箔的蚀刻速度慢的蚀刻速度，并且电连接 电子元件的端子和导电图案的一部分。

公开(公告)号：US20120145665A1

公开(公告)日：2012-06-14

申请号：US13400809

申请日：2012-02-21

Applicant: Kohichi OHSUMI ,  Kazunori HAYASHI ,  Tomoharu TSUCHIDA

Inventor： Kohichi OHSUMI ,  Kazunori HAYASHI ,  Tomoharu TSUCHIDA

IPC: H05K3/00

CPC classification number: H05K3/426 ,  H05K3/427 ,  H05K2201/0347 ,  H05K2201/09563

Abstract: A method of manufacturing a printed circuit board includes forming a through hole 2 in an insulating layer 1 having upper and lower faces so as to penetrate between the upper and lower surfaces; allowing a first plated conductor 4 to be deposited at least in the through hole 2 and on the upper and lower surfaces around the through hole; removing the first plated conductor overlying and underlying a periphery of the through hole by etching the first plated conductor 4, while leaving at least the first plated conductor 4 in a mid-portion in a vertical direction within the through hole 2; and forming by semi-additive method a second plated conductor 6 that fills an outer portion than the first plated conductor 4 in the through hole 2, and forms a wiring conductor on the upper and lower surfaces.

Abstract translation: 一种制造印刷电路板的方法包括在具有上表面和下表面的绝缘层1中形成通孔2，以穿透上下表面; 允许第一镀覆导体4至少沉积在通孔2中以及围绕通孔的上表面和下表面上; 通过蚀刻第一镀覆导体4，使至少第一镀覆导体4至少在通孔2中的垂直方向的中间部分中去除覆盖在通孔周围的第一镀覆导体; 并且通过半添加法形成在通孔2中填充比第一镀覆导体4的外部的第二镀覆导体6，并且在上表面和下表面上形成布线导体。

公开(公告)号：US20120144667A1

公开(公告)日：2012-06-14

申请号：US13399995

申请日：2012-02-17

Applicant: Rajwant Singh Sidhu

Inventor： Rajwant Singh Sidhu

IPC: H05K3/10

CPC classification number: H05K3/427 ,  H05K1/116 ,  H05K3/243 ,  H05K3/4602 ,  H05K2201/0347 ,  H05K2201/0959 ,  H05K2203/025 ,  H05K2203/0554 ,  H05K2203/1476 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: Printed circuit boards have circuit layers with one or more via filled holes with copper wraps and methods of manufacturing the same. An embodiment of the present invention provides a method to enhance the consistency of the wraparound plating of through-hole vias of printed circuit boards with (requiring) via filling to provide extra reliability to the printed circuit boards and enables the designers and/or manufacturers of printed circuit boards to design and manufacture boards with relatively fine features and/or tight geometries.

Abstract translation: 印刷电路板具有带铜箔的一个或多个通孔填充孔的电路层及其制造方法。 本发明的一个实施例提供了一种通过（需要）通过填充来增强印刷电路板的通孔通孔的环绕电镀的一致性的方法，以向印刷电路板提供额外的可靠性，并且使设计者和/或制造商 印刷电路板设计和制造具有相对精细特征和/或紧密几何形状的电路板。

公开(公告)号：US20120138341A1

公开(公告)日：2012-06-07

申请号：US13396485

申请日：2012-02-14

Applicant: Lee H. Tullidge ,  Leonard De Oto ,  Tim Larson ,  Patrick O'Keefe ,  Herb Gertz

Inventor： Lee H. Tullidge ,  Leonard De Oto ,  Tim Larson ,  Patrick O'Keefe ,  Herb Gertz

IPC: H05K7/20

CPC classification number: H05K1/0206 ,  H05K1/113 ,  H05K3/108 ,  H05K3/243 ,  H05K3/423 ,  H05K3/426 ,  H05K2201/0347 ,  H05K2201/0959 ,  H05K2203/025 ,  H05K2203/1492 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A device and method of heat sinking a surface mount device (SMD) component. In an example method through holes are formed in a printed circuit board (PCB), a first copper layer is electroless plated in the holes, a second copper layer is standard plated in the holes and surrounding surfaces of the PCB, a third copper layer is masked and pulse plated in the holes, the holes are filled with non-conductive material and then is sanded flush with the second copper layer. A fourth copper layer electroless plated on the PCB over the area of the holes, a fifth copper layer (or pad) plated on the PCB over the area of the holes, and a surface mount device is attached to the fifth copper layer.

Abstract translation: 散热表面贴装器件（SMD）元件的器件和方法。 在一个示例性方法中，通孔形成在印刷电路板（PCB）中，第一铜层被无电镀在孔中，第二铜层标准镀在PCB的孔和周围表面中，第三铜层是 屏蔽并脉冲电镀在孔中，孔中填充有非导电材料，然后与第二铜层进行砂光冲洗。 在PCB上的无孔电镀第四铜层，在孔的区域上镀有PCB上的第五铜层（或焊盘），以及表面贴装装置附着在第五铜层上。

公开(公告)号：US08138422B2

公开(公告)日：2012-03-20

申请号：US12512588

申请日：2009-07-30

Applicant: Se-Ho Park ,  Ki-Hyun Kim ,  Seok-Myong Kang ,  Young-Min Lee

Inventor： Se-Ho Park ,  Ki-Hyun Kim ,  Seok-Myong Kang ,  Young-Min Lee

IPC: H05K1/00 ,  H05K1/03 ,  H05K1/09

CPC classification number: H05K3/246 ,  H05K1/092 ,  H05K1/095 ,  H05K2201/0347 ,  H05K2203/1131 ,  Y10T29/49155

Abstract: A Printed Circuit Board (PCB) and a method for manufacturing the same are provided. A circuit pattern is formed by printing conductive ink/paste on a substrate, and sintering a layer of the conductive ink or curing a layer of the conductive paste by applying heat. A primary plating layer is formed through electroless plating or electrolytic plating of a high-melting point metal on the circuit pattern. A secondary plating layer is formed through electroless plating or electrolytic plating of a precious metal on the primary plating layer to improve wetting with solder.

Abstract translation: 提供印刷电路板（PCB）及其制造方法。 通过在基板上印刷导电油墨/糊料，并且通过加热来烧结导电油墨层或固化导电浆料层而形成电路图案。 通过电路图案上的高熔点金属的化学镀或电解电镀形成初级镀层。 通过在主镀层上的贵金属的化学镀或电解电镀形成二次镀层，以改善用焊料的润湿。

公开(公告)号：US08112884B2

公开(公告)日：2012-02-14

申请号：US11868871

申请日：2007-10-08

Applicant: Lee H. Tullidge ,  Leonard De Oto ,  Tim Larson ,  Patrick O'Keefe ,  Herb Gertz

Inventor： Lee H. Tullidge ,  Leonard De Oto ,  Tim Larson ,  Patrick O'Keefe ,  Herb Gertz

IPC: H01K3/10

CPC classification number: H05K1/0206 ,  H05K1/113 ,  H05K3/108 ,  H05K3/243 ,  H05K3/423 ,  H05K3/426 ,  H05K2201/0347 ,  H05K2201/0959 ,  H05K2203/025 ,  H05K2203/1492 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method of heat sinking a surface mount device (SMD) component. In an example method through holes are formed in a printed circuit board (PCB), a first copper layer is electroless plated in the holes, a second copper layer is standard plated in the holes and surrounding surfaces of the PCB, a third copper layer is masked and pulse plated in the holes, the holes are filled with non-conductive material and then is sanded flush with the second copper layer. A fourth copper layer electroless plated on the PCB over the area of the holes, a fifth copper layer (or pad) plated on the PCB over the area of the holes, and a surface mount device is attached to the fifth copper layer.

Abstract translation: 一种散热表面贴装器件（SMD）元件的方法。 在一个示例性方法中，通孔形成在印刷电路板（PCB）中，第一铜层被无电镀在孔中，第二铜层标准镀在PCB的孔和周围表面中，第三铜层是 屏蔽并脉冲电镀在孔中，孔中填充有非导电材料，然后与第二铜层进行砂光冲洗。 在PCB上的无孔电镀第四铜层，在孔的区域上镀有PCB上的第五铜层（或焊盘），以及表面贴装装置附着在第五铜层上。