公开(公告)号：US08258888B2

公开(公告)日：2012-09-04

申请号：US12588731

申请日：2009-10-26

Applicant: Hidetaka Ootsuka

Inventor： Hidetaka Ootsuka

IPC: H01P5/02

CPC classification number: H05K1/117 ,  H05K1/0216 ,  H05K1/024 ,  H05K1/025 ,  H05K2201/0792 ,  H05K2201/09663 ,  H05K2201/09909 ,  H05K2201/10318 ,  Y10T29/49204

Abstract: A substrate device includes: a substrate; a ground layer disposed on one of two opposing surfaces of the substrate; a transmission line disposed on the other of the two opposing surfaces of the substrate; a pad which is disposed on the other of the two opposing surfaces of the substrate and connected to the transmission line; and a connector connected to the pad via a contact point. The pad has a part on the transmission line side and a part positioned on the opposite side of the transmission line with respect to the contact point with the connector which are electrically insulated from each other.

Abstract translation: 衬底装置包括：衬底; 设置在所述基板的两个相对表面中的一个上的接地层; 布置在所述基板的所述两个相对表面中的另一个表面上的传输线; 衬垫，其设置在所述衬底的所述两个相对表面中的另一个上并连接到所述传输线; 以及通过接触点连接到焊盘的连接器。 衬垫在传输线侧具有一部分，并且相对于彼此电绝缘的与连接器的接触点位于传输线相对侧的部分。

公开(公告)号：US08253026B2

公开(公告)日：2012-08-28

申请号：US12414780

申请日：2009-03-31

Applicant: Steffen Strauss ,  Michael Weis

Inventor： Steffen Strauss ,  Michael Weis

IPC: H05K7/20

CPC classification number: H05K1/0207 ,  F21K9/00 ,  H01L23/3677 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/10106 ,  H05K2201/10416 ,  H01L2924/00

Abstract: A printed circuit board is provided with at least one via hole, in which a heat dissipating element is arranged, wherein at least one radiant source is arranged on the heat dissipating element. The lighting device is provided with at least one such printed circuit board.

Abstract translation: 印刷电路板设置有至少一个通孔，其中布置有散热元件，其中至少一个辐射源设置在散热元件上。 照明装置设置有至少一个这样的印刷电路板。

公开(公告)号：US08143528B2

公开(公告)日：2012-03-27

申请号：US12277250

申请日：2008-11-24

Applicant: Hou-Yuan Chou

Inventor： Hou-Yuan Chou

IPC: H05K1/03

CPC classification number: H05K1/0268 ,  G01R31/2818 ,  H05K1/0237 ,  H05K1/11 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2203/162 ,  Y10T29/49124 ,  Y10T29/49147

Abstract: A printed circuit board includes a signal layer, an insulation layer, and a reference layer. A transmission line is located on the signal layer. A probing pad is located on the transmission line. Two aligned slots defined in opposite sides of the reference layer leaving a connecting portion. The slots and the connecting portion are in vertical alignment with the probing pad. The signal layer, the insulation layer, and the reference layer are configured in a cascading order. An arrangement of the signal layer in relation to the reference layer including the slots and the connecting portion reduces a capacitance effect caused by the probing pad.

Abstract translation: 印刷电路板包括信号层，绝缘层和参考层。 传输线位于信号层上。 探测板位于传输线上。 限定在参考层的相对侧中的两个对准的槽留下连接部分。 槽和连接部分与探测板垂直对准。 信号层，绝缘层和参考层以级联顺序配置。 信号层相对于包括狭缝和连接部分的参考层的布置减小了由探测垫引起的电容效应。

公开(公告)号：US08143526B2

公开(公告)日：2012-03-27

申请号：US12549374

申请日：2009-08-28

Applicant: Shou-Kuo Hsu

Inventor： Shou-Kuo Hsu

IPC: H05K1/00

CPC classification number: H05K1/0245 ,  H05K1/0219 ,  H05K1/0253 ,  H05K1/0393 ,  H05K2201/09236 ,  H05K2201/09663 ,  H05K2201/09727

Abstract: A flexible printed circuit board includes a differential pair arranged in a signal layer and two sheets defined in a ground layer. The two sheets are apart from each other by a void defined in the ground layer opposite to the differential pair. The differential pair includes a number of section pairs, each of which includes two sections arranged in two transmission lines of the differential pair respectively. The differential pair is equivalent to a low pass filter which includes several capacitors and several inductors. Each of the plurality of section pairs can achieve a desired characteristic impedance by adjusting a distance between each section and a corresponding nearest sheet, and a distance between the two sections of each of the plurality of section pairs.

Abstract translation: 柔性印刷电路板包括布置在信号层中的差分对和限定在接地层中的两个片。 两个片材通过与差分对相对的接地层中限定的空隙彼此分开。 差分对包括多个部分对，每个部分对分别包括分别布置在差分对的两条传输线中的两个部分。 该差分对相当于一个低通滤波器，它包括几个电容器和几个电感器。 多个部分对中的每一个可以通过调整每个部分与相应的最近的片材之间的距离以及多个部分对中的每一个的两个部分之间的距离来实现期望的特征阻抗。

公开(公告)号：US08130514B2

公开(公告)日：2012-03-06

申请号：US12400076

申请日：2009-03-09

Applicant: Hiroyuki Onodera

Inventor： Hiroyuki Onodera

IPC: H05K1/11

CPC classification number: H05K3/361 ,  G02F1/1345 ,  G02F2001/13456 ,  H05K1/0219 ,  H05K1/117 ,  H05K2201/0769 ,  H05K2201/094 ,  H05K2201/09663 ,  H05K2201/09781

Abstract: A mounting structure includes: a first substrate; a second substrate; a first terminal being formed on the first substrate and having a plurality of terminal portions arranged with a gap therebetween; a different terminal being formed on the first substrate and being adjacent to the first terminal; and a second terminal being formed on the second substrate and being electrically connected to at least one of the terminal portions of the first terminal. Here, the first terminal is supplied with a potential higher than that supplied to the different terminal.

Abstract translation: 安装结构包括：第一基板; 第二基板; 第一端子形成在第一基板上，并且具有多个端子部分，间隔开间隔开; 不同的端子形成在第一基板上并且与第一端子相邻; 以及第二端子，形成在所述第二基板上并且电连接到所述第一端子的至少一个端子部分。 这里，第一端子被提供有比提供给不同端子的电位更高的电位。

公开(公告)号：US20120016504A1

公开(公告)日：2012-01-19

申请号：US13259393

申请日：2009-09-17

Applicant: David Gough ,  Arthur L. Daniel ,  Kevin L. Massaro

Inventor： David Gough ,  Arthur L. Daniel ,  Kevin L. Massaro

IPC: G06F17/00

CPC classification number: H05K1/0227 ,  H05K1/0219 ,  H05K1/0259 ,  H05K2201/09618 ,  H05K2201/09663 ,  H05K2201/09972

Abstract: There is provided an electronic device having an audio system for reproducing audio signals. An exemplary electronic device has an analog region and a separate and non-overlapping digital region. The electronic device comprises an analog ground plane disposed within the analog region and a digital ground plane disposed within the digital region. Digital circuitry is disposed opposite the digital ground plane, wherein digital signals are routed on or over the digital ground plane. Analog circuitry is disposed opposite the analog ground plane, wherein analog signals are routed on or over the analog ground plane. At least one audio output channel disposed opposite the analog ground plane.

Abstract translation: 提供了一种具有用于再现音频信号的音频系统的电子设备。 示例性电子设备具有模拟区域和单独且非重叠的数字区域。 电子设备包括设置在模拟区域内的模拟接地平面和设置在数字区域内的数字接地平面。 数字电路与数字接地平面相对设置，其中数字信号在数字接地平面上或上方布线。 模拟电路与模拟地平面相对设置，其中模拟信号在模拟地平面上或上方布线。 与模拟地平面相对设置的至少一个音频输出通道。

公开(公告)号：US20110315440A1

公开(公告)日：2011-12-29

申请号：US13137632

申请日：2011-08-30

Applicant: Han Kim

Inventor： Han Kim

IPC: H05K1/11

CPC classification number: H01P1/2005 ,  H01Q15/006 ,  H01Q15/008 ,  H05K1/0236 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/0969

Abstract: An electromagnetic bandgap structure and a printed circuit board that have a mushroom type structure. The electromagnetic bandgap structure includes a first metal layer; a first dielectric layer, layer-built on the first metal layer; a mushroom type structure having a metal plate layer-built on the first dielectric layer and a via of which one end is connected to the metal plate; a second dielectric layer, layer-built on the metal plate and the first dielectric layer; and a second metal layer, layer-built on the second dielectric layer, wherein the other end of the via is placed in a hole formed on the first metal layer and is connected to the first metal layer through a metal line.

Abstract translation: 具有蘑菇型结构的电磁带隙结构和印刷电路板。 电磁带隙结构包括第一金属层; 第一电介质层，其被构建在第一金属层上; 具有建立在第一电介质层上的金属板层的蘑菇型结构和其一端连接到金属板的通孔; 第二电介质层，层叠在金属板和第一介电层上; 以及第二金属层，其构造在所述第二电介质层上，其中所述通孔的另一端位于形成在所述第一金属层上的孔中，并且通过金属线连接到所述第一金属层。

公开(公告)号：US20110310568A1

公开(公告)日：2011-12-22

申请号：US13163200

申请日：2011-06-17

Applicant: Tao Hong ,  Markus Thoben

Inventor： Tao Hong ,  Markus Thoben

IPC: H05K1/14 ,  H01L29/86

CPC classification number: H05K1/181 ,  G01R1/203 ,  H01L23/647 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L25/072 ,  H01L25/16 ,  H01L25/18 ,  H01L27/0207 ,  H01L28/20 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4847 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/8382 ,  H01L2224/8384 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K3/222 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/10022 ,  H05K2201/10166 ,  H05K2203/173 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/83205

Abstract: A circuit arrangement has a populated circuit carrier and includes a flat insulation carrier having a top side and a patterned metallization layer on the top side and a first power semiconductor chip arranged on a first section of the metallization layer. The first power semiconductor chip has a first lower chip load terminal electrically conductively connected to the first section. A shunt resistor is arranged on a second section of the metallization layer. The shunt resistor has a lower main terminal electrically conductively connected to the second section. An electrically conductive connection is provided between the first section and the second section. The electrically conductive connection includes a constriction between the first section and the second section so that a current which flows between the first lower chip load terminal and the lower main terminal during operation of the circuit arrangement must pass through the constriction.

Abstract translation: 电路装置具有填充电路载体，并且包括在顶侧具有顶侧和图案化金属化层的平坦绝缘载体和布置在金属化层的第一部分上的第一功率半导体芯片。 第一功率半导体芯片具有导电连接到第一部分的第一下部芯片负载端子。 分流电阻器布置在金属化层的第二部分上。 分流电阻器具有导电连接到第二部分的下主端子。 在第一部分和第二部分之间提供导电连接。 导电连接包括第一部分和第二部分之间的收缩部分，使得在电路装置的操作期间在第一下部芯片负载端子和下部主端子之间流动的电流必须通过收缩部。

公开(公告)号：US20110292625A1

公开(公告)日：2011-12-01

申请号：US13117614

申请日：2011-05-27

Applicant: HAN-CHUNG CHEN ,  Chun-Yi Wu ,  Shih-Cheng Wang ,  Chin-Mei Huang ,  Tsui-Chuan Wang ,  Pei-Fang Tsai

Inventor： HAN-CHUNG CHEN ,  Chun-Yi Wu ,  Shih-Cheng Wang ,  Chin-Mei Huang ,  Tsui-Chuan Wang ,  Pei-Fang Tsai

IPC: H05K7/06

CPC classification number: H05K1/111 ,  H01L24/83 ,  H01L33/62 ,  H01L2224/8338 ,  H01L2224/83385 ,  H01L2224/83801 ,  H01L2924/12041 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H05K1/0295 ,  H05K3/3442 ,  H05K2201/09381 ,  H05K2201/09663 ,  H05K2201/09954 ,  H05K2201/10106 ,  H05K2201/10636 ,  H05K2203/048 ,  Y02P70/611

Abstract: A bonding pad structure is disclosed, which is composed of two bonding pad units that are symmetrically disposed with respect to an axial line. Each bonding pad units is further composed of at least two bonding pads, i.e. each bonding pad unit is composed of at least one first bonding pad and at least one second bonding pad. In an embodiment, the first bonding pad is arranged next to the axial line and the second bonding pad is arranged at a side of the corresponding first bonding pad away from the axial line while enabling the first bonding pad and the corresponding second bonding pad to be interconnected to each other by a first neck portion. Thereby, a plurality of solder areas of different sizes can be formed by the interconnecting of the at least two bonding pad units that can be used for soldering electronic components of different sizes.

Abstract translation: 公开了一种焊盘结构，其由相对于轴线对称设置的两个焊盘单元组成。 每个焊盘单元进一步由至少两个焊盘组成，即每个焊盘单元由至少一个第一焊盘和至少一个第二接合焊盘构成。 在一个实施例中，第一焊盘靠近轴线布置，并且第二焊盘布置在相对应的第一焊盘的远离轴线的一侧，同时使得第一焊盘和相应的第二焊盘是 通过第一颈部部彼此互连。 因此，可以通过互连可以用于焊接不同尺寸的电子部件的至少两个焊盘单元来形成不同尺寸的多个焊料区域。

公开(公告)号：US20110290537A1

公开(公告)日：2011-12-01

申请号：US13112546

申请日：2011-05-20

Applicant: Shigeki NAGASE

Inventor： Shigeki NAGASE

IPC: H05K1/02

CPC classification number: H05K1/0206 ,  H01L23/3677 ,  H01L23/3737 ,  H01L2924/0002 ,  H05K1/0209 ,  H05K3/0061 ,  H05K2201/09663 ,  H01L2924/00

Abstract: A multilayer circuit substrate includes a substrate body in turn including a plurality of conductor layers and a plurality of insulating layers that are laminated alternately. The plurality of conductor layers include an uppermost conductor layer that includes a plurality of conductor patterns and a lowermost conductor layer that includes a plurality of conductor patterns. A plurality of semiconductor devices is respectively mounted on the plurality of conductor patterns of the uppermost conductor layer. The plurality of conductor patterns of the lowermost conductor layer includes a plurality of heat releasing patterns. The plurality of heat releasing patterns is respectively provided in one-to-one correspondence with the plurality of semiconductor devices. Each of the heat releasing patterns has an area no less than an area of the corresponding semiconductor device. Each of the heat releasing patterns is connected to the corresponding semiconductor device via a corresponding heat releasing via.

Abstract translation: 多层电路基板包括依次包括多个导体层的基板本体和交替层叠的多个绝缘层。 多个导体层包括包括多个导体图案的最上面的导体层和包括多个导体图案的最下面的导体层。 多个半导体器件分别安装在最上面的导体层的多个导体图案上。 最下面的导体层的多个导体图案包括多个放热图案。 多个散热图案分别与多个半导体器件一一对应地设置。 每个散热图案具有不小于相应半导体器件的面积的面积。 每个散热图案通过相应的放热通孔连接到相应的半导体器件。