公开(公告)号：US06876554B1

公开(公告)日：2005-04-05

申请号：US09830361

申请日：2000-09-01

Applicant: Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

Inventor： Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

IPC: H01L21/48 ,  H01L23/498 ,  H01L23/50 ,  H01L23/64 ,  H01L25/16 ,  H05K1/02 ,  H05K1/18 ,  H05K3/46

CPC classification number: H05K1/115 ,  H01G2/06 ,  H01G4/12 ,  H01G4/224 ,  H01G4/228 ,  H01G4/248 ,  H01G4/40 ,  H01L21/4857 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01046 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/112 ,  H05K1/181 ,  H05K1/183 ,  H05K1/185 ,  H05K1/186 ,  H05K3/4602 ,  H05K2201/09509 ,  H05K2201/09545 ,  H05K2201/096 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611

Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

Abstract translation: 片状电容器20设置在印刷电路板10中。以这种方式，IC芯片90和每个片状电容器20之间的距离缩短，并且环路电感减小。 此外，芯片电容器20被容纳在具有大厚​​度的芯基板30中。 因此，印刷电路板的厚度不会变大。

公开(公告)号：US06835895B1

公开(公告)日：2004-12-28

申请号：US09319258

申请日：1999-06-11

Applicant: Motoo Asai ,  Yasuji Hiramatsu

Inventor： Motoo Asai ,  Yasuji Hiramatsu

IPC: H05K103

CPC classification number: H05K3/108 ,  H05K1/0269 ,  H05K3/067 ,  H05K3/244 ,  H05K3/3452 ,  H05K3/382 ,  H05K3/384 ,  H05K3/4661 ,  H05K2201/0989 ,  H05K2201/09918 ,  H05K2203/0307 ,  H05K2203/072 ,  Y10S428/901 ,  Y10T29/49002 ,  Y10T29/49156 ,  Y10T29/49167 ,  Y10T156/1056 ,  Y10T428/24917

Abstract: A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film and an electrolytic plated film and a roughened layer is formed on at least a part of the surface of the conductor circuit.

Abstract translation: 印刷电路板是通过在基板的导体电路上层叠层间绝缘层而形成的，其中导体电路由无电解电镀膜和电解电镀膜构成，并且在至少一部分上形成有粗糙层 导体电路的表面。

公开(公告)号：US06762921B1

公开(公告)日：2004-07-13

申请号：US09926476

申请日：2001-11-09

Applicant: Motoo Asai ,  Kouta Noda ,  Takashi Kariya

Inventor： Motoo Asai ,  Kouta Noda ,  Takashi Kariya

IPC: H02H322

CPC classification number: H05K3/4661 ,  H05K3/108 ,  H05K3/381 ,  H05K3/383 ,  H05K3/384 ,  H05K3/385 ,  H05K3/421 ,  H05K2201/0195 ,  H05K2201/09509 ,  Y10T428/24273

Abstract: This invention is to propose a technique of producing a printed wiring board having an excellent adhesion property between an electroless plated film and an electrolytic plated film constituting a conductor circuit through a semi-additive process without causing the peeling of a plating resist and is a printed wiring board comprising conductor circuits formed on a roughened surface of an insulating layer, in which the conductor circuit is constituted with an electroless plated film at the side of the insulating layer and an electrolytic plated film at the opposite side and the electroless plated film located at the side of the insulating layer is formed so as to follow to the roughened surface of the insulating layer. This printed wiring board is produced by a semi-additive method wherein the electroless plated film is formed on the roughened surface of the insulating layer so as to follow to the roughened surface of the insulating layer.

Abstract translation: 本发明提出一种制造印刷电路板的技术，该印刷电路板在不引起电镀抗蚀剂剥离的情况下，通过半添加工艺，在化学镀膜和构成导体电路的电解电镀膜之间具有优异的粘合性，并且是印刷 布线板包括形成在绝缘层的粗糙表面上的导体电路，其中导体电路由绝缘层侧面的无电解电镀膜和位于绝缘层侧面的电镀电镀膜和位于 绝缘层的一侧形成为与绝缘层的粗糙化表面相邻。 该印刷电路板是通过半附加法制造的，其中无电镀膜形成在绝缘层的粗糙化表面上，以便遵循绝缘层的粗糙化表面。

公开(公告)号：US06534723B1

公开(公告)日：2003-03-18

申请号：US09821460

申请日：2001-04-06

Applicant: Motoo Asai ,  Takashi Kariya

Inventor： Motoo Asai ,  Takashi Kariya

IPC: H05K103

CPC classification number: H05K3/4617 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K3/4602 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/09563 ,  H05K2201/096

Abstract: A multilayer printed-circuit board is provided which is formed by stacking one on the other a plurality of circuit boards, each including a hard insulative substrate having a conductor circuit formed on one or either side thereof, and having formed therein via-holes formed through the hard insulative substrate to extend to the conductor circuit and each filled with a conductive substance, with an adhesive applied between the plurality of circuit boards, and heating and pressing the circuit boards together. One of the outermost ones of the stacked circuit boards has formed on the surface thereof conductive bumps each positioned right above the via-hole and electrically connected to the via-hole, and the other outermost one of the stacked circuit boards has formed on the surface thereof conductive pin or balls each positioned right above the via-hole and electrically connected to the via-hole. This multilayer printed-circuit board is used as a package circuit board and electronic components such as LSI chip are mounted on it to form a semiconductor device. The multilayer printed-circuit board is used as a core substrate, and a build-up wiring layer is formed on one or either side of the core multilayer circuit board. Solder bumps are formed on the surface of one outermost conductor circuit of the build-up wiring layer and conductive pins or balls are provided on the surface of the other outermost conductor circuit of the build-up wiring layer. Thus, a multilayer printed-circuit board is provided on which wiring can be made densely and also electronic components can be mounted with a high density.

Abstract translation: 提供了一种多层印刷电路板，其通过将多个电路板彼此堆叠而形成，每个电路板包括形成在其一侧或两侧上的具有导体电路的硬绝缘基板，并且其中形成有通孔 所述硬绝缘基板延伸到所述导体电路并且各自填充有导电物质，并且将粘合剂施加在所述多个电路板之间，并且将所述电路板加热和加压在一起。 堆叠电路板中最外层的电路板之一在表面上形成有位于通孔正上方的导电凸块，并且电连接到通孔，而另一个最外面的堆叠电路板形成在表面上 其导电针或球各自位于通孔的正上方并电连接到通孔。 该多层印刷电路板用作封装电路板，并且其上安装诸如LSI芯片的电子部件以形成半导体器件。 将多层印刷电路板用作芯基板，并且在芯多层电路板的一侧或任一侧上形成积层布线层。 在叠层布线层的一个最外侧的导体电路的表面上形成有焊料凸点，并且在叠层布线层的另一个最外侧的导体电路的表面设置有导电针或球。 因此，提供一种多层印刷电路板，其上可以致密地制造布线，并且还可以以高密度安装电子部件。

公开(公告)号：US06525275B1

公开(公告)日：2003-02-25

申请号：US08897702

申请日：1997-07-21

Applicant: Motoo Asai

Inventor： Motoo Asai

IPC: H05K103

CPC classification number: H05K1/112 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10734 ,  H05K2203/0338

Abstract: Multilayer printed circuit board includes a core substrate, multilayer wiring layer formed on the core substrate by alternately laminating interlaminar insulating layer and conductor circuit, and a solder pad group having two-dimensionally arranged pads having solder bumps on a surface of the multilayer wiring layer. Solder pads of the solder pad group are arranged in only a peripheral portion other than a central portion to form a frame shape. Solder pads located at an outside part of the frame shape have flat pads having surfaces which are each connected to conductor pattern on a surface of one of the interlaminar insulating layer, and have solder bumps formed on surfaces of the flat pads. Solder pads located at an inside part of the frame shape have viaholes which are each connected to an innerlayer flat pad group located in an innerlayer, and have solder bumps in recess portions of the viaholes.

Abstract translation: 多层印刷电路板包括芯基板，通过交替层叠层间绝缘层和导体电路而在芯基板上形成的多层布线层，以及具有在多层布线层的表面上具有焊料凸块的二维布置焊盘的焊盘组。 焊盘组的焊盘仅布置在除了中心部分之外的周边部分中以形成框架形状。 位于框架外部的焊盘具有平坦的焊盘，其平坦焊盘具有各自与层间绝缘层之一的表面上的导体图案相连的表面，并且在平坦焊盘的表面上形成焊料凸块。 位于框架形状的内侧的焊盘具有各自连接到位于内层的内层平垫组的通孔，并且在通孔的凹部中具有焊料凸块。

公开(公告)号：US06326556B1

公开(公告)日：2001-12-04

申请号：US09319257

申请日：1999-06-11

Applicant: Motoo Asai ,  Akihito Nakamura

Inventor： Motoo Asai ,  Akihito Nakamura

IPC: H05K103

CPC classification number: H05K1/0224 ,  H05K1/0253 ,  H05K1/0298 ,  H05K3/184 ,  H05K3/38 ,  H05K3/4641 ,  H05K3/4661 ,  H05K2201/09681 ,  H05K2203/1178

Abstract: Multilayer printed wiring board capable of effectively solving the swelling of the conductor layer resulting from residual solvent and lowering of adhesion property between a resin insulating layer and a conductor. The multilayer printed wiring board can be formed by laminating resin insulating layers and conductor layers on a substrate, wherein, among conductor layers at least constituted with signal layer and power layer, a conductor pattern of the power layer is of lattice-shaped form.

Abstract translation: 能够有效地解决残留溶剂导致的导体层膨胀，降低树脂绝缘层与导体之间的粘合性的多层印刷电路板。 多层印刷电路板可以通过在基板上层叠树脂绝缘层和导体层而形成，其中，在至少由信号层和功率层构成的导体层中，功率层的导体图案是格子状的。

公开(公告)号：US5589255A

公开(公告)日：1996-12-31

申请号：US253582

申请日：1994-06-03

Applicant: Ryo Enomoto ,  Motoo Asai

Inventor： Ryo Enomoto ,  Motoo Asai

IPC: C23C18/20 ,  H05K1/03 ,  H05K3/00 ,  H05K3/18 ,  H05K3/42 ,  H05K3/46 ,  C09J7/02

CPC classification number: H05K3/4661 ,  C23C18/208 ,  C23C18/24 ,  C23C18/30 ,  H05K1/0373 ,  C23C18/1651 ,  H05K2201/0154 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/09563 ,  H05K2203/0773 ,  H05K2203/0796 ,  H05K2203/107 ,  H05K3/0017 ,  H05K3/0035 ,  H05K3/181 ,  H05K3/184 ,  H05K3/426 ,  H05K3/465 ,  Y10T428/2857 ,  Y10T442/2738

Abstract: An adhesive for electroless plating is formed by dispersing particular heat-resistant granules easily soluble in an oxidizing agent into a particular heat-resistant resin sparingly soluble in the oxidizing agent through a curing treatment. A printed circuit board is manufactured by using such an adhesive.

Abstract translation: 用于化学镀的粘合剂通过将易溶于氧化剂的特定耐热颗粒通过固化处理分散到特别耐溶于氧化剂的耐热树脂中而形成。 通过使用这种粘合剂制造印刷电路板。

公开(公告)号：US5175060A

公开(公告)日：1992-12-29

申请号：US663933

申请日：1991-03-01

Applicant: Ryo Enomoto ,  Motoo Asai ,  Yoshikazu Sakaguchi

Inventor： Ryo Enomoto ,  Motoo Asai ,  Yoshikazu Sakaguchi

IPC: H01L21/48 ,  H01L21/58 ,  H01L21/68 ,  H01L23/495 ,  H01L23/498 ,  H05K1/00 ,  H05K3/18 ,  H05K3/40 ,  H05K3/46

CPC classification number: H01L21/568 ,  H01L21/4825 ,  H01L21/6835 ,  H01L23/49503 ,  H01L23/49811 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H05K3/184 ,  H05K3/4092 ,  H05K3/4644 ,  H05K3/4676 ,  Y10S428/901 ,  Y10T29/49121 ,  Y10T428/12528

Abstract: A method of making a semiconductor-mounting substrate suitable for high density packaging and the substrate so made. In order to package an electron part having many terminals to be mounted in a high density, the substrate is constructed by using a lead frame comprised of a die pad and leads as a base, forming an adhesive layer or further an insulating layer onto the lead frame, forming a conductor circuit thereon by an additive process and connecting the conductor circuit and the leads to each other through a plated conductor. According to this construction, it is not required to provide a printed circuit board for IC mounting, and IC can directly be mounted onto the lead frame through the plated conductor circuit.

Abstract translation: PCT No.PCT / JP90 / 00851 Sec。 371 1991年3月1日 102（e）1991年3月1日PCT 1990年3月29日PCT申请。一种制造适合于高密度封装的半导体安装基板和如此制成的基板的方法。 为了以高密度封装具有多个端子的电子部件，通过使用由芯片焊盘和引线作为基底的引线框构成基板，在引线上形成粘接层或绝缘层 框架，通过添加工艺在其上形成导体电路，并通过电镀导体将导体电路和引线彼此连接。 根据这种结构，不需要提供用于IC安装的印刷电路板，并且IC可以通过电镀导体电路直接安装到引线框架上。

公开(公告)号：US08822830B2

公开(公告)日：2014-09-02

申请号：US13432471

申请日：2012-03-28

Applicant: Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

Inventor： Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

IPC: H05K1/03

CPC classification number: H05K3/423 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/036 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/381 ,  H05K3/385 ,  H05K3/387 ,  H05K3/388 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0315 ,  H05K2203/0733 ,  H05K2203/0773 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A multi-layer printed circuit board including a first insulating layer, a first conductor layer having circuits on one surface of the first insulating layer, a second conductor layer having circuits on the opposite surface of the first insulating layer, a second insulating layer on the second conductor and first insulating layers, and a third conductor layer having circuits on the second insulating layer on the opposite side of the second conductor layer. The first and second insulating layers have first and second via holes formed in openings of the first and second insulating layers and made of conductive materials filling the openings such that circuits in the first and third conductor layers are connected to one or more circuits in the second conductor layer, and the first and second via holes have bottom ends facing the second conductor layer and top ends larger than the bottom ends.

Abstract translation: 一种多层印刷电路板，包括第一绝缘层，在第一绝缘层的一个表面上具有电路的第一导体层，在第一绝缘层的相对表面上具有电路的第二导体层，第二绝缘层， 第二导体和第一绝缘层，以及在第二导体层的相对侧的第二绝缘层上具有电路的第三导体层。 第一和第二绝缘层具有形成在第一和第二绝缘层的开口中的第一和第二通孔，并由填充开口的导电材料制成，使得第一和第三导体层中的电路连接到第二和第二绝缘层中的一个或多个电路 导体层，第一和第二通孔具有面向第二导体层的底端，并且顶端大于底端。

公开(公告)号：US08782882B2

公开(公告)日：2014-07-22

申请号：US13169736

申请日：2011-06-27

Applicant: Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

Inventor： Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

IPC: H01K3/10

CPC classification number: H05K3/423 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/036 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/381 ,  H05K3/385 ,  H05K3/387 ,  H05K3/388 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0315 ,  H05K2203/0733 ,  H05K2203/0773 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A method of manufacturing a printed circuit board includes the following steps (A) to (D). (A) Laminating a resin insulating layer on each of two sides of a core member to form a core substrate, (B) forming penetrating openings in the core substrate by applying laser beams, (C) forming a rough surface on the core substrate, and (D) providing a metal film for each penetrating opening to form through holes.

Abstract translation: 制造印刷电路板的方法包括以下步骤（A）至（D）。 （A）在芯部件的两侧各自层叠树脂绝缘层，形成芯基板，（B）通过施加激光而在芯基板上形成贯通孔，（C）在芯基板上形成粗糙面， 和（D）为每个穿透孔提供金属膜以形成通孔。