公开(公告)号：US20230276570A1

公开(公告)日：2023-08-31

申请号：US18173154

申请日：2023-02-23

Applicant: IBIDEN CO., LTD.

Inventor： Jun SAKAI ,  Takuya INISHI

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/00 ,  H05K3/46

CPC classification number: H05K1/0298 ,  H05K1/115 ,  H05K3/0094 ,  H05K3/4644 ,  H05K2201/0212 ,  H05K2203/13

Abstract: A printed wiring board includes a first conductor layer, an insulating layer formed on the first conductor layer, a second conductor layer formed on the insulating layer, and a via conductor formed in the insulating layer such that the via conductor is connecting the first and second conductor layers. The insulating layer has opening exposing portion of the first conductor layer such that the via conductor is formed in the opening, the second conductor layer and via conductor are formed such that the second conductor layer and via conductor include a seed layer and an electrolytic plating layer on the seed layer, and the insulating layer includes resin and inorganic particles dispersed in the resin such that the particles include first particles forming inner wall surface in the opening and second particles embedded in the insulating layer and the first particles have shapes different from shapes of the second particles.

公开(公告)号：US20240407094A1

公开(公告)日：2024-12-05

申请号：US18679521

申请日：2024-05-31

Applicant: IBIDEN CO., LTD.

Inventor： Masashi KUWABARA ,  Susumu KAGOHASHI ,  Jun SAKAI ,  Takuya INISHI ,  Kyohei YOSHIKAWA

IPC: H05K1/11 ,  H05K3/16

Abstract: A printed wiring board includes a conductor layer including wirings, a resin insulating layer having openings, a mounting conductor layer including first and second electrodes, first via conductors including a seed layer and an electrolytic plating layer such that the first via conductors connect the first electrodes and the wirings, and second via conductors including the seed layer and electrolytic plating layer such that the second via conductors connect the second electrodes and the wirings. The first electrodes are positioned to mount a first electronic component. The second electrodes are positioned to mount a second electronic component. The first and second via conductors are formed such that the seed layer is covering an inner wall surface of each opening in the insulating layer and has a first portion and a second portion connected to the first portion and having a part of the first portion formed on the second portion.

公开(公告)号：US20240365468A1

公开(公告)日：2024-10-31

申请号：US18643279

申请日：2024-04-23

Applicant: IBIDEN CO., LTD.

Inventor： Masashi KUWABARA ,  Susumu KAGOHASHI ,  Jun SAKAI ,  Kyohei YOSHIKAWA

IPC: H05K1/11 ,  H05K1/03

CPC classification number: H05K1/115 ,  H05K1/0306 ,  H05K1/113 ,  H05K2201/0209 ,  H05K2201/0242 ,  H05K2201/0266 ,  H05K2201/09536 ,  H05K2201/09827

Abstract: A wiring substrate includes a first build-up part including an insulating layer and a conductor layer, and a second build-up part laminated on the first build-up part and including an insulating layer and a conductor layer. The minimum width and minimum inter-wiring distance of wirings in the first build-up part are smaller than the minimum width and minimum inter-wiring distance of wirings in the second build-up part. The insulating layer in the first build-up part includes resin and inorganic particles including first inorganic particles partially embedded in the resin and second inorganic particles completely embedded in the resin such that the first inorganic particles have first portions protruding from the resin and second portions embedded in the resin, respectively. The insulating layer of the first build-up part has a surface covered by the conductor layer and including a surface of the resin and exposed surfaces of the first portions.

公开(公告)号：US20240339388A1

公开(公告)日：2024-10-10

申请号：US18626736

申请日：2024-04-04

Applicant: IBIDEN CO., LTD.

Inventor： Masashi KUWABARA ,  Jun SAKAI ,  Shiho SHIMADA

IPC: H01L23/498 ,  H01L21/48

CPC classification number: H01L23/49822 ,  H01L21/4857 ,  H01L23/49838 ,  H01L23/49894

Abstract: A wiring substrate includes a first build-up part including an insulating layer and a conductor layer, and a second build-up part including an insulating layer and a conductor layer. The minimum wiring width of wirings in the conductor layer of the first build-up part is smaller than the minimum wiring width of wirings in the conductor layer of the second build-up part. The minimum inter-wiring distance of the wirings in the first part is smaller than the minimum inter-wiring distance of the wirings in the second part. The first build-up part is formed such that the conductor layer includes a conductor pattern including a first metal layer, a second metal layer, and a third metal layer. The width of the first metal layer is larger than the width of the second metal layer. The width of the third metal layer is larger than the width of the first metal layer.

公开(公告)号：US20240306296A1

公开(公告)日：2024-09-12

申请号：US18599671

申请日：2024-03-08

Applicant: IBIDEN CO., LTD.

Inventor： Toshiki FURUTANI ,  Masashi KUWABARA ,  Jun SAKAI ,  Takuya INISHI

IPC: H05K1/11 ,  H05K1/03 ,  H05K3/16

CPC classification number: H05K1/115 ,  H05K1/0306 ,  H05K3/16 ,  H05K2201/0209 ,  H05K2201/0245 ,  H05K2201/0323 ,  H05K2201/09536 ,  H05K2203/0361

Abstract: A wiring substrate includes a core substrate including a glass substrate and a through-hole conductor formed in the glass substrate, a resin insulating layer formed on the core substrate and including resin and inorganic particles, a conductor layer formed on the insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor formed in the insulating layer such that the via conductor is electrically connected to the through-hole conductor formed in the glass substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The conductor layer and the via conductor are formed such that the seed layer is formed by sputtering, and the resin insulating layer has an opening in which the via conductor is formed such that the inorganic particles include first particles forming an inner wall surface in the opening and second particles embedded in the insulating layer.

公开(公告)号：US20240292536A1

公开(公告)日：2024-08-29

申请号：US18585113

申请日：2024-02-23

Applicant: IBIDEN CO., LTD.

Inventor： Susumu KAGOHASHI ,  Kyohei YOSHIKAWA ,  Takuya INISHI ,  Jun SAKAI

IPC: H05K1/11 ,  H05K1/03 ,  H05K1/09 ,  H05K3/00 ,  H05K3/42

CPC classification number: H05K1/116 ,  H05K1/09 ,  H05K3/0035 ,  H05K3/0041 ,  H05K3/423 ,  H05K1/0373 ,  H05K2201/0209

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer including resin and inorganic particles, a second conductor layer including a seed layer and an electrolytic plating layer on the seed layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and via conductor are formed such that the seed layer includes an alloy including copper, aluminum and a metal including one or more metals selected from nickel, zinc, gallium, silicon and magnesium, and the resin insulating layer is formed such that the inorganic particles include first inorganic particles forming an inner wall surface in the opening and second inorganic particles embedded in the resin insulating layer and that shapes of the first inorganic particles are different from shapes of the second inorganic particles.

公开(公告)号：US20240196546A1

公开(公告)日：2024-06-13

申请号：US18537853

申请日：2023-12-13

Applicant: IBIDEN CO., LTD.

Inventor： Jun SAKAI ,  Takuya INISHI

IPC: H05K3/42 ,  H05K3/46

CPC classification number: H05K3/423 ,  H05K3/4605 ,  H05K3/4644 ,  H05K2203/068 ,  H05K2203/0723

Abstract: A printed wiring board includes a laminate including resin insulating layers and conductor layers, and via conductors formed in via holes of the resin insulating layers and each including a seed layer and an electrolytic plating layer formed on the seed layer such that the via conductors connect the conductor layers adjacent to each other and that the via conductors include a first via conductor and a second via conductor formed on the first via conductor in a lamination direction of the laminate. The resin insulating layers include resin and inorganic particles such that the inorganic particles include first inorganic particles having smooth surfaces and second inorganic particles embedded in the resin insulating layers and that an inner wall surface of each of the via holes in the resin insulating layers includes the resin and the smooth surfaces of the first inorganic particles.

公开(公告)号：US20240107684A1

公开(公告)日：2024-03-28

申请号：US18475276

申请日：2023-09-27

Applicant: IBIDEN CO., LTD.

Inventor： Jun SAKAI ,  Takuya INISHI ,  Susumu KAGOHASHI

IPC: H05K3/46 ,  H05K1/11 ,  H05K3/16

CPC classification number: H05K3/4608 ,  H05K1/115 ,  H05K3/16 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/095

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed and electrolytic plating layers and connecting the first and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second and third portions, and the insulating layer includes resin and inorganic particles including first particles forming the inner wall surface and second particles embedded in the insulating layer and having shapes different from shapes of the first particles.

公开(公告)号：US20240098892A1

公开(公告)日：2024-03-21

申请号：US18307886

申请日：2023-04-27

Applicant: IBIDEN CO., LTD.

Inventor： Susumu KAGOHASHI ,  Jun SAKAI ,  Kyohei YOSHIKAWA

IPC: H05K1/03 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0373 ,  H05K1/0298 ,  H05K1/115 ,  H05K2201/0209

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer laminated on the first conductor layer and including resin material and inorganic particles, a second conductor layer formed on a first surface of the insulating layer such that the first conductor layer is facing a second surface of the insulating layer, and a via conductor formed in an opening extending through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the inorganic particles include first inorganic particles partially embedded in the resin and second inorganic particles completely embedded in the resin, the first inorganic particles have first portions protruding from the resin and second portions embedded in the resin respectively, and the first surface of the resin insulating layer includes a surface of the resin and surfaces of the first portions exposed from the surface of the resin.