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公开(公告)号：US20240324103A1
公开(公告)日：2024-09-26
申请号：US18613202
申请日：2024-03-22
Applicant: IBIDEN CO., LTD.
Inventor： Masashi KUWABARA , Jun SAKAI , Shiho FUKUSHIMA
CPC classification number: H05K1/115 , H05K1/0306 , H05K3/16 , H05K2201/0209 , H05K2201/0242 , H05K2201/0266 , H05K2201/032 , H05K2201/09536
Abstract: A wiring substrate includes a core substrate including a through-hole conductor, a first resin insulating layer, a first conductor layer including a seed layer and an electrolytic plating layer, a via conductor formed such that the via conductor electrically connects the through-hole conductor and first conductor layer, and a second resin insulating layer covering the first conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is penetrating through the glass substrate, the seed layer includes a first layer formed on the first resin insulating layer and a second layer formed on the first layer, and the first conductor layer includes a conductor circuit such that a width of the first layer is larger than a width of the second layer in the conductor circuit and a width of the electrolytic plating layer is larger than the width of the first layer in the conductor circuit.
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公开(公告)号：US20240306299A1
公开(公告)日：2024-09-12
申请号：US18595674
申请日：2024-03-05
Applicant: IBIDEN CO., LTD.
Inventor： Toshiki FURUTANI , Kyohei YOSHIKAWA , Takuya INISHI , Jun SAKAI
CPC classification number: H05K1/116 , H05K1/0306 , H05K3/181 , H05K3/16 , H05K2201/032 , H05K2201/09536
Abstract: A wiring substrate includes a core substrate including a through-hole conductor, a resin insulating layer formed on the core substrate, a conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor formed in the resin insulating layer such that the via conductor is connected to the through-hole conductor in the core substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is formed in a through hole penetrating through the glass substrate, and the conductor layer and via conductor are formed such that the seed layer is formed by sputtering and includes an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium.
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公开(公告)号：US20240268038A1
公开(公告)日：2024-08-08
申请号：US18434888
申请日：2024-02-07
Applicant: IBIDEN CO., LTD.
Inventor： Susumu KAGOHASHI , Jun SAKAI , Kyohei YOSHIKAWA
CPC classification number: H05K3/4688 , H05K1/0306 , H05K1/0353 , H05K1/09 , H05K3/4038 , H05K3/423 , H05K2201/0209 , H05K2201/0212 , H05K2201/0323 , H05K2201/0326
Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer including glass particles and resin, a second conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and the via conductor are formed such that the second conductor layer includes signal wirings and that the seed layer is formed by sputtering an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and the resin insulating layer is formed such that the surface of the resin insulating layer includes the resin and that an inner wall surface in the opening includes the resin and the glass particles.
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公开(公告)号：US20240260179A1
公开(公告)日：2024-08-01
申请号：US18426547
申请日：2024-01-30
Applicant: IBIDEN CO., LTD.
Inventor： Jun SAKAI , Shiho SHIMADA
CPC classification number: H05K1/0298 , H05K1/053 , H05K3/16 , H05K2201/0209 , H05K2201/0338 , H05K2203/0723
Abstract: A printed wiring board includes a conductor layer, an outermost insulating layer formed on the conductor layer and having an opening exposing a portion of the conductor layer, and a metal post formed in the opening of the outermost insulating layer and including a seed layer and an electrolytic plating layer formed on the seed layer such that the metal post has a height exceeding a surface of the outermost insulating layer and has a portion exceeding a height of the outermost insulating layer, the seed layer of the metal post has a first layer and a second layer formed on the first layer. The portion exceeding the height of the outermost insulating layer is formed such that a width of the first layer is larger than a width of the second layer, and a width of the electrolytic plating layer is larger than the width of the first layer.
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公开(公告)号：US20240107685A1
公开(公告)日：2024-03-28
申请号：US18475288
申请日：2023-09-27
Applicant: IBIDEN CO., LTD.
Inventor： Susumu KAGOHASHI , Jun SAKAI , Kyohei YOSHIKAWA , Takuya INISHI
CPC classification number: H05K3/4688 , H05K1/0306 , H05K1/0313 , H05K1/116 , H05K3/062 , H05K3/16 , H05K3/4608 , H05K2201/0209 , H05K2201/0212 , H05K2201/0338 , H05K2203/0369
Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed layer and the electrolytic plating layer and connecting the first conductor and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second portion and the third portion, the second portion has a first film and a second film electrically connected to the first film, and a portion of the first film is formed on the second film.
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Patent Agency Ranking
公开(公告)号：US20250048562A1
公开(公告)日：2025-02-06
申请号：US18789154
申请日：2024-07-30
Applicant: IBIDEN CO., LTD.
Inventor： Masashi KUWABARA , Susumu KAGOHASHI , Jun SAKAI , Kyohei YOSHIKAWA , Takuya INISHI
Abstract: A wiring substrate includes a core substrate including a glass substrate and a through-hole conductor, a resin insulating layer having an opening extending through the resin insulating layer, a conductor layer including a seed layer and an electrolytic plating layer on the seed layer, and a via conductor formed in the opening such that the via conductor electrically connects to the through-hole conductor in the core substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The resin insulating layer includes resin and inorganic particles including first and second particles such that the first particles are partially embedded in the resin and that the second particles are embedded in the resin, the first particles have first portions protruding from the resin and second portions embedded in the resin respectively, the surface includes the resin and exposed surfaces of the first portions exposed from the resin.
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公开(公告)号：US20250008652A1
公开(公告)日：2025-01-02
申请号：US18754732
申请日：2024-06-26
Applicant: IBIDEN CO., LTD.
Inventor： Masashi KUWABARA , Susumu KAGOHASHI , Jun SAKAI , Kyohei YOSHIKAWA
Abstract: A printed wiring board includes a first insulating layer, a connection conductor having a connection wiring, a second insulating layer formed on the connection conductor layer, a mounting conductor layer including a first electrode that mounts a first electronic component and a second electrode that mounts a second electronic component, and connection via conductors including a first connection via conductor that electrically connects the first electrode and the connection wiring and a second connection via conductor that electrically connects the second electrode and the connection wiring. The first insulating layer includes resin and inorganic particles including first particles and second particles such that each first particle has a first portion protruding from the resin and a second portion embedded in the resin, and the surface of the first insulating layer includes a surface of the resin and exposed surfaces of the first portions exposed from the surface of the resin.
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公开(公告)号：US20240306312A1
公开(公告)日：2024-09-12
申请号：US18597975
申请日：2024-03-07
Applicant: IBIDEN CO., LTD.
Inventor： Jun SAKAI , Kyohei YOSHIKAWA , Shunya HATANAKA
CPC classification number: H05K3/4076 , H05K1/0373 , H05K1/116 , H05K3/16 , H05K3/429 , H05K3/423 , H05K2201/0209 , H05K2201/0263 , H05K2201/2072
Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first and second conductor layers and has a land portion extending on a boundary part of the resin insulating layer. The via conductor is formed in a via hole formed in the resin insulating layer. The resin insulating layer is formed such that the boundary part has a surface roughness that is larger than a surface roughness of the surface on which the second conductor layer formed and that an inner wall surface in the via hole in the resin insulating layer is equal to or larger than the surface roughness of the boundary part of the resin insulating layer.
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公开(公告)号：US20240298406A1
公开(公告)日：2024-09-05
申请号：US18591021
申请日：2024-02-29
Applicant: IBIDEN CO., LTD.
Inventor： Jun SAKAI , Kyohei YOSHIKAWA , Shunya HATANAKA
CPC classification number: H05K1/112 , H05K1/0221 , H05K1/0222 , H05K1/0306 , H05K2201/0209 , H05K2201/09518 , H05K2201/10977
Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on the resin insulating layer and including a seed layer and a metal layer on the seed layer, a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer, and a base layer formed on the resin insulating layer and including resin and one of iron and chromium in a range of 0.2 at % to 5.0 at % with respect to the resin such that the base layer includes part formed between the resin insulating layer and the seed layer.
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公开(公告)号：US20240206064A1
公开(公告)日：2024-06-20
申请号：US18537920
申请日：2023-12-13
Applicant: IBIDEN CO., LTD.
Inventor： Jun SAKAI , Takuya INISHI
CPC classification number: H05K1/115 , H05K1/188 , H05K3/423 , H05K2201/10015
Abstract: A printed wiring board includes a base substrate, an electronic component accommodated in a cavity formed in the substrate, a resin insulating layer formed on the substrate such that the insulating layer is covering the electronic component, a conductor layer formed on the insulating layer, and via conductors formed in the insulating layer and each including a seed layer and an electrolytic plating layer formed on the seed layer such that the via conductors are connecting the conductor layer and electrodes of the electronic component. The insulating layer includes resin and inorganic particles and has via holes in which the via conductors is formed respectively such the inorganic particles include first inorganic particles having smooth surfaces and second inorganic particles embedded in the insulating layer and that an inner wall surface of each of the via holes includes the resin and the smooth surfaces of the first inorganic particles.
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