公开(公告)号：US20240363541A1

公开(公告)日：2024-10-31

申请号：US18646819

申请日：2024-04-26

Applicant: IBIDEN CO., LTD.

Inventor： Masashi KUWABARA ,  Susumu KAGOHASHI ,  Jun SAKAI ,  Kyohei YOSHIKAWA

IPC: H01L23/538 ,  H01L21/48

CPC classification number: H01L23/5383 ,  H01L21/4857

Abstract: A wiring substrate includes a first build-up part including first insulating layers, first conductor layers, and first via conductors, and a second build-up part including second insulating layers and second conductor layers. The minimum wiring width and minimum inter-wiring distance in the first conductor layers are smaller than the minimum wiring width and minimum inter-wiring distance in the second conductor layers. The first conductor layers and via conductors include a first layer and a second layer formed on the first layer. The first layer includes a lower layer including a sputtering film including an alloy including copper, aluminum, and at least one element selected from nickel, zinc, gallium, silicon, and magnesium, and an upper layer including a sputtering film including copper. The lower layer is formed in contact with surfaces of the first insulating layers and inner wall surfaces and bottom surfaces in via openings for the first via conductors.

公开(公告)号：US20240251510A1

公开(公告)日：2024-07-25

申请号：US18420841

申请日：2024-01-24

Applicant: IBIDEN CO., LTD.

Inventor： Susumu KAGOHASHI ,  Jun SAKAI ,  Kyohei YOSHIKAWA

IPC: H05K3/42 ,  H05K3/14 ,  H05K3/18

CPC classification number: H05K3/42 ,  H05K3/146 ,  H05K3/188 ,  H05K2203/0723

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer, a second conductor layer, and a via conductor formed in an opening of the insulating layer and connecting the first conductor and second conductor layers. The second conductor layer and via conductor include a seed layer having a first portion formed on the surface of the insulating layer, a second portion formed on an inner wall surface in the opening, and a third portion formed on a portion of the first conductor layer exposed by the opening. A thickness of the first portion is greater than a thickness of the second portion and a thickness of the third portion. The seed layer includes a first layer including an alloy including copper, aluminum and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and a second layer formed on the first layer and including copper.

公开(公告)号：US20220201855A1

公开(公告)日：2022-06-23

申请号：US17555575

申请日：2021-12-20

Applicant: IBIDEN CO., LTD.

Inventor： Kyohei YOSHIKAWA

IPC: H05K1/03 ,  H05K1/02 ,  H05K1/11

Abstract: A printed wiring board includes a first resin insulating layer, a second resin insulating layer formed on a surface of the first layer, and a conductor layer formed on the surface of the first layer such that the second layer is covering the conductor layer and that the conductor layer includes first, second, third, fourth, fifth, and sixth circuits such that the third and fourth circuits are sandwiching the first circuit and that the fifth and sixth circuits are sandwiching the second circuit. Widths between the first and third circuits and between the first and fourth circuits are 5 μm to 14 μm, and when a width between the second and fifth circuits and a width between the second and sixth circuits is 20 μm or more, the upper surface of the first circuit, and the upper surface and side walls of the second circuit are formed to have unevenness.

公开(公告)号：US20240306299A1

公开(公告)日：2024-09-12

申请号：US18595674

申请日：2024-03-05

Applicant: IBIDEN CO., LTD.

Inventor： Toshiki FURUTANI ,  Kyohei YOSHIKAWA ,  Takuya INISHI ,  Jun SAKAI

IPC: H05K1/11 ,  H05K1/03 ,  H05K3/16 ,  H05K3/18

CPC classification number: H05K1/116 ,  H05K1/0306 ,  H05K3/181 ,  H05K3/16 ,  H05K2201/032 ,  H05K2201/09536

Abstract: A wiring substrate includes a core substrate including a through-hole conductor, a resin insulating layer formed on the core substrate, a conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor formed in the resin insulating layer such that the via conductor is connected to the through-hole conductor in the core substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is formed in a through hole penetrating through the glass substrate, and the conductor layer and via conductor are formed such that the seed layer is formed by sputtering and includes an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium.

公开(公告)号：US20240268038A1

公开(公告)日：2024-08-08

申请号：US18434888

申请日：2024-02-07

Applicant: IBIDEN CO., LTD.

Inventor： Susumu KAGOHASHI ,  Jun SAKAI ,  Kyohei YOSHIKAWA

IPC: H05K3/46 ,  H05K1/03 ,  H05K1/09 ,  H05K3/40 ,  H05K3/42

CPC classification number: H05K3/4688 ,  H05K1/0306 ,  H05K1/0353 ,  H05K1/09 ,  H05K3/4038 ,  H05K3/423 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0323 ,  H05K2201/0326

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer including glass particles and resin, a second conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and the via conductor are formed such that the second conductor layer includes signal wirings and that the seed layer is formed by sputtering an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and the resin insulating layer is formed such that the surface of the resin insulating layer includes the resin and that an inner wall surface in the opening includes the resin and the glass particles.

公开(公告)号：US20240107685A1

公开(公告)日：2024-03-28

申请号：US18475288

申请日：2023-09-27

Applicant: IBIDEN CO., LTD.

Inventor： Susumu KAGOHASHI ,  Jun SAKAI ,  Kyohei YOSHIKAWA ,  Takuya INISHI

IPC: H05K3/46 ,  H05K1/03 ,  H05K1/11 ,  H05K3/06 ,  H05K3/16

CPC classification number: H05K3/4688 ,  H05K1/0306 ,  H05K1/0313 ,  H05K1/116 ,  H05K3/062 ,  H05K3/16 ,  H05K3/4608 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0338 ,  H05K2203/0369

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed layer and the electrolytic plating layer and connecting the first conductor and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second portion and the third portion, the second portion has a first film and a second film electrically connected to the first film, and a portion of the first film is formed on the second film.

公开(公告)号：US20220240380A1

公开(公告)日：2022-07-28

申请号：US17578671

申请日：2022-01-19

Applicant: IBIDEN CO., LTD.

Inventor： Kyohei YOSHIKAWA

IPC: H05K1/02

Abstract: A printed wiring board includes a first resin insulating layer, a conductor layer on the first resin insulating layer, and a second resin insulating layer formed on the first resin insulating layer such that the second resin insulating layer is covering the conductor layer. The conductor layer includes a first circuit having a width of 15 μm or less and a rectangular cross-sectional shape, a second circuit having a trapezoidal cross-sectional shape, a third circuit, a fourth circuit, a fifth circuit, and a sixth circuit, a space between the first and third circuits has a width of 14 μm or less, a space between the first and fourth circuits has a width of 14 μm or less, a space between the second and fifth circuits has a width of 20 μm or more, and a space between the second and sixth circuits has a width of 20 μm or more.

公开(公告)号：US20250048562A1

公开(公告)日：2025-02-06

申请号：US18789154

申请日：2024-07-30

Applicant: IBIDEN CO., LTD.

Inventor： Masashi KUWABARA ,  Susumu KAGOHASHI ,  Jun SAKAI ,  Kyohei YOSHIKAWA ,  Takuya INISHI

IPC: H05K3/38 ,  H05K1/03 ,  H05K1/11 ,  H05K3/00 ,  H05K3/16 ,  H05K3/26 ,  H05K3/40

Abstract: A wiring substrate includes a core substrate including a glass substrate and a through-hole conductor, a resin insulating layer having an opening extending through the resin insulating layer, a conductor layer including a seed layer and an electrolytic plating layer on the seed layer, and a via conductor formed in the opening such that the via conductor electrically connects to the through-hole conductor in the core substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The resin insulating layer includes resin and inorganic particles including first and second particles such that the first particles are partially embedded in the resin and that the second particles are embedded in the resin, the first particles have first portions protruding from the resin and second portions embedded in the resin respectively, the surface includes the resin and exposed surfaces of the first portions exposed from the resin.

公开(公告)号：US20250008652A1

公开(公告)日：2025-01-02

申请号：US18754732

申请日：2024-06-26

Applicant: IBIDEN CO., LTD.

Inventor： Masashi KUWABARA ,  Susumu KAGOHASHI ,  Jun SAKAI ,  Kyohei YOSHIKAWA

IPC: H05K1/11 ,  H05K3/16 ,  H05K3/40

Abstract: A printed wiring board includes a first insulating layer, a connection conductor having a connection wiring, a second insulating layer formed on the connection conductor layer, a mounting conductor layer including a first electrode that mounts a first electronic component and a second electrode that mounts a second electronic component, and connection via conductors including a first connection via conductor that electrically connects the first electrode and the connection wiring and a second connection via conductor that electrically connects the second electrode and the connection wiring. The first insulating layer includes resin and inorganic particles including first particles and second particles such that each first particle has a first portion protruding from the resin and a second portion embedded in the resin, and the surface of the first insulating layer includes a surface of the resin and exposed surfaces of the first portions exposed from the surface of the resin.

公开(公告)号：US20240306312A1

公开(公告)日：2024-09-12

申请号：US18597975

申请日：2024-03-07

Applicant: IBIDEN CO., LTD.

Inventor： Jun SAKAI ,  Kyohei YOSHIKAWA ,  Shunya HATANAKA

IPC: H05K3/40 ,  H05K1/03 ,  H05K1/11 ,  H05K3/16 ,  H05K3/42

CPC classification number: H05K3/4076 ,  H05K1/0373 ,  H05K1/116 ,  H05K3/16 ,  H05K3/429 ,  H05K3/423 ,  H05K2201/0209 ,  H05K2201/0263 ,  H05K2201/2072

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first and second conductor layers and has a land portion extending on a boundary part of the resin insulating layer. The via conductor is formed in a via hole formed in the resin insulating layer. The resin insulating layer is formed such that the boundary part has a surface roughness that is larger than a surface roughness of the surface on which the second conductor layer formed and that an inner wall surface in the via hole in the resin insulating layer is equal to or larger than the surface roughness of the boundary part of the resin insulating layer.