公开(公告)号：US20220013424A1

公开(公告)日：2022-01-13

申请号：US17483312

申请日：2021-09-23

Applicant: Infineon Technologies AG

Inventor： Prashanth Makaram ,  John Cooper ,  Joerg Ortner ,  Stephan Pindl ,  Caterina Travan ,  Alexander Zoepfl

IPC: H01L23/31 ,  H01L21/02

Abstract: An apparatus includes a semiconductor-based substrate with a functional structure that is formed in or on the semiconductor-based substrate. The apparatus includes a frame structure surrounding the functional structure and includes a coating that covers the functional structure and is delimited by the frame structure.

公开(公告)号：US20210035882A1

公开(公告)日：2021-02-04

申请号：US16944325

申请日：2020-07-31

Applicant: Infineon Technologies AG

Inventor： Josef Schaetz ,  Dethard Peters ,  Stephan Pindl ,  Hans-Joachim Schulze

IPC: H01L23/373 ,  H01L29/423 ,  H01L29/51 ,  H01L23/367 ,  H01L29/40 ,  H01L29/16 ,  H01L29/78 ,  H01L29/06

Abstract: A power semiconductor device includes: a semiconductor body having a front side and a backside and configured to conduct a load current between the front side and the backside; and a plurality of control cells configured to control the load current. Each control cell is at least partially included in the semiconductor body at the front side and includes a gate electrode that is electrically insulated from the semiconductor body by a gate insulation layer. The gate insulation layer is or includes a first boron nitride layer.

公开(公告)号：US20210028119A1

公开(公告)日：2021-01-28

申请号：US16937644

申请日：2020-07-24

Applicant: Infineon Technologies AG

Inventor： Fabian Streb ,  Anton Mauder ,  Stephan Pindl ,  Hans-Joachim Schulze

IPC: H01L23/532 ,  H01L23/427 ,  H01L23/00

Abstract: A power semiconductor device is proposed. The power semiconductor device includes a semiconductor substrate. The power semiconductor device further includes an electrically conducting first layer. At least part of the electrically conducting first layer includes pores. The power semiconductor device further includes an electrically conducting second layer. The electrically conducting second layer is arranged between the semiconductor substrate and the electrically conducting first layer. The pores are at least partially filled with a phase change material.

公开(公告)号：US10694584B2

公开(公告)日：2020-06-23

申请号：US15818835

申请日：2017-11-21

Applicant: Infineon Technologies AG

Inventor： Stephan Pindl ,  Daniel Porwol ,  Johann Strasser

IPC: G01N21/17 ,  H05B3/00 ,  G02B5/20 ,  G02B5/26

Abstract: A method for producing an infrared emitter arrangement is provided. The method includes providing a carrier. The carrier includes at least one infrared emitter structure at a first side of the carrier and at least one cutout at a second side of the carrier, said second side being situated opposite the first side of the carrier, wherein the at least one cutout extends from the second side of the carrier in the direction of the at least one infrared emitter structure. The method further includes securing an infrared filter layer structure at the second side of the carrier in such a way that the at least one cutout separates the at least one infrared emitter structure from the infrared filter layer structure.

公开(公告)号：US20190148253A1

公开(公告)日：2019-05-16

申请号：US16227761

申请日：2018-12-20

Applicant: Infineon Technologies AG

Inventor： Stephan Pindl ,  Daniel Lugauer ,  Dominic Maier ,  Alfons Dehe

IPC: H01L23/31 ,  H01L23/053 ,  H01L23/538 ,  H01L23/057 ,  H01L21/762 ,  H01L21/18 ,  H01L33/00 ,  H01L21/20 ,  G01N33/00 ,  H05K1/18 ,  H01L21/56 ,  G01N27/02 ,  G01N27/12 ,  H01L23/29 ,  H01L23/00

Abstract: According to an embodiment, a sensor package includes an electrically insulating substrate including a cavity in the electrically insulating substrate, an ambient sensor, an integrated circuit die embedded in the electrically insulating substrate, and a plurality of conductive interconnect structures coupling the ambient sensor to the integrated circuit die. The ambient sensor is supported by the electrically insulating substrate and arranged adjacent the cavity.

公开(公告)号：US20160318759A1

公开(公告)日：2016-11-03

申请号：US15206836

申请日：2016-07-11

Applicant: Infineon Technologies AG

Inventor： Alfons Dehe ,  Stephan Pindl ,  Bernhard Knott ,  Carsten Ahrens

IPC: B81C1/00 ,  H04R19/04 ,  H04R31/00 ,  H04R19/00

CPC classification number: B81C1/00825 ,  B81B2201/0235 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81C1/00873 ,  B81C2201/017 ,  B81C2201/053 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00 ,  H04R2201/003

Abstract: A method for manufacturing a MEMS device is disclosed. Moreover a MEMS device and a module including a MEMS device are disclosed. An embodiment includes a method for manufacturing MEMS devices includes forming a MEMS stack on a first main surface of a substrate, forming a polymer layer on a second main surface of the substrate and forming a first opening in the polymer layer and the substrate such that the first opening abuts the MEMS stack.

Abstract translation: 公开了一种制造MEMS器件的方法。 此外，公开了一种MEMS器件和包括MEMS器件的模块。 一个实施例包括用于制造MEMS器件的方法，包括在衬底的第一主表面上形成MEMS堆叠，在衬底的第二主表面上形成聚合物层，并在聚合物层和衬底中形成第一开口，使得 第一个开口与MEMS堆栈相邻。

公开(公告)号：US20160192086A1

公开(公告)日：2016-06-30

申请号：US14582223

申请日：2014-12-24

Applicant: Infineon Technologies AG

Inventor： Stefan Barzen ,  Andre Brockmeier ,  Marc Fueldner ,  Stephan Pindl ,  Wolfgang Friza

IPC: H04R23/00

CPC classification number: H04R19/016

Abstract: A capacitive microphone may include a housing, a membrane, and a first backplate, wherein a first insulating layer may be disposed on a first side of the first backplate facing the membrane and a second insulating layer may be disposed on a second side of the first backplate opposite to the first side of the first backplate. A further insulating layer may be disposed on a side wall of at least one of a plurality of perforation holes in the first backplate. Each conductive surface of the first backplate may be covered with insulating material.

Abstract translation: 电容麦克风可以包括壳体，膜和第一背板，其中第一绝缘层可以设置在第一背板的面向膜的第一侧上，并且第二绝缘层可以设置在第一绝缘层的第二侧上 背板与第一背板的第一侧相对。 另外的绝缘层可以设置在第一背板中的多个穿孔中的至少一个的侧壁上。 第一背板的每个导电表面可以用绝缘材料覆盖。

公开(公告)号：US11652022B2

公开(公告)日：2023-05-16

申请号：US16944325

申请日：2020-07-31

Applicant: Infineon Technologies AG

Inventor： Josef Schaetz ,  Dethard Peters ,  Stephan Pindl ,  Hans-Joachim Schulze

IPC: H01L23/373 ,  H01L29/423 ,  H01L29/51 ,  H01L29/06 ,  H01L29/40 ,  H01L29/16 ,  H01L29/78 ,  H01L23/367 ,  H01L29/66 ,  H01L29/739

CPC classification number: H01L23/373 ,  H01L23/367 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/401 ,  H01L29/42364 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802

Abstract: A power semiconductor device includes: a semiconductor body having a front side and a backside and configured to conduct a load current between the front side and the backside; and a plurality of control cells configured to control the load current. Each control cell is at least partially included in the semiconductor body at the front side and includes a gate electrode that is electrically insulated from the semiconductor body by a gate insulation layer. The gate insulation layer is or includes a first boron nitride layer.

公开(公告)号：US20220009771A1

公开(公告)日：2022-01-13

申请号：US17357234

申请日：2021-06-24

Applicant: Infineon Technologies AG

Inventor： Stephan Pindl ,  Carsten Ahrens ,  Stefan Jost ,  Ulrich Krumbein

IPC: B81C1/00 ,  B81B3/00

Abstract: A method for providing a semiconductor layer arrangement on a substrate which comprises providing a semiconductor layer arrangement having a functional layer and a semiconductor substrate layer, attaching the semiconductor layer arrangement to a glass substrate layer such that the functional layer is arranged between the glass substrate layer and the semiconductor substrate layer, and removing the semiconductor substrate layer at least partially such that the glass substrate layer substitutes the semiconductor substrate layer as the substrate of the semiconductor layer arrangement.

公开(公告)号：US11211298B2

公开(公告)日：2021-12-28

申请号：US16654165

申请日：2019-10-16

Applicant: Infineon Technologies AG

Inventor： Stephan Pindl ,  Daniel Lugauer ,  Dominic Maier ,  Alfons Dehe

IPC: H01L23/053 ,  H01L21/20 ,  H01L21/18 ,  H01L21/762 ,  H01L23/31 ,  H01L23/057 ,  G01N27/12 ,  H01L23/29 ,  H01L23/00 ,  H01L21/306 ,  H01L21/02 ,  H01L21/302 ,  H01L33/00 ,  G01N27/02 ,  G01N33/00 ,  H01L21/56 ,  H01L23/538 ,  H05K1/18

Abstract: According to an embodiment, a sensor package includes an electrically insulating substrate including a cavity in the electrically insulating substrate, an ambient sensor, an integrated circuit die embedded in the electrically insulating substrate, and a plurality of conductive interconnect structures coupling the ambient sensor to the integrated circuit die. The ambient sensor is supported by the electrically insulating substrate and arranged adjacent the cavity.