公开(公告)号：US07476568B2

公开(公告)日：2009-01-13

申请号：US11479740

申请日：2006-06-30

Applicant: Daoqiang Lu ,  Rajashree Baskaran ,  Chuan Hu

Inventor： Daoqiang Lu ,  Rajashree Baskaran ,  Chuan Hu

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L23/3675 ,  H01L21/4882 ,  H01L21/6835 ,  H01L23/42 ,  H01L24/27 ,  H01L2221/68309 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/351 ,  H01L2924/00

Abstract: An embodiment of the present invention is a technique to fabricate a package. A heat spreader (HS) array on a HS support substrate is formed. The HS array has a plurality of heat spreaders. A diced wafer supported by a wafer support substrate (WSS) is formed. The diced wafer has a plurality of thin dice. The thin dice in the diced wafer are bonded to the heat spreaders in the HS array to form HS-bonded thin dice between the HS support substrate and the WSS.

Abstract translation: 本发明的一个实施例是一种制造包装的技术。 形成HS支撑基板上的散热器（HS）阵列。 HS阵列具有多个散热器。 形成由晶片支撑基板（WSS）支撑的切割晶片。 切割晶片具有多个薄骰子。 切割晶片中的薄骰子结合到HS阵列中的散热器上，以在HS支撑衬底和WSS之间形成HS结合的薄骰子。

公开(公告)号：US20060065935A1

公开(公告)日：2006-03-30

申请号：US10949463

申请日：2004-09-24

Applicant: Gilroy Vandentop ,  Rajashree Baskaran

Inventor： Gilroy Vandentop ,  Rajashree Baskaran

IPC: H01L29/76 ,  H01L21/8238

CPC classification number: H01L21/6835 ,  H01L21/823807 ,  H01L21/84 ,  H01L29/7842 ,  H01L2221/6834 ,  H01L2221/6835 ,  H01L2221/68363

Abstract: Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.

Abstract translation: 本发明的一些实施例包括选择性地诱导与晶体管区域相反的背侧应力以优化晶体管性能。

公开(公告)号：US08541876B2

公开(公告)日：2013-09-24

申请号：US11242176

申请日：2005-09-30

Applicant: Daoqiang Lu ,  Chuan Hu ,  Gilroy J. Vandentop ,  Shriram Ramanathan ,  Rajashree Baskaran ,  Valery M. Dubin

Inventor： Daoqiang Lu ,  Chuan Hu ,  Gilroy J. Vandentop ,  Shriram Ramanathan ,  Rajashree Baskaran ,  Valery M. Dubin

IPC: H01L23/10

CPC classification number: H01L24/83 ,  H01L21/4871 ,  H01L23/3735 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/18161 ,  H01L2924/19106 ,  H01L2924/00

Abstract: A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.

Abstract translation: 一种制造具有直接接触散热器的微电子封装的方法，根据该方法形成的封装，根据该方法形成的模具散热器组合以及包含封装的系统。 该方法包括金属化微电子管芯的背面以形成直接接触并固定到管芯背面的散热器主体，从而产生模具散热器组合。 该封装包括模具散热器组合和与模具结合的衬底。

公开(公告)号：US07666714B2

公开(公告)日：2010-02-23

申请号：US11648120

申请日：2006-12-29

Applicant: Daoqiang Lu ,  Rajashree Baskaran ,  Charan Gurumurthy

Inventor： Daoqiang Lu ,  Rajashree Baskaran ,  Charan Gurumurthy

IPC: H01L21/58

CPC classification number: H01L21/563 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68354 ,  H01L2221/68359 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/81001 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2224/97 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2224/81

Abstract: In one embodiment, a method comprises coupling a coreless substrate panel to a pressure cover plate of a carrier, applying flux to the coreless substrate panel, placing at least one die on the coreless substrate panel, reflowing solder onto the coreless substrate panel, defluxing the coreless substrate panel, underfilling the coreless substrate panel, and attaching at least one heat spreader to the coreless substrate panel.

Abstract translation: 在一个实施例中，一种方法包括将无芯衬底面板耦合到载体的压力盖板，将助焊剂施加到无芯衬底面板，将至少一个管芯放置在无芯衬底面板上，将焊料回流到无芯衬底面板上， 无芯基板，底部填充无芯基板，并将至少一个散热器附接到无芯基板。

公开(公告)号：US20090034206A1

公开(公告)日：2009-02-05

申请号：US12247193

申请日：2008-10-07

Applicant: Daoqiang Lu ,  Rajashree Baskaran ,  Chuan Hu

Inventor： Daoqiang Lu ,  Rajashree Baskaran ,  Chuan Hu

IPC: H05K7/20

CPC classification number: H01L23/3675 ,  H01L21/4882 ,  H01L21/6835 ,  H01L23/42 ,  H01L24/27 ,  H01L2221/68309 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/351 ,  H01L2924/00

Abstract: An embodiment of the present invention is a technique to fabricate a package. A heat spreader (HS) array on a HS support substrate is formed. The HS array has a plurality of heat spreaders. A diced wafer supported by a wafer support substrate (WSS) is formed. The diced wafer has a plurality of thin dice. The thin dice in the diced wafer are bonded to the heat spreaders in the HS array to form HS-bonded thin dice between the HS support substrate and the WSS.

Abstract translation: 本发明的一个实施例是一种制造包装的技术。 形成HS支撑基板上的散热器（HS）阵列。 HS阵列具有多个散热器。 形成由晶片支撑基板（WSS）支撑的切割晶片。 切割晶片具有多个薄骰子。 切割晶片中的薄骰子结合到HS阵列中的散热器上，以在HS支撑衬底和WSS之间形成HS结合的薄骰子。

公开(公告)号：US07449361B2

公开(公告)日：2008-11-11

申请号：US11230031

申请日：2005-09-19

Applicant: Rajashree Baskaran ,  Kramadhati V. Ravi

Inventor： Rajashree Baskaran ,  Kramadhati V. Ravi

IPC: H01L21/00 ,  H01L21/44

CPC classification number: H01L21/0405 ,  H01L21/4871 ,  H01L23/3732 ,  H01L23/433 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

Abstract: Disclosed is a method of forming a substrate having islands of diamond (or other material, such as diamond-like carbon), as well as integrated circuit devices formed from such a substrate. A diamond island can form part of the thermal solution for an integrated circuit formed on the substrate, and the diamond island can also provide part of a stress engineering solution to improve performance of the integrated circuit. Other embodiments are described and claimed.

Abstract translation: 公开了一种形成具有金刚石（或其他材料，例如类金刚石碳）岛的衬底的方法以及由这种衬底形成的集成电路器件。 金刚石岛可以形成在基板上形成的集成电路的热解解的一部分，并且金刚石岛还可以提供部分应力工程解决方案以改善集成电路的性能。 描述和要求保护其他实施例。

公开(公告)号：US20080237729A1

公开(公告)日：2008-10-02

申请号：US12061935

申请日：2008-04-03

Applicant: Gilroy J. Vandentop ,  Rajashree Baskaran

Inventor： Gilroy J. Vandentop ,  Rajashree Baskaran

IPC: H01L27/092 ,  H01L21/44 ,  H01L21/311

CPC classification number: H01L21/6835 ,  H01L21/823807 ,  H01L21/84 ,  H01L29/7842 ,  H01L2221/6834 ,  H01L2221/6835 ,  H01L2221/68363

Abstract: Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.

Abstract translation: 本发明的一些实施例包括选择性地诱导与晶体管区域相反的背侧应力以优化晶体管性能。

公开(公告)号：US20080230106A1

公开(公告)日：2008-09-25

申请号：US12148316

申请日：2008-04-18

Applicant: Rajashree Baskaran

Inventor： Rajashree Baskaran

IPC: H01L35/32 ,  F25B21/02 ,  H01L23/38

CPC classification number: H01L27/16 ,  H01L21/4882 ,  H01L23/38 ,  H01L27/12 ,  H01L2924/0002 ,  Y10S257/93 ,  H01L2924/00

Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a first plurality of openings through a first surface of a substrate, forming a p-type TFTEC material within the first plurality of openings, forming a second plurality of openings substantially adjacent to the first plurality of openings through the first surface of the substrate, and then forming an n-type TFTEC material within the second plurality of openings.

Abstract translation: 描述形成微电子结构的方法。 这些方法的实施例包括通过基板的第一表面形成第一多个开口，在第一多个开口内形成p型TFTEC材料，形成基本上邻近第一多个开口的第二多个开口，穿过第一 然后在第二多个开口内形成n型TFTEC材料。

公开(公告)号：US20080160673A1

公开(公告)日：2008-07-03

申请号：US11648120

申请日：2006-12-29

Applicant: Daoqiang Lu ,  Rajashree Baskaran ,  Charan Gurumurthy

Inventor： Daoqiang Lu ,  Rajashree Baskaran ,  Charan Gurumurthy

IPC: H01L21/02

CPC classification number: H01L21/563 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68354 ,  H01L2221/68359 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/81001 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2224/97 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2224/81

Abstract: In one embodiment, a method comprises coupling a coreless substrate panel to a pressure cover plate of a carrier, applying flux to the coreless substrate panel, placing at least one die on the coreless substrate panel, reflowing solder onto the coreless substrate panel, defluxing the coreless substrate panel, underfilling the coreless substrate panel, and attaching at least one heat spreader to the coreless substrate panel.

Abstract translation: 在一个实施例中，一种方法包括将无芯衬底面板耦合到载体的压力盖板，将助焊剂施加到无芯衬底面板，将至少一个管芯放置在无芯衬底面板上，将焊料回流到无芯衬底面板上， 无芯基板，底部填充无芯基板，并将至少一个散热器附接到无芯基板。

公开(公告)号：US07371630B2

公开(公告)日：2008-05-13

申请号：US10949463

申请日：2004-09-24

Applicant: Gilroy J. Vandentop ,  Rajashree Baskaran

Inventor： Gilroy J. Vandentop ,  Rajashree Baskaran

IPC: H01L29/76

CPC classification number: H01L21/6835 ,  H01L21/823807 ,  H01L21/84 ,  H01L29/7842 ,  H01L2221/6834 ,  H01L2221/6835 ,  H01L2221/68363

Abstract: Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.

Abstract translation: 本发明的一些实施例包括选择性地诱导与晶体管区域相反的背侧应力以优化晶体管性能。