公开(公告)号：US20240105455A1

公开(公告)日：2024-03-28

申请号：US17952613

申请日：2022-09-26

Applicant: Tokyo Electron Limited

Inventor： Shan Hu ,  Henan Zhang ,  Sangita Kumari ,  Peter Delia

IPC: H01L21/306

CPC classification number: H01L21/30604

Abstract: Embodiments of a wet etch process and methods are disclosed herein to provide uniform wet etching of material within high aspect ratio features. In the present disclosure, a wet etch process is used to etch material within high aspect ratio features, such as deep trenches and holes, provided on a patterned substrate. Uniform wet etching is provided in the present disclosure by ensuring that wall surfaces of the material being etched (or wall surfaces adjacent to the material being etched) exhibit a neutral surface charge when exposed to the etch solution used to etch the material.

公开(公告)号：US20240087950A1

公开(公告)日：2024-03-14

申请号：US17942378

申请日：2022-09-12

Applicant: Tokyo Electron Limited

Inventor： Shan Hu ,  Eric Chih-Fang Liu ,  Henan Zhang ,  Sangita Kumari ,  Peter Delia

IPC: H01L21/768 ,  H01L21/311

CPC classification number: H01L21/7682 ,  H01L21/31111 ,  H01L21/76819 ,  H01L21/76831

Abstract: Embodiments of improved process flows and methods are provided in the present disclosure to form air gaps between metal interconnects. More specifically, the present disclosure provides improved process flows and methods that utilize a wet etch process to form recesses between metal interconnects formed on a patterned substrate. Unlike conventional air gap integration methods, the improved process flows and methods described herein utilize the critical dimension (CD) dependent etching provided by wet etch processes to etch an intermetal dielectric material formed between the metal interconnects at a faster rate than the intermetal dielectric material is etched in surrounding areas of the patterned substrate. This enables the improved process flows and methods described herein to form recesses (and subsequently form air gaps) between the metal interconnects without using a dry etch process.

公开(公告)号：US11532517B2

公开(公告)日：2022-12-20

申请号：US16781078

申请日：2020-02-04

Applicant: Tokyo Electron Limited

Inventor： Yun Han ,  Andrew Metz ,  Xinghua Sun ,  David L. O'Meara ,  Kandabara Tapily ,  Henan Zhang ,  Shan Hu

IPC: H01L21/8234 ,  H01L21/20 ,  H01L21/311 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/02

Abstract: In one embodiment, a method includes providing a substrate comprising a source/drain contact region and a dummy gate, forming a first etch stop layer aligned to the source/drain contact region, where the first etch stop layer does not cover the dummy gate. The method may include forming a second etch stop layer over the first etch stop layer, the second etch stop layer covering the first etch stop layer and the dummy gate. The method may include converting the dummy gate to a metal gate. The method may include removing the second etch stop layer using a plasma etching process. The method may include removing the first etch stop layer.