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1.
公开(公告)号:US20240096638A1
公开(公告)日:2024-03-21
申请号:US17946609
申请日:2022-09-16
Applicant: Tokyo Electron Limited
Inventor: Shan Hu , Henan Zhang , Sangita Kumari , Peter Delia , Robert Clark
IPC: H01L21/311 , H01L21/306 , H01L21/3213
CPC classification number: H01L21/31111 , H01L21/30604 , H01L21/32134
Abstract: Embodiments of a wet etch process and methods are disclosed herein to provide uniform wet etching of material formed within features (e.g., trenches, holes, slits, etc.), and on more planar areas of a patterned substrate, when a critical dimension (CD) of the features is relatively small compared to the more planar areas of the patterned substrate. In the present disclosure, uniform wet etching is provided by ensuring that wall surfaces adjacent to the material being etched exhibit a neutral surface charge when exposed to the etch solution used to etch the material.
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公开(公告)号:US20240087908A1
公开(公告)日:2024-03-14
申请号:US17942359
申请日:2022-09-12
Applicant: Tokyo Electron Limited
Inventor: Shan Hu , Henan Zhang , Sangita Kumari , Peter Delia
IPC: H01L21/311 , H01L21/306 , H01L21/3213
CPC classification number: H01L21/31111 , H01L21/30604 , H01L21/32134
Abstract: Embodiments of a wet etch process and method are disclosed to provide uniform etching of material formed within features (such as, e.g., trenches, holes, slits, etc.) having different critical dimension (CD). By combining a non-aqueous organic-based etch solution and an aqueous-based etch solution (either in series or in parallel) within a wet etch process, the disclosed embodiments utilize the opposing effects of CD-dependent etching to provide uniform etching of the material, regardless of CD.
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公开(公告)号:US11424123B2
公开(公告)日:2022-08-23
申请号:US16851414
申请日:2020-04-17
Applicant: Tokyo Electron Limited
Inventor: Eric Chih-Fang Liu , Akiteru Ko , Angelique Raley , Henan Zhang , Shan Hu , Subhadeep Kal
IPC: H01L21/033 , H01L21/027 , H01L21/311 , H01L21/306 , H01L21/3213 , H01L21/67 , H01L21/3065
Abstract: In certain embodiments, a method of forming a semiconductor device includes forming a patterned resist layer over a hard mask layer using an extreme ultraviolet (EUV) lithography process. The hard mask layer is disposed over a substrate. The method includes patterning the hard mask layer using the patterned resist layer as an etch mask. The method includes smoothing the hard mask layer by forming, using a first atomic layer etch step, a first layer by converting a first portion of the hard mask layer, and by removing, using a second atomic layer etch step, the first layer.
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公开(公告)号:US12148624B2
公开(公告)日:2024-11-19
申请号:US17942387
申请日:2022-09-12
Applicant: Tokyo Electron Limited
Inventor: Shan Hu , Eric Chih-Fang Liu , Henan Zhang , Sangita Kumari , Peter Delia
IPC: H01L21/311
Abstract: Embodiments of improved process flows and methods are provided in the present disclosure to control fin height and channel area in a fin field effect transistor (FinFET) having gaps of variable CD. More specifically, the present disclosure provides improved transistor fabrication processes and methods that utilize a wet etch process, instead of a dry etch process, to remove the oxide material deposited within the gaps formed between the fins of a FinFET. By utilizing a wet etch process, the improved transistor fabrication processes and methods described herein provide a means to adjust or individually control the fin height of one or more the fins, thereby providing greater control over the channel area of the FinFET.
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公开(公告)号:US12100598B2
公开(公告)日:2024-09-24
申请号:US17942369
申请日:2022-09-12
Applicant: Tokyo Electron Limited
Inventor: Shan Hu , Eric Chih-Fang Liu , Henan Zhang , Sangita Kumari , Peter Delia
IPC: H01L21/3105
CPC classification number: H01L21/31055
Abstract: The present disclosure combines chemical mechanical polishing (CMP), wet etch and deposition processes to provide improved processes and methods for planarizing an uneven surface of a material layer deposited over a plurality of structures formed on a substrate. A CMP process is initially used to smooth the uneven surface and provide complete local planarization of the material layer above the plurality of structures. After achieving complete local planarization, a wet etch process is used to etch the material layer until a uniform recess is formed between the plurality of structures and the material layer is provided with a uniform thickness across the substrate. In some embodiments, an additional material layer may be deposited and a second CMP process may be used to planarize the additional material layer to provide the substrate with a globally planarized surface.
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6.
公开(公告)号:US20240087909A1
公开(公告)日:2024-03-14
申请号:US17942387
申请日:2022-09-12
Applicant: Tokyo Electron Limited
Inventor: Shan Hu , Eric Chih-Fang Liu , Henan Zhang , Sangita Kumari , Peter Delia
IPC: H01L21/311
CPC classification number: H01L21/31111
Abstract: Embodiments of improved process flows and methods are provided in the present disclosure to control fin height and channel area in a fin field effect transistor (FinFET) having gaps of variable CD. More specifically, the present disclosure provides improved transistor fabrication processes and methods that utilize a wet etch process, instead of a dry etch process, to remove the oxide material deposited within the gaps formed between the fins of a FinFET. By utilizing a wet etch process, the improved transistor fabrication processes and methods described herein provide a means to adjust or individually control the fin height of one or more the fins, thereby providing greater control over the channel area of the FinFET.
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7.
公开(公告)号:US20240087907A1
公开(公告)日:2024-03-14
申请号:US17942369
申请日:2022-09-12
Applicant: Tokyo Electron Limited
Inventor: Shan Hu , Eric Chih-Fang Liu , Henan Zhang , Sangita Kumari , Peter Delia
IPC: H01L21/3105
CPC classification number: H01L21/31055
Abstract: The present disclosure combines chemical mechanical polishing (CMP), wet etch and deposition processes to provide improved processes and methods for planarizing an uneven surface of a material layer deposited over a plurality of structures formed on a substrate. A CMP process is initially used to smooth the uneven surface and provide complete local planarization of the material layer above the plurality of structures. After achieving complete local planarization, a wet etch process is used to etch the material layer until a uniform recess is formed between the plurality of structures and the material layer is provided with a uniform thickness across the substrate. In some embodiments, an additional material layer may be deposited and a second CMP process may be used to planarize the additional material layer to provide the substrate with a globally planarized surface.
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公开(公告)号:US12243749B2
公开(公告)日:2025-03-04
申请号:US17952613
申请日:2022-09-26
Applicant: Tokyo Electron Limited
Inventor: Shan Hu , Henan Zhang , Sangita Kumari , Peter Delia
IPC: H01L21/306
Abstract: Embodiments of a wet etch process and methods are disclosed herein to provide uniform wet etching of material within high aspect ratio features. In the present disclosure, a wet etch process is used to etch material within high aspect ratio features, such as deep trenches and holes, provided on a patterned substrate. Uniform wet etching is provided in the present disclosure by ensuring that wall surfaces of the material being etched (or wall surfaces adjacent to the material being etched) exhibit a neutral surface charge when exposed to the etch solution used to etch the material.
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9.
公开(公告)号:US12237216B2
公开(公告)日:2025-02-25
申请号:US17688343
申请日:2022-03-07
Applicant: Tokyo Electron Limited
Inventor: Kai-Hung Yu , Shihsheng Chang , Ying Trickett , Eric Chih-Fang Liu , Yun Han , Henan Zhang , Cory Wajda , Robert D. Clark , Gerrit J. Leusink , Gyanaranjan Pattanaik , Hiroaki Niimi
IPC: H01L21/768
Abstract: A method for filling recessed features with a low-resistivity metal. The method includes providing a patterned substrate containing a recessed feature formed in a first layer and a second layer that is exposed in the recessed feature, forming a nucleation enhancement layer on a sidewall of the first layer in the recessed feature and depositing a metal layer in the recessed feature by vapor phase deposition, where the metal layer is deposited on the second layer and on the nucleation enhancement layer. An initial metal layer may be selectively formed on the second layer in the recessed feature before forming the nucleation enhancement layer.
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公开(公告)号:US12100599B2
公开(公告)日:2024-09-24
申请号:US17942359
申请日:2022-09-12
Applicant: Tokyo Electron Limited
Inventor: Shan Hu , Henan Zhang , Sangita Kumari , Peter Delia
IPC: H01L21/311 , H01L21/306 , H01L21/3213
CPC classification number: H01L21/31111 , H01L21/30604 , H01L21/32134
Abstract: Embodiments of a wet etch process and method are disclosed to provide uniform etching of material formed within features (such as, e.g., trenches, holes, slits, etc.) having different critical dimension (CD). By combining a non-aqueous organic-based etch solution and an aqueous-based etch solution (either in series or in parallel) within a wet etch process, the disclosed embodiments utilize the opposing effects of CD-dependent etching to provide uniform etching of the material, regardless of CD.
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