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公开(公告)号:US09854671B1
公开(公告)日:2017-12-26
申请号:US15410745
申请日:2017-01-19
Applicant: Unimicron technology Corp.
Inventor: Wei-Ti Lin , Chun-Hsien Chien , Yu-Chung Hsieh , Yu-Hua Chen
CPC classification number: H05K1/115 , H01F17/0013 , H01F17/0033 , H01F27/24 , H01F27/2804 , H01F2017/002 , H01F2027/2809 , H05K1/036 , H05K1/0366 , H05K1/165 , H05K3/4076 , H05K3/42 , H05K3/423 , H05K3/426 , H05K3/4644 , H05K2201/0187 , H05K2201/0195 , H05K2201/086 , H05K2201/0959
Abstract: A circuit board includes a substrate, a first magnetic structure, a first dielectric layer and an inductive coil. The substrate has a top surface and a bottom surface. The first magnetic structure is disposed on the top surface of the substrate. The first dielectric layer covers the substrate and the first magnetic structure. The inductive coil includes a first interconnect, a second interconnect and a plurality of conductive pillars. The first interconnect is disposed on the first dielectric layer. The second interconnect is disposed on the bottom surface of the substrate. The conductive pillars connect the first interconnect and the second interconnect. The first interconnect, the second interconnect and the conductive pillars form a helical structure surrounding the first magnetic structure.
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公开(公告)号:US12292468B2
公开(公告)日:2025-05-06
申请号:US18315474
申请日:2023-05-10
Applicant: Unimicron Technology Corp.
Inventor: Chun-Hsien Chien , Hsin-Hung Lee , Hsuan-Yu Lai , Yu-Chung Hsieh
IPC: G01R31/28
Abstract: An inspection system and an inspection method of a bare circuit board are provided. The inspection system is used for inspecting a bare circuit board. The bare circuit board includes a chip pad and an antenna. The inspection system includes an adapter board, a test device and a measure device. The adapter board includes a chip and a contact structure. The chip is electrically connected to the contact structure. The contact structure touches the chip pad so that the chip is electrically connected to the chip pad. The test device includes a transceiver antenna. The test device and the bare circuit board separate. The measure device is electrically connected to the chip or the transceiver antenna.
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公开(公告)号:US11139234B1
公开(公告)日:2021-10-05
申请号:US16942743
申请日:2020-07-29
Applicant: Unimicron Technology Corp.
Inventor: Wei-Ti Lin , Chun-Hsien Chien , Yu-Hua Chen
IPC: H05K1/18 , H01L23/498 , H01L21/48
Abstract: A package carrier includes a substrate, at least one interposer disposed in at least one opening of the substrate, a conductive structure layer, a first build-up structure, and a second build-up structure. The interposer includes a glass substrate, at least one conductive via, at least one first pad, and at least one second pad. The conductive via passes through the glass substrate, and the first and the second pads are disposed respectively on an upper surface and a lower surface of the glass substrate opposite to each other and are connected to opposite ends of the conductive via. The conductive structure layer is disposed on the substrate and is structurally and electrically connected to the first and the second pads. The first and the second build-up structures are disposed respectively on the first and the second surfaces of the substrate and are electrically connected to the conductive structure layer.
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公开(公告)号:US20210219435A1
公开(公告)日:2021-07-15
申请号:US17219898
申请日:2021-04-01
Applicant: Unimicron Technology Corp.
Inventor: Chun-Hsien Chien , Wen-Liang Yeh , Wei-Ti Lin
Abstract: A circuit carrier board includes a first build-up layer structure, a substrate, an adhesive layer, and a conductive structure. The first build-up layer includes a plurality of first dielectric layers and a plurality of first circuit layers original stacked. The substrate includes a base and a second build-up layer structure disposed on the base. The second build-up layer structure includes a plurality of second dielectric layers and a plurality of second circuit layer original stacked. A top most layer of the second circuit layers is exposed outside of the second dielectric layers. The conductive structure penetrates through the first dielectric layers, the first circuit layers and the adhesive layer, and contacts with the top most layer of the second circuit layers. The conductive structure electrical connects the first circuit layers to the second circuit layers. A manufacturing method of the circuit carrier board is also provided.
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公开(公告)号:US20210193608A1
公开(公告)日:2021-06-24
申请号:US17195649
申请日:2021-03-09
Applicant: Unimicron Technology Corp.
Inventor: Yu-Chung Hsieh , Chun-Hsien Chien , Yu-Hua Chen
IPC: H01L23/00 , H01L21/768 , H01L21/027 , H05K3/00
Abstract: A manufacturing method of a circuit board element including the following steps is provided: placing a circuit substrate on a carrier, wherein the circuit substrate includes an insulating layer and a circuit layer disposed thereon, a protective layer disposed on the circuit layer and having a plurality of openings exposing thereof, and a plurality of solder balls disposed on the protective layer and embedded in the openings; forming a trench penetrating the circuit substrate to expose the carrier; forming a photoresist material layer to cover the circuit substrate and filling the spaces between each of the solder balls and the protective layer and is filling in the trench to cover the carrier; curing a portion of the photoresist material layer filled in the spaces to form a dielectric layer; removing a portion of the photoresist material layer filled in the trench to expose the carrier; and removing the carrier.
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公开(公告)号:US10886264B2
公开(公告)日:2021-01-05
申请号:US16869595
申请日:2020-05-08
Applicant: Unimicron Technology Corp.
Inventor: Wei-Ti Lin , Chun-Hsien Chien , Fu-Yang Chen
IPC: H01L25/16 , H01L23/00 , H01L25/075 , H01L33/62
Abstract: A manufacturing method of the light-emitting diode package structure is provided. A carrier is formed. The carrier comprises a first build-up circuit. At least one self-assembled material layer is formed on the first build-up circuit. A first solder mask layer is formed on the first build-up circuit. The first solder mask layer has at least one opening to expose a portion of the at least one self-assembled material layer. At least one light-emitting diode is disposed on the first build-up circuit. The at least one light-emitting diode has a self-assembled pattern, and the at least one light-emitting diode is self-assembled into the at least one opening of the first solder mask layer through a force between the self-assembled pattern and the at least one self-assembled material layer.
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公开(公告)号:US10863618B2
公开(公告)日:2020-12-08
申请号:US16283670
申请日:2019-02-22
Applicant: Unimicron Technology Corp.
Inventor: Tzyy-Jang Tseng , Pei-Wei Wang , Bo-Cheng Lin , Chun-Hsien Chien , Chien-Chou Chen
IPC: H05K1/02 , H05K1/11 , H05K3/30 , H05K3/46 , H01Q3/38 , H01Q1/24 , H01Q1/38 , H05K3/02 , H05K3/40 , H05K1/18
Abstract: A composite substrate structure includes a circuit substrate, a first anisotropic conductive film, a first glass substrate, a dielectric layer, a patterned circuit layer and a conductive via. The first anisotropic conductive film is disposed on the circuit substrate. The first glass substrate is disposed on the first anisotropic conductive film and has a first surface and a second surface opposite to the first surface. The first glass substrate includes a first circuit layer, a second circuit layer and at least one first conductive via. The first circuit layer is disposed on the first surface. The second circuit layer is disposed on the second surface. The first conductive via penetrates the first glass substrate and is electrically connected to the first circuit layer and the second circuit layer. The first glass substrate and the circuit substrate are respectively located on two opposite sides of the first anisotropic conductive film.
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公开(公告)号:US10797017B2
公开(公告)日:2020-10-06
申请号:US16283657
申请日:2019-02-22
Applicant: Unimicron Technology Corp.
Inventor: Po-Chen Lin , Ra-Min Tain , Chun-Hsien Chien , Chien-Chou Chen
Abstract: An embedded chip package includes a circuit board, a chip, a dielectric material layer, and a build-up circuit structure. The circuit board includes a glass substrate and at least one conductive via. The glass substrate has a first surface, a second surface opposite the first surface, and a through-hole penetrating the glass substrate. The conductive via penetrates the glass substrate. The chip is disposed inside the through-hole. The dielectric material layer is filled inside the through-hole and covers the chip. The build-up circuit structure is disposed on the circuit board. The build-up circuit structure is electrically connected to the conductive via. A lower surface of the chip is exposed outside the dielectric material layer.
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公开(公告)号:US10700049B2
公开(公告)日:2020-06-30
申请号:US16161080
申请日:2018-10-16
Applicant: Unimicron Technology Corp.
Inventor: Wei-Ti Lin , Chun-Hsien Chien , Fu-Yang Chen
IPC: H01L25/16 , H01L23/00 , H01L25/075 , H01L33/62
Abstract: A light-emitting diode package structure includes a carrier, at least one self-assembled material layer, a first solder mask layer, and at least one light-emitting diode. The carrier includes a first build-up circuit. The self-assembled material layer is disposed on the first build-up circuit. The first solder mask layer is disposed on the first build-up circuit. The first solder mask layer has at least one opening to expose a portion of the self-assembled material layer. The light-emitting diode is disposed on the first build-up circuit. The light-emitting diode has a self-assembled pattern. The light-emitting diode is self-assembled into the opening of the first solder mask layer through a force between the self-assembled pattern and the self-assembled material layer. A manufacturing method of the light-emitting diode package structure is also provided.
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公开(公告)号:US20200161518A1
公开(公告)日:2020-05-21
申请号:US16281108
申请日:2019-02-21
Applicant: Unimicron Technology Corp.
Inventor: Yi-Cheng Lin , Yu-Hua Chen , Chun-Hsien Chien , Chien-Chou Chen , Cheng-Hui Wu
IPC: H01L33/62 , H01L33/52 , H01L23/498 , H01L23/538 , H01L23/31
Abstract: A light-emitting diode package including a carrier structure, a patterned conductive layer, at least one chip, a dielectric layer, at least one first conductive via, a build-up circuit structure, and at least one light-emitting diode is provided. The patterned conductive layer is disposed on the carrier structure. The chip is disposed on the carrier structure. The dielectric layer is disposed on the carrier structure and encapsulates the chip and the patterned conductive layer. The first conductive via penetrates the dielectric layer and is electrically connected to the patterned conductive layer. The build-up circuit structure is disposed on the dielectric layer and electrically connected to the first conductive via. The light-emitting diode is disposed on the build-up circuit structure.
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