Abstract:
The present invention relates to MEM switches. More specifically, the present invention relates to a system and method for making MEM switches having a common ground plane. One method for making MEM switches includes: patterning a common ground plane layer on a substrate; forming a dielectric layer on the common ground plane layer; depositing a DC electrode region through the dielectric layer to contact the common ground plane layer; and depositing a conducting layer on the DC electrode region so that regions of the conducting layer contact the DC electrode region, so that the common ground plane layer provides a common ground for the regions of the conducting layer
Abstract:
A method for depositing material on a channel plate such that the material is registered to one or more channels formed in the channel plate includes filling at least one of the channels with a resist that is not wetted by the material; depositing the material on at least a region of the channel plate that includes at least part of the resist, the material registering with at least one channel edge as a result of the material's abutment to the resist; and then removing the resist. The method may be used, in one embodiment, to apply an adhesive or gasket material that is used in assembling a switch.
Abstract:
A method for producing co-planar surface areas is disclosed. At first a first layer with at least one recess is provided. Onto the first layer a second layer is deposited over the entire area of the first layer wherein the second layer has a thickness greater than the depth of the recess. The second layer is composed of material different to the material of the first layer. The next step removes the second layer completely beyond the area of at least one recess. The remaining portion of the second layer is removed until the second layer is coplanar with the first layer.
Abstract:
Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
Abstract:
Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
Abstract:
A process for the manufacture of semiconductor devices comprising the chemical-mechanical polishing of a substrate or layer containing at least one III-V material in the presence of a chemical-mechanical polishing composition (Q1) comprising (A) inorganic particles, organic particles, or a mixture or composite thereof, (B) at least one amphiphilic non-ionic surfactant having (b1) at least one hydrophobic group; and (b2) at least one hydrophilic group selected from the group consisting of polyoxyalkylene groups comprising (b22) oxyalkylene monomer units other than oxyethylene monomer units; and (M) an aqueous medium.
Abstract:
A method entails providing a substrate with a structural layer having a thickness. A partial etch process is performed at locations on the structural layer so that a portion of the structural layer remains at the locations. An oxidation process is performed at the locations which consumes the remaining portion of the structural layer and forms an oxide having a thickness that is similar to the thickness of the structural layer. The oxide electrically isolates microstructures in the structural layer, thus producing a structure. A device substrate is coupled to the structure such that a cavity is formed between them. An active region is formed in the device substrate. A short etch process can be performed to expose the microstructures from an overlying oxide layer.
Abstract:
A non-abrading method to facilitate bonding of semiconductor components, such as silicon wafers, that have micro structural defects in a bonding interface surface. In a preferred method, micro structural defects are removed by forming an oxide layer on the bonding interface surface to a depth below the level of the defect, and then removing the oxide layer to expose a satisfactory surface for bonding, thereby increasing line yield and reducing scrap triggers in fabrication facilities.
Abstract:
The present invention relates to MEM switches. More specifically, the present invention relates to a system and method for making MEM switches having a common ground plane. One method for making MEM switches includes: patterning a common ground plane layer on a substrate; forming a dielectric layer on the common ground plane layer; depositing a DC electrode region through the dielectric layer to contact the common ground plane layer; and depositing a conducting layer on the DC electrode region so that regions of the conducting layer contact the DC electrode region, so that the common ground plane layer provides a common ground for the regions of the conducting layer
Abstract:
A method of producing a device with a movable portion spaced apart from a support wafer comprises a step of providing the support wafer having a structured surface and a further step of providing a device wafer with a backing layer and a device layer disposed thereon. Further, the method comprises the step of generating a first planarization layer from a first starting material on the support wafer with a first method to fill in the structures of the structured surface of the support wafer, whereby a surface with a first degree of planarization is obtained. Further, the method comprises a step of generating a second planarization layer from a second starting material on the planarized surface of the support wafer with a second method to obtain a surface with a second degree of planarization, which is higher than the first degree of planarization, wherein the first and second planarization layers can be removed together. Additionally, the support wafer is connected to the device wafer such that the device layer and the planarized surface of the support wafer are connected. Then, removing the backing layer of the device wafer is performed, followed by structuring the resulting structure and removing the first and second planarization layers via a common method to generate the moveable portion of the device.