Etching method
    22.
    发明申请
    Etching method 失效
    蚀刻方法

    公开(公告)号:US20050106892A1

    公开(公告)日:2005-05-19

    申请号:US10979249

    申请日:2004-11-03

    Applicant: Tsutomu Oosaka

    Inventor: Tsutomu Oosaka

    CPC classification number: H01L21/31116 B81C1/00047 B81C1/00547 B81C2201/117

    Abstract: To provide an etching method capable of forming a cavity portion having a large space portion or a complicated structure by etching a sacrifice layer through a very fine etching opening at favorable accuracy in configuration. An etching process of a object is carried out by exposing the object to a processing fluid containing etching reaction seed (the third step S3, the fourth step S4), and then, the pressure in the processing chamber is reduced to make a density of the processing fluid around the object lower than that in the fourth step S4 (the first step S1). While the first step S1 to the first step S4 are repeated, in the third step S3 and the fourth step S4 executed after the first step S1, the processing fluid containing etching reaction seed is newly supplied to the processing atmosphere in which the object is placed to make the density of the processing fluid around the object higher than that in the first step S1.

    Abstract translation: 为了提供能够通过以非常精细的蚀刻开口蚀刻牺牲层而形成具有大空间部分或复杂结构的空腔部分的蚀刻方法。 通过将物体暴露于含有蚀刻反应晶种的处理流体(第三步骤S 3,第四步骤S 4))来进行物体的蚀刻处理,然后将处理室中的压力减小以使密度 的处理流体低于第四步骤S4(第一步骤S1)。 当重复第一步骤S1至第一步骤S4时,在第一步骤S1之后执行的第三步骤S 3和第四步骤S 4中,将含有蚀刻反应种子的处理流体新提供给处理气氛 放置物体以使物体周围的加工流体的密度高于第一步骤S1。

    Methods for formation of air gap interconnects
    23.
    发明申请
    Methods for formation of air gap interconnects 审中-公开
    形成气隙互连的方法

    公开(公告)号:US20030073302A1

    公开(公告)日:2003-04-17

    申请号:US10270465

    申请日:2002-10-11

    Abstract: Processes are disclosed for forming integrated circuit devices where multilayered structures are formed having between layers a removable silicon material. The layers adjacent the removable silicon can be either conducting or insulating or both. After forming one or more layers with the removable silicon therebetween, the silicon is removed so as to provide for an air-gap dielectric. In one embodiment, adjacent layers are copper. Between the copper and removable silicon can be a barrier layer, such as a transition metal-silicon-nitride layer. In a preferred embodiment, the removable silicon is removed with a gas phase interhalogen or noble gas halide.

    Abstract translation: 公开了用于形成集成电路器件的工艺,其中多层结构在层之间形成可移除的硅材料。 与可去除的硅相邻的层可以是导电的或绝缘的,也可以是两者。 在其间具有可去除的硅形成一个或多个层之后,去除硅以提供气隙电介质。 在一个实施例中,相邻层是铜。 在铜和可移除的硅之间可以是阻挡层,例如过渡金属 - 氮化硅层。 在优选的实施方案中,用气相卤间或惰性气体卤化物除去可除去的硅。

    Integrated micromechanical sensor device
    24.
    发明授权
    Integrated micromechanical sensor device 失效
    集成微机械传感器装置

    公开(公告)号:US5744719A

    公开(公告)日:1998-04-28

    申请号:US619735

    申请日:1996-06-12

    Inventor: Wolfgang Werner

    Abstract: The integrated micromechanical sensor device contains a body with a substrate (1) on which an insulating layer (2) and thereon a monocrystalline silicon layer (3), are arranged, in which the silicon layer has trenches as far as the surface of the insulating layer, and the side walls of the trenches as well as the side of the silicon layer adjacent to the insulating layer have a first doping type (n.sup.+) and the silicon layer has a second doping type (n.sup.-) at least in a partial region of its remaining surface, in which the silicon layer has a transistor arrangement in a first region (TB) and a sensor arrangement in a second region (SB), for which the insulating layer (2) is partly removed under the second region. Such a sensor device has considerable advantages over known devices with regard to its properties and its production process.

    Abstract translation: PCT No.PCT / DE94 / 01092 Sec。 371日期:1996年6月12日 102(e)日期1996年6月12日PCT 1994年9月20日PCT公布。 公开号WO95 / 08775 1995年3月30日该集成微机械传感器装置包括具有衬底(1)的主体,其上布置有绝缘层(2)和其上的单晶硅层(3),其中硅层具有沟槽直到 绝缘层的表面和沟槽的侧壁以及与绝缘层相邻的硅层的侧面具有第一掺杂型(n +),并且硅层具有第二掺杂类型(n-), 至少在其剩余表面的部分区域中,其中硅层在第一区域(TB)中具有晶体管布置,以及在第二区域(SB)中的传感器布置,绝缘层(2)在其下部分地被去除 第二个地区。 相对于已知装置,这种传感器装置具有相对于其性质及其制造方法的优点。

    Method and product for fabricating a resonant-bridge microaccelerometer
    26.
    发明授权
    Method and product for fabricating a resonant-bridge microaccelerometer 失效
    用于制造谐振桥微加速度计的方法和产品

    公开(公告)号:US4893509A

    公开(公告)日:1990-01-16

    申请号:US291250

    申请日:1988-12-27

    Abstract: A resonant bridge microaccelerometer is formed using patterned Silicon-on-Insulator (SOI) material. A buried layer is formed in the silicon substrate using preferably oxygen ion implanting techniques. A predetermined proof mass is subsequently formed by selective deposition of an appropriate material on an epitaxially grown layer of silicon generally over the buried layer. The buried layer is subsequently removed by a hydrofluoric acid etch, thereby forming a gap generally everywhere therebetween the proof mass and the supporting silicon substrate, and delineating the resonant microbridges within the microaccelerometer.

    Abstract translation: 使用图案化的绝缘体上硅绝缘体(SOI)材料形成谐振桥式微加速度计。 使用优选的氧离子注入技术在硅衬底中形成掩埋层。 随后通过在通常在掩埋层上的硅的外延生长层上选择性沉积合适的材料来形成预定的质量。 随后通过氢氟酸蚀刻去除掩埋层,从而在校准质量块和支撑硅衬底之间通常形成间隙,并描绘微加速度计内的谐振微桥。

    METHOD AND APPARATUS FOR ETCHING THE SILICON OXIDE LAYER OF A SEMICONDUCTOR SUBSTRATE
    27.
    发明申请
    METHOD AND APPARATUS FOR ETCHING THE SILICON OXIDE LAYER OF A SEMICONDUCTOR SUBSTRATE 有权
    用于蚀刻半导体衬底的氧化硅层的方法和装置

    公开(公告)号:US20120196445A1

    公开(公告)日:2012-08-02

    申请号:US13024782

    申请日:2011-02-10

    Applicant: Kwon-Taek LIM

    Inventor: Kwon-Taek LIM

    CPC classification number: H01L21/31111 B81C1/00928 B81C2201/117

    Abstract: An aspect of the invention is to provide a method and apparatus for etching the silicon oxide layer of a semiconductor substrate, whereby the processing time for cleaning or rinsing, as well as any undesired aftereffects by residual hydrofluoric acid, may be reduced, in using the dry etching method involving the use of dense carbon dioxide that contains hydrofluoric acid, during the manufacturing process of a micro-electronic device.

    Abstract translation: 本发明的一个方面是提供一种用于蚀刻半导体衬底的氧化硅层的方法和装置,从而可以减少用于清洗或冲洗的处理时间以及由残留的氢氟酸引起的任何不期望的后果, 在微电子器件的制造过程中涉及使用含有氢氟酸的致密二氧化碳的干蚀刻方法。

    Method for stripping sacrificial layer in MEMS assembly
    28.
    发明授权
    Method for stripping sacrificial layer in MEMS assembly 有权
    MEMS组装中剥离牺牲层的方法

    公开(公告)号:US07432572B2

    公开(公告)日:2008-10-07

    申请号:US11229968

    申请日:2005-09-19

    Applicant: Joshua Malone

    Inventor: Joshua Malone

    Abstract: The present invention provides methods of manufacturing a MEMS assembly. In one embodiment, the method includes mounting a MEMS device, such as a MEMS mirror array, on an assembly substrate, where the MEMS device has a sacrificial layer over components formed therein. The method also includes coupling an assembly lid to the assembly substrate and over the MEMS device to create an interior of the MEMS assembly housing the MEMS device, whereby the coupling maintains an opening to the interior of the MEMS assembly. Furthermore, the method includes removing the sacrificial layer through the opening. A MEMS assembly constructed according to a process of the present invention is also disclosed.

    Abstract translation: 本发明提供了制造MEMS组件的方法。 在一个实施例中,该方法包括将MEMS器件(例如MEMS反射镜阵列)安装在组装衬底上,其中MEMS器件在其中形成的部件上具有牺牲层。 该方法还包括将组装盖耦合到组装衬底和MEMS器件上以形成容纳MEMS器件的MEMS组件的内部,由此耦合保持到MEMS组件的内部的开口。 此外,该方法包括通过开口去除牺牲层。 还公开了根据本发明的方法构造的MEMS组件。

    Vapor phase etching MEMS devices
    29.
    发明授权
    Vapor phase etching MEMS devices 有权
    气相蚀刻MEMS器件

    公开(公告)号:US07279431B2

    公开(公告)日:2007-10-09

    申请号:US10464597

    申请日:2003-06-18

    Inventor: Eric J. Bergman

    CPC classification number: B81C1/0092 B81C1/00928 B81C2201/117 H01L21/6708

    Abstract: An etch release for a MEMS device on a substrate includes etching the substrate with an etchant vapor and a wetting vapor. A thermal bake of the MEMS device, after the etch release may be used to volatilize residues. A supercritical fluid may also be used to remove residual contaminants. The combination of the etchant vapor, such as HF, and the wetting vapor, such as an alcohol vapor, improves the uniformity of the etch undercut on the substrate.

    Abstract translation: 衬底上的MEMS器件的蚀刻释放包括用蚀刻剂蒸气和润湿蒸气蚀刻衬底。 在蚀刻释放之后,MEMS器件的热烘烤可用于挥发残留物。 也可以使用超临界流体来除去残留的污染物。 蚀刻剂蒸气(例如HF)和润湿蒸气(例如醇蒸汽)的组合改善了基板上蚀刻底切的均匀性。

    Removal of MEMS sacrificial layers using supercritical fluid/chemical formulations
    30.
    发明授权
    Removal of MEMS sacrificial layers using supercritical fluid/chemical formulations 失效
    使用超临界流体/化学配方去除MEMS牺牲层

    公开(公告)号:US07160815B2

    公开(公告)日:2007-01-09

    申请号:US10782355

    申请日:2004-02-19

    Abstract: A method and composition for removing silicon-containing sacrificial layers from Micro Electro Mechanical System (MEMS) and other semiconductor substrates having such sacrificial layers is described. The etching compositions include a supercritical fluid (SCF), an etchant species, a co-solvent, and optionally a surfactant. Such etching compositions overcome the intrinsic deficiency of SCFs as cleaning reagents, viz., the non-polar character of SCFs and their associated inability to solubilize polar species that must be removed from the semiconductor substrate. The resultant etched substrates experience lower incidents of stiction relative to substrates etched using conventional wet etching techniques.

    Abstract translation: 描述了用于从微机电系统(MEMS)和其它具有这种牺牲层的半导体衬底去除含硅牺牲层的方法和组合物。 蚀刻组合物包括超临界流体(SCF),蚀刻剂物质,共溶剂和任选的表面活性剂。 这样的蚀刻组合物克服了作为清洗剂的SCF的固有缺陷,即SCF的非极性特征以及它们不溶于必须从半导体衬底去除的极性物质。 所得到的蚀刻的衬底相对于使用常规湿蚀刻技术蚀刻的衬底的沉降事件较少。

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