公开(公告)号：US11897763B2

公开(公告)日：2024-02-13

申请号：US17103796

申请日：2020-11-24

Applicant: STMICROELECTRONICS, INC.

Inventor： Jefferson Sismundo Talledo

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00309 ,  B81B7/0061 ,  B81B2201/0264 ,  B81B2201/0278 ,  B81B2207/012 ,  B81B2207/07 ,  B81C2201/0108 ,  B81C2201/0143 ,  B81C2201/0146

Abstract: A semiconductor package that contains an application-specific integrated circuit (ASIC) die and a micro-electromechanical system (MEMS) die. The MEMS die and the ASIC die are coupled to a substrate that includes an opening that extends through the substrate and is in fluid communication with an air cavity positioned between and separating the MEMS die from the substrate. The opening exposes the air cavity to an external environment and, following this, the air cavity exposes a MEMS element of the MEMS die to the external environment. The air cavity separating the MEMS die from the substrate is formed with a method of manufacturing that utilizes a thermally decomposable die attach material.

公开(公告)号：US11651952B2

公开(公告)日：2023-05-16

申请号：US17168393

申请日：2021-02-05

Applicant: Micron Technology, Inc.

Inventor： Michael T. Andreas ,  Jerome A. Imonigie ,  Prashant Raghu ,  Sanjeev Sapra ,  Ian K. McDaniel

IPC: H01L21/02 ,  B81C1/00

CPC classification number: H01L21/02057 ,  B81C1/00849 ,  H01L21/02118 ,  H01L21/02282 ,  H01L21/02334 ,  B81C2201/0108

Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.

公开(公告)号：US20180134548A1

公开(公告)日：2018-05-17

申请号：US15573280

申请日：2016-05-10

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Errong JING

IPC: B81C1/00 ,  G01J5/20

CPC classification number: B81C1/00182 ,  B81B7/02 ,  B81C1/00 ,  B81C1/00476 ,  B81C2201/0108 ,  B81C2201/0109 ,  B81C2201/0132 ,  G01J5/20

Abstract: An MEMS double-layer suspension microstructure manufacturing method, comprising: providing a substrate (100); forming a first dielectric layer (200) on the substrate (100); patterning the first dielectric layer (200) to prepare a first film body (210) and a cantilever beam (220) connected to the first film body (210); forming a sacrificial layer (300) on the first dielectric layer (200); patterning the sacrificial layer (300) located on the first film body (210) to make a recess portioned portion (310) for forming a support structure (420), with the first film body (210) being exposed at the bottom of the recess portioned portion (310); forming a second dielectric layer (400) on the sacrificial layer (300); patterning the second dielectric layer (400) to make the second film body (410) and the support structure (420), with the support structure (420) being connected to the first film body (210) and the second film body (410); and removing part of the substrate under the first film body (210) and removing the sacrificial layer (300) to obtain the MEMS double-layer suspension microstructure. In addition, an MEMS infrared detector is also disclosed.

公开(公告)号：US20180126375A1

公开(公告)日：2018-05-10

申请号：US15561905

申请日：2015-03-27

Applicant: WAGENINGEN UNIVERSITEIT

Inventor： Vittorio SAGGIOMO ,  Aldo Hendrikus VELDERS

IPC: B01L3/00 ,  B81C1/00 ,  B29C33/38

CPC classification number: B01L3/502707 ,  B01L2300/0874 ,  B29C33/3842 ,  B29C33/52 ,  B29K2083/00 ,  B29K2855/02 ,  B29L2031/756 ,  B33Y80/00 ,  B81C1/00119 ,  B81C2201/0108

Abstract: A method of manufacturing a microfluidic device, said method comprising placing a length of material in a liquid polymer, configuring the length of material to define the path of a microfluidic channel, curing or setting the polymer liquid to form a solid polymer around the configured length of material, and dissolving the configured length of material with a solvent to provide a microfluidic channel in the solid polymer.

公开(公告)号：US09890036B2

公开(公告)日：2018-02-13

申请号：US15429636

申请日：2017-02-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： John Charles Ehmke ,  Virgil Cotoco Ararao

IPC: H01L21/00 ,  H01L21/31 ,  H01L21/469 ,  B81B7/00 ,  B81C1/00 ,  G02B26/08 ,  G02B6/42 ,  G02B26/00 ,  B82Y30/00

CPC classification number: B81B7/0038 ,  B81B2203/0315 ,  B81C1/00269 ,  B81C1/00285 ,  B81C1/00293 ,  B81C2201/0108 ,  B81C2201/013 ,  B81C2201/0188 ,  B81C2201/0198 ,  B81C2201/053 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/035 ,  B82Y30/00 ,  G02B6/4204 ,  G02B6/4208 ,  G02B6/4248 ,  G02B26/001 ,  G02B26/0833 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/039 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05109 ,  H01L2224/05123 ,  H01L2224/05138 ,  H01L2224/05163 ,  H01L2224/05166 ,  H01L2224/0517 ,  H01L2224/05562 ,  H01L2224/27462 ,  H01L2224/2747 ,  H01L2224/279 ,  H01L2224/29006 ,  H01L2224/29011 ,  H01L2224/29023 ,  H01L2224/29109 ,  H01L2224/29144 ,  H01L2224/32058 ,  H01L2224/32227 ,  H01L2224/83121 ,  H01L2224/83193 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2224/94 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01074 ,  H01L2924/1461 ,  H01L2924/164 ,  H01L2924/00014 ,  H01L2924/01049 ,  H01L2224/03 ,  H01L2924/01042 ,  H01L2924/01072 ,  H01L2924/01004 ,  H01L2224/83 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03462

Abstract: In described examples, a hermetic package of a microelectromechanical system (MEMS) structure includes a substrate having a surface with a MEMS structure of a first height. The substrate is hermetically sealed to a cap forming a cavity over the MEMS structure. The cap is attached to the substrate surface by a vertical stack of metal layers adhering to the substrate surface and to the cap. The stack has a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance. The stack has: a first bottom metal seed film adhering to the substrate and a second bottom metal seed film adhering to the first bottom metal seed film; and a first top metal seed film adhering to the cap and a second top metal seed film adhering to the first top metal seed film.

公开(公告)号：US20140296380A1

公开(公告)日：2014-10-02

申请号：US14305767

申请日：2014-06-16

Applicant: SHIN-ETSU CHEMICAL CO., LTD.

Inventor： Hideto KATO ,  Hiroshi KANBARA ,  Tomoyoshi FURIHATA ,  Yoshinori HIRANO

IPC: C09D163/04

CPC classification number: C09D163/04 ,  B81C1/00619 ,  B81C2201/0108 ,  G03F7/0226 ,  G03F7/0236 ,  G03F7/30 ,  G03F7/40 ,  G03F7/70466

Abstract: A micro-structure is manufactured by patterning a sacrificial film, forming an inorganic material film on the pattern, providing the inorganic material film with an aperture, and etching away the sacrificial film pattern through the aperture to define a space having the contour of the pattern. The patterning stage includes the steps of (A) forming a sacrificial film using a composition comprising a cresol novolac resin and a crosslinker, (B) exposing patternwise the film to first high-energy radiation, (C) developing, and (D) exposing the sacrificial film pattern to second high-energy radiation and heat treating for thereby forming crosslinks within the cresol novolac resin.

Abstract translation: 通过图案化牺牲膜来制造微结构，在图案上形成无机材料膜，为无机材料膜提供孔，并通过孔蚀刻掉牺牲膜图案，以限定具有图案轮廓的空间 。 图案化阶段包括以下步骤：（A）使用包含甲酚酚醛清漆树脂和交联剂的组合物形成牺牲膜，（B）将膜图案化为第一高能辐射，（C）显影，和（D）曝光 牺牲膜图案到第二高能量辐射和热处理，从而在甲酚酚醛清漆树脂内形成交联。

公开(公告)号：US20130095638A1

公开(公告)日：2013-04-18

申请号：US13653285

申请日：2012-10-16

Applicant: Andrew Leon Vella ,  David McLeod Johnstone ,  Kia Silverbrook

Inventor： Andrew Leon Vella ,  David McLeod Johnstone ,  Kia Silverbrook

IPC: H01L21/306

CPC classification number: H01L21/306 ,  B41J2/1601 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1639 ,  B41J2/1642 ,  B41J2/1645 ,  B81B2201/052 ,  B81C1/00476 ,  B81C2201/0108

Abstract: A method of fabricating integrated circuits is provided in which sacrificial material is provided on a first surface of a substrate to define structural elements, integrated circuit material is provided on the sacrificial material to provide integrated circuit structures as defined by the structural elements, the sacrificial material is removed from the first surface of the substrate to provide partially fabricated integrated circuits defined by the integrated circuit structures, a carrier handle is attached to the partially fabricated integrated circuits, and the substrate is thinned from a second surface of the substrate opposite the first surface to provide the fabricated integrated circuits.

Abstract translation: 提供一种制造集成电路的方法，其中牺牲材料设置在基板的第一表面上以限定结构元件，在牺牲材料上提供集成电路材料，以提供由结构元件限定的集成电路结构，牺牲材料 从衬底的第一表面移除以提供由集成电路结构限定的部分制造的集成电路，载体手柄附接到部分制造的集成电路，并且衬底从衬底的与第一表面相对的第二表面变薄 提供制造的集成电路。

公开(公告)号：US20130032453A1

公开(公告)日：2013-02-07

申请号：US13565693

申请日：2012-08-02

Applicant: Brian I. Troy ,  Mickael Renault ,  Thomas L. Maguire ,  Joseph Damian Gordon Lacey ,  James F. Bobey

Inventor： Brian I. Troy ,  Mickael Renault ,  Thomas L. Maguire ,  Joseph Damian Gordon Lacey ,  James F. Bobey

IPC: H01H59/00 ,  H01H65/00

CPC classification number: B81C1/00484 ,  B81B3/0008 ,  B81B2201/014 ,  B81B2201/018 ,  B81B2203/0118 ,  B81C2201/0108 ,  H01H1/0036 ,  H01H2001/0089

Abstract: The present invention generally relates to a MEMS device in which silicon residues from the adhesion promoter material are reduced or even eliminated from the cavity floor. The adhesion promoter is typically used to adhere sacrificial material to material above the substrate. The adhesion promoter is the removed along with then sacrificial material. However, the adhesion promoter leaves silicon based residues within the cavity upon removal. The inventors have discovered that the adhesion promoter can be removed from the cavity area prior to depositing the sacrificial material. The adhesion promoter which remains over the remainder of the substrate is sufficient to adhere the sacrificial material to the substrate without fear of the sacrificial material delaminating. Because no adhesion promoter is used in the cavity area of the device, no silicon residues will be present within the cavity after the switching element of the MEMS device is freed.

Abstract translation: 本发明一般涉及一种MEMS器件，其中来自粘合促进剂材料的硅残余物从空腔底板减少甚至消除。 粘合促进剂通常用于将牺牲材料粘附到衬底上方的材料上。 粘附促进剂与牺牲材料一起被去除。 然而，粘合促进剂在去除时将硅基残留物留在空腔内。 发明人已经发现，在沉积牺牲材料之前，可以从空腔区域去除粘合促进剂。 保留在基材的其余部分上的粘合促进剂足以将牺牲材料粘附到基材上，而不用担心牺牲材料分层。 因为在器件的空腔区域中没有使用粘合促进剂，所以在MEMS器件的开关元件被释放之后，腔内将不存在硅残余物。

公开(公告)号：US08211751B2

公开(公告)日：2012-07-03

申请号：US12810279

申请日：2008-12-12

Applicant: Satoshi Yamamoto ,  Hirokazu Hashimoto

Inventor： Satoshi Yamamoto ,  Hirokazu Hashimoto

IPC: H01L21/50

CPC classification number: B81C1/00317 ,  B81C2201/0104 ,  B81C2201/0108 ,  B81C2201/0125 ,  B81C2203/0118 ,  B81C2203/0145 ,  H01L27/14618 ,  H01L27/14627 ,  H01L27/14683 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device includes: a bonding step of bonding a first substrate with optical transparency and a second substrate having a surface on which a functional element is provided to each other such that the functional element faces the first substrate; a thinning step of thinning at least one of the first and second substrates; and a through-hole forming step of forming a cavity and a through-hole communicated with the cavity in at least part of a bonding portion between the first and second substrates. According to the present invention, it is possible to prevent irregularities or cracks caused by the presence or absence of the cavity and more regularly thin the substrate. In addition, it is possible to manufacture a semiconductor device capable of contributing to the miniaturization of devices and electronic equipment having the devices, using a more convenient process.

Abstract translation: 一种制造半导体器件的方法包括：将具有光学透明性的第一衬底和第二衬底接合的接合步骤，其中功能元件彼此设置在其上，使得功能元件面向第一衬底; 减薄所述第一和第二基板中的至少一个的薄化步骤; 以及通孔形成步骤，在第一和第二基板之间的接合部分的至少一部分中形成与空腔连通的空腔和通孔。 根据本发明，可以防止由于空腔的存在或不存在引起的不规则或裂纹，并且更规则地使基板变薄。 此外，可以使用更方便的工艺来制造能够有助于具有该器件的器件和电子设备的小型化的半导体器件。

公开(公告)号：US20120043649A1

公开(公告)日：2012-02-23

申请号：US13202951

申请日：2010-02-24

Applicant: Abdennour Abbas ,  Didier Guillochon ,  Bertrand Bocquet ,  Philippe Supiot

Inventor： Abdennour Abbas ,  Didier Guillochon ,  Bertrand Bocquet ,  Philippe Supiot

IPC: H01L21/02 ,  H01L29/02

CPC classification number: B81C1/00071 ,  B81B2201/0214 ,  B81B2201/058 ,  B81B2203/0338 ,  B81C2201/0108 ,  B81C2201/018

Abstract: The present invention relates to a process for fabricating microchannels on a substrate and to a substrate comprising these microchannels, the invention being especially applicable to the fabrication of microstructured substrates for microelectronic, microfluidic and/or micromechanical systems.The process includes a step (a) of producing at least one or at least two patterns 2 on the surface of a bottom layer 1 and a step (b) of depositing, on top of the bottom layer and the pattern or patterns, a layer 3 of polymer material obtained by polymerizing an organic or organometallic monomer that contains siloxane functional groups, for example tetramethyldisiloxane, in a plasma-enhanced, optionally remote plasma-enhanced, chemical vapor deposition reactor (PECVD or optionally RPECVD) reactor.The layer of polymer material is deposited so as to create, in place of the pattern and after development by decomposing this pattern, or between the two patterns without development/decomposition, a channel 4a, 4b, 4c, 4d closed over at least part of its length.

Abstract translation: 本发明涉及一种用于在衬底上制造微通道的方法以及包括这些微通道的衬底，本发明特别适用于微电子，微流体和/或微机械系统的微结构化衬底的制造。 该方法包括在底层1的表面上产生至少一个或至少两个图案2的步骤（a）和在底层和图案或图案的顶部上沉积层（b）的步骤 通过聚合含有硅氧烷官能团的有机或有机金属单体（例如四甲基二硅氧烷）在等离子体增强的，任选地远程等离子体增强的化学气相沉积反应器（PECVD或任选的RPECVD）反应器中获得的聚合物材料3。 沉积聚合物材料层，以通过分解该图案或在两个图案之间或不在显影/分解下产生代替图案和显影之后，通道4a，4b，4c，4d在至少部分 它的长度。