公开(公告)号：US20070104944A1

公开(公告)日：2007-05-10

申请号：US11506617

申请日：2006-08-17

Applicant: Lucien Laude ,  Robert Greenberg

Inventor： Lucien Laude ,  Robert Greenberg

IPC: B32B27/20 ,  C08L83/04 ,  B05D1/38

CPC classification number: H05K3/185 ,  C08J7/12 ,  C08J2383/04 ,  C23C18/1608 ,  C23C18/1612 ,  C23C18/1657 ,  C23C18/204 ,  C23C18/206 ,  H05K3/28 ,  H05K3/387 ,  H05K2201/0133 ,  H05K2201/0162 ,  H05K2201/0209 ,  H05K2201/0236 ,  H05K2203/107 ,  H05K2203/1105 ,  Y10T428/26 ,  Y10T428/31663

Abstract: The present invention provides a process for embedding at least one layer of at least one metal trace in a silicone-containing polymer, comprising: a) applying a polymer layer on a substrate; b) thermally treating the polymer; c) irradiating at least one surface area of the polymer with a light beam emitted by an excimer laser; d) immersing the irradiated polymer in at least one autocatalytic bath containing ions of at least one metal, and metallizing the polymer; e) thermally treating the metallized polymer; f) applying a polymer layer covering the thermally treated metallized polymer; and g) thermally treating the metallized covered polymer. The present invention further provides a polymer layer comprising silicone containing oxide particles of SiO2, TiO2, Sb2O3, SnO2, Al2O3, ZnO, Fe2O3, Fe3O4, talc, hydroxyapatite or mixtures thereof and at least one metal trace embedded in said polymer layer. The present invention further provides a flexible electrode array comprising silicone containing oxide particles of SiO2, TiO2, Sb2O3, SnO2, A1203, ZnO, Fe2O3, Fe3O4, talc, hydroxyapatite or mixtures thereof and at least one metal trace embedded in said polymer layer.

Abstract translation: 本发明提供了一种在含硅酮聚合物中嵌入至少一层至少一种金属痕迹的方法，包括：a）在基底上施加聚合物层; b）热处理聚合物; c）用由准分子激光器发射的光束照射所述聚合物的至少一个表面积; d）将经辐射的聚合物浸入至少一种含有至少一种金属的离子的自催化浴中，并对该聚合物进行金属化; e）热处理金属化聚合物; f）涂覆覆盖热处理的金属化聚合物的聚合物层; 和g）热处理金属化被覆聚合物。 本发明还提供一种聚合物层，其包含含硅氧烷的SiO 2，TiO 2，Sb 2 O 3， N 2，N 2 O 3，N 2，N 2 O 3， Fe 3 O 3，滑石，羟基磷灰石或其混合物，以及嵌入所述聚合物层中的至少一种金属迹线。 本发明还提供了一种柔性电极阵列，其包括含硅氧烷的SiO 2，TiO 2，Sb 2 O 3， / SUB>，SnO 2，Al 2 O 3，ZnO，Fe 2 O 3， Fe 3 O 3，滑石，羟基磷灰石或其混合物，以及嵌入所述聚合物层中的至少一种金属迹线。

公开(公告)号：US20040018131A1

公开(公告)日：2004-01-29

申请号：US10450048

申请日：2003-06-10

Inventor： Shinya Izumida ,  Koji Itoh ,  Minoru Oyama ,  Atsushi Suuki

IPC: C22B011/00 ,  C01G055/00

CPC classification number: H05K3/387 ,  C08K5/0025 ,  C08K5/0091 ,  C09D179/08 ,  C23C18/1608 ,  C23C18/1612 ,  C23C18/2033 ,  C23C18/30 ,  H05K1/0346 ,  H05K3/181 ,  H05K3/185 ,  H05K3/386 ,  H05K2201/0154 ,  H05K2201/0236 ,  H05K2203/0709 ,  C08L79/04 ,  C08L79/08

Abstract: Laminates for electronic components are produced by applying a polyimide resin precursor solution containing a palladium compound on a polyimide substrate, drying the resulting coating to form a polyimide resin precursor layer, irradiating this layer with ultraviolet rays in the presence of a hydrogen donor to form nuclei for primer plating, forming a metal primer layer by electroless plating, and converting the polyimide resin precursor layer into a polyimide resin layer through imidation by heating either after or before the formation of a surface plating layer. The invention provides laminates for electronic components which are extremely improved in adhesion to metal layers without impairing the characteristics inherent in the substrate and are excellent in insulating properties, and polyimide resin precursor resin solution to be used in the production of the laminates.

Abstract translation: 电子部件用层叠体通过在聚酰亚胺基板上涂布含有钯化合物的聚酰亚胺树脂前体溶液进行干燥而形成聚酰亚胺树脂前体层，在氢供体存在下照射紫外线，形成核 用于底漆电镀，通过无电解电镀形成金属底漆层，并且在形成表面镀层之后或之后通过加热将聚酰亚胺树脂前体层转化成聚酰亚胺树脂层。 本发明提供了电子部件的层叠体，其极大地改善了与金属层的粘附性，而不损害基板固有的特性，绝缘性能优异，并且用于制造层压体的聚酰亚胺树脂前体树脂溶液。

公开(公告)号：US06661642B2

公开(公告)日：2003-12-09

申请号：US10268433

申请日：2002-10-10

Applicant: Craig S. Allen ,  Maria Anna Rzeznik ,  S. Matthew Cairns

Inventor： Craig S. Allen ,  Maria Anna Rzeznik ,  S. Matthew Cairns

IPC: H01G420

CPC classification number: H05K1/162 ,  H01G4/06 ,  H01L21/2885 ,  H01L28/56 ,  H01L28/60 ,  H05K3/181 ,  H05K2201/0195 ,  H05K2201/0236 ,  H05K2201/09309

Abstract: Multilayer dielectric structures particularly suitable for use in capacitors and having a plating dopant in an amount sufficient to promote plating of a conductive layer are provided, together with methods of forming such structures. Such dielectric structures show increased adhesion of subsequently applied conductive layers.

Abstract translation: 提供特别适用于电容器并具有足以促进导电层镀覆的电镀掺杂剂的多层电介质结构，以及形成这种结构的方法。 这种介电结构显示随后施加的导电层的附着力增加。

公开(公告)号：US5856068A

公开(公告)日：1999-01-05

申请号：US850791

申请日：1997-05-02

Applicant: Yaroslaw Antin Magera ,  Everett Furber Simons

Inventor： Yaroslaw Antin Magera ,  Everett Furber Simons

IPC: H05K3/00 ,  H05K3/18 ,  H05K3/46 ,  G03F7/26

CPC classification number: H05K3/184 ,  H05K3/4661 ,  H05K2201/0236 ,  H05K2203/074 ,  H05K2203/1105 ,  H05K2203/1157 ,  H05K2203/125 ,  H05K3/0023

Abstract: A process for fabricating a multilayer printed circuit board, in which interlayer adhesion of the layers is greatly enhanced by curing under superatmospheric pressure. The method generally includes depositing a first resin layer (12) onto a substrate (10), which is then patterned so as to cross-link a preselected portion of the resin layer (12). A second resin layer (18) is then deposited over the first resin layer (12), and then patterned to cross-link a portion thereof. Openings in the first and second resins are developed by removing those portions of the resins that were not cross-linked during patterning. Openings (26) in the second resin layer (18) provide access to the first resin layer (12) by subsequent chemical processes. The portions of the first (12) and second (18) resin layers cross-linked during patterning remain on the substrate (10) to form permanent dielectric layers. The first resin layer (12) preferably includes a filler catalytic to plating, thereby enabling direct plating of the first resin layer (12) to form metal features within the multilayer structure. The process yields a multilayer printed circuit board that exhibits increased interlayer adhesion subsequent to plating caused by curing the first and second resin under superatmospheric pressure.

Abstract translation: 一种制造多层印刷电路板的方法，其中通过在超大气压下固化来大大提高层的层间粘合。 该方法通常包括将第一树脂层（12）沉积到衬底（10）上，然后将其图案化以交联树脂层（12）的预选部分。 然后在第一树脂层（12）上沉积第二树脂层（18），然后将其图案化以交叉其一部分。 第一和第二树脂中的开口通过去除在图案化期间未交联的那些部分树脂来开发。 第二树脂层（18）中的开口（26）通过后续的化学处理提供对第一树脂层（12）的通路。 在图案化期间交联的第一（12）和第二（18）树脂层的部分保留在基板（10）上以形成永久电介质层。 第一树脂层（12）优选包括催化镀层的填料，从而能够直接电镀第一树脂层（12）以在多层结构内形成金属特征。 该方法产生多层印刷电路板，其在超大气压下通过固化第一和第二树脂而在电镀之后表现出增加的层间粘附。

公开(公告)号：US5485038A

公开(公告)日：1996-01-16

申请号：US305492

申请日：1994-09-12

Applicant: James J. Licari ,  Deborah J. Smith

Inventor： James J. Licari ,  Deborah J. Smith

IPC: H01L21/48 ,  H01L23/498 ,  H01L23/538 ,  H05K1/03 ,  H05K3/00 ,  H05K3/18 ,  H05K3/42 ,  H05K3/46 ,  H01L23/48

CPC classification number: H05K3/4661 ,  H01L21/481 ,  H01L21/4846 ,  H01L23/49894 ,  H01L23/538 ,  H05K3/422 ,  H05K3/4605 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K2201/0236 ,  H05K2201/096 ,  H05K2203/0733 ,  H05K3/0023 ,  H05K3/184 ,  H05K3/465

Abstract: A High-Density-Multi-Chip (HDMI) substrate structure (10) includes alternating conductor metallization (24,28,36,54,56) and insulating dielectric layers (14,38). The dielectric layers (14,38) are formed by curtain coating of ultraviolet photoimageable epoxy material, and the metallization (24,28,36,54,56) is formed by electroless plating or sputtering of copper. The dielectric layers (14,38) are photoimaged and developed to form via holes (16,40,44), and vias (18,42,46) are formed in the holes (16,40,44) by electroless copper plating. The metallization (24,28,36,54,56) can be formed in the same manner as the dielectric layers (14,38), or can alternatively be formed by subtractive photolithography using photoresist masks.

Abstract translation: 高密度多芯片（HDMI）衬底结构（10）包括交替的导体金属化（24,28,36,54,56）和绝缘电介质层（14,38）。 电介质层（14,38）通过紫外可光成像环氧树脂材料的帘式涂布形成，金属化（24,28,36,54,56）通过铜的无电镀或溅射形成。 电介质层（14,38）被光刻和显影以形成通孔（16,40,44），并且通过无电镀铜在孔（16,40,44）中形成通孔（18,42,46）。 金属化（24,28,36,54,56）可以以与电介质层（14,38）相同的方式形成，或者可以通过使用光致抗蚀剂掩模的减色法来形成。

公开(公告)号：US3948701A

公开(公告)日：1976-04-06

申请号：US511493

申请日：1974-10-02

Applicant: Helmut Fasbender ,  Horst Hirschfeld

Inventor： Helmut Fasbender ,  Horst Hirschfeld

IPC: H01B3/00 ,  H05K3/00 ,  H05K3/18 ,  H05K3/38 ,  H05K3/42 ,  C23F1/00 ,  B32B31/22 ,  H05K1/00

CPC classification number: H01B3/002 ,  H05K3/184 ,  H05K3/387 ,  H05K2201/0133 ,  H05K2201/0236 ,  H05K2201/2081 ,  H05K2203/066 ,  H05K2203/1152 ,  H05K2203/1388 ,  H05K3/0047 ,  H05K3/181 ,  H05K3/426 ,  Y10S428/901 ,  Y10T156/1057 ,  Y10T428/31688 ,  Y10T428/31699

Abstract: In a process for making a printed circuit, a method of forming a base for the circuit, including coating a cover foil with a decomposable film, then bonding the film to a carrier, and then removing the cover foil from the film.A protected base useful for making printed circuits, comprising a synthetic-resin-based carrier, a decomposable adhesive film bonded to the carrier, and a removable cover foil bonded to the film, the adhesive film containing catalyst effective for the electroless deposition of metal conductors.

Abstract translation: 在制造印刷电路的方法中，形成电路基底的方法，包括用可分解膜涂覆覆盖箔，然后将膜粘合到载体上，然后从膜上除去覆盖箔。

公开(公告)号：US3672986A

公开(公告)日：1972-06-27

申请号：US3672986D

申请日：1969-12-19

Applicant: DAY CO NV

Inventor： SCHNEBLE FREDERICK W JR ,  MCCORMACK JOHN F ,  ZEBLISKY RUDOLPH J ,  WILLIAMSON JOHN DUFF ,  POLICHETTE JOSEPH

IPC: H05K1/03 ,  H05K3/10 ,  H05K3/18 ,  H05K3/28 ,  H05K3/42 ,  H05K3/46 ,  H05K3/06

CPC classification number: H05K3/427 ,  H05K1/036 ,  H05K1/0373 ,  H05K3/108 ,  H05K3/181 ,  H05K3/184 ,  H05K3/28 ,  H05K3/428 ,  H05K3/4661 ,  H05K2201/0236 ,  H05K2201/09581 ,  H05K2203/1383 ,  Y10T428/24339 ,  Y10T428/24917 ,  Y10T428/265

Abstract: A BLANK FOR THE PRODUCTION OF METALLIZED ARTICLES IS PROVIDED, WHICH COMPRISES AN INSULATING BASE WHICH IS CATALYTIC THROUGHOUT ITS INTERIOR TO THE RECEPTION OF ELECTROLESS METAL, AND A SURFACE ON SAID BASE HAVING SUPER-IMPOSED THEREON AND ADHERED THERETO A UNITARY THIN FILM OF METAL. IN ADDITION, METHODS FOR METALLIZING PLASTICS AND FORMING PLATED THROUGH HOLE PRINTED CIRCUIT BOARDS ARE ALSO PROVIDED.

公开(公告)号：US3171756A

公开(公告)日：1965-03-02

申请号：US10773661

申请日：1961-05-04

Applicant: IBM

Inventor： MARSHALI JOHN H

IPC: C23C18/16 ,  C23C18/28 ,  D21H11/20 ,  D21H19/02 ,  H05K1/03 ,  H05K3/18 ,  H05K3/42

CPC classification number: D21H11/20 ,  C23C18/1603 ,  C23C18/1605 ,  C23C18/1641 ,  C23C18/1689 ,  C23C18/28 ,  D21H19/02 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/181 ,  H05K3/422 ,  H05K2201/0236 ,  Y10T428/24322 ,  Y10T428/24917 ,  Y10T428/31678

公开(公告)号：US09896566B2

公开(公告)日：2018-02-20

申请号：US14753055

申请日：2015-06-29

Applicant: Ticona LLC

Inventor： Paul C. Yung ,  Michael Schaefer

IPC: C08K3/10 ,  C08K3/34 ,  C08K7/10 ,  H05K1/03 ,  C08K3/32 ,  C08K3/40 ,  C08K3/30 ,  H05K1/16 ,  H05K3/10 ,  H05K3/18

CPC classification number: C08K3/10 ,  C08G63/605 ,  C08K3/22 ,  C08K3/30 ,  C08K3/32 ,  C08K3/34 ,  C08K3/40 ,  C08K7/10 ,  C08K2003/2248 ,  C08K2003/2251 ,  C08K2003/3045 ,  C08K2003/325 ,  C08K2201/005 ,  C08L67/03 ,  H05K1/0366 ,  H05K1/0373 ,  H05K1/165 ,  H05K3/105 ,  H05K3/106 ,  H05K3/185 ,  H05K2201/0141 ,  H05K2201/0145 ,  H05K2201/0209 ,  H05K2201/0236 ,  H05K2201/0266 ,  H05K2201/10098 ,  H05K2203/107 ,  C08L67/00

Abstract: A polymer composition that comprises an aromatic polyester, a laser activatable additive, and a mineral filler is provided. The mineral filler has a median size of about 35 micrometers or less and the laser activatable additive has a mean size of about 1000 nanometers or less.

公开(公告)号：US09869025B2

公开(公告)日：2018-01-16

申请号：US14943861

申请日：2015-11-17

Applicant: BYD COMPANY LIMITED

Inventor： Qing Gong ,  Wei Zhou ,  Weifeng Miao

IPC: C23C18/38 ,  C01G19/02 ,  C01G31/00 ,  C08K3/22 ,  C09D11/03 ,  C23C18/16 ,  H05K1/03 ,  H05K3/10 ,  H05K3/18 ,  C23C18/20 ,  B29C37/00 ,  C23C18/28 ,  C01G19/00 ,  C01G30/00 ,  C01G39/00 ,  B29C35/08

CPC classification number: C23C18/1608 ,  B29C37/0025 ,  B29C2035/0838 ,  B29C2035/0872 ,  B29C2035/0877 ,  C01G19/006 ,  C01G19/02 ,  C01G30/002 ,  C01G31/00 ,  C01G39/00 ,  C01P2002/50 ,  C01P2002/52 ,  C01P2004/61 ,  C01P2004/62 ,  C01P2004/64 ,  C08K3/22 ,  C08K2003/2231 ,  C08K2003/2255 ,  C09D11/03 ,  C23C18/1612 ,  C23C18/1641 ,  C23C18/204 ,  C23C18/285 ,  C23C18/38 ,  H05K1/0373 ,  H05K3/107 ,  H05K3/185 ,  H05K2201/0215 ,  H05K2201/0218 ,  H05K2201/0236 ,  H05K2203/107

Abstract: Embodiments of the present disclosure are directed to a doped tin oxide. The doped tin oxide includes a tin oxide and at least one oxide of a doping element. The doping element includes at least one of vanadium and molybdenum. The doped tin oxide includes an amount of the tin oxide ranging from 90 mol % to 99 mol %, and an amount of the at least one oxide ranging from 1 mol % to 10 mol %.