公开(公告)号：US09499912B2

公开(公告)日：2016-11-22

申请号：US14287075

申请日：2014-05-26

Applicant: Rohm and Haas Electronic Materials LLC

Inventor： Julia Kozhukh ,  Zuhra I. Niazimbetova ,  Kristen M. Milum

IPC: H05K3/42 ,  C23C18/31 ,  H05K3/18 ,  H05K1/03 ,  C09D183/14 ,  C09D183/08 ,  C08G77/388 ,  C08L83/08 ,  G03F7/075 ,  C23C18/18

CPC classification number: C23C18/31 ,  C08G77/388 ,  C08L83/08 ,  C09D183/08 ,  C09D183/14 ,  C23C18/18 ,  G03F7/0751 ,  H05K1/03 ,  H05K3/181 ,  H05K3/422 ,  H05K3/427 ,  H05K2201/09581

Abstract: Copolymers of diglycidyl ether terminated polysiloxane compounds and non-aromatic polyamines are used in the preparation of dielectric materials for electroless metal plating. The copolymers may be used in the manufacture of printed circuit boards such as in cleaning and conditioning through-holes prior to electroless metallization.

Abstract translation: 二缩水甘油醚封端的聚硅氧烷化合物和非芳族多胺的共聚物用于无电镀金属电介质材料的制备。 共聚物可用于制造印刷电路板，例如在无电镀金属化之前的清洁和调节通孔中。

公开(公告)号：US20160336223A1

公开(公告)日：2016-11-17

申请号：US15220143

申请日：2016-07-26

Applicant: Intel Corporation

Inventor： Harold Ryan Chase ,  Mihir K. Roy ,  Mathew J. Manusharow ,  Mark Hlad

IPC: H01L21/768 ,  H01L23/36 ,  H01L21/288

CPC classification number: H01L21/76879 ,  H01L21/288 ,  H01L21/76838 ,  H01L23/00 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/552 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H05K1/0219 ,  H05K1/0222 ,  H05K3/4602 ,  H05K2201/09581 ,  H01L2924/014

Abstract: Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.

公开(公告)号：US20150357699A1

公开(公告)日：2015-12-10

申请号：US14762440

申请日：2014-01-27

Applicant: HITACHI CHEMICAL COMPANY, LTD.

Inventor： Hiroyuki YAMAGUCHI ,  Hajime NAKAYAMA ,  Haruo OGINO ,  Seiichi KURIHARA

IPC: H01P5/08 ,  B23K26/36 ,  H01P11/00 ,  H01P3/08 ,  H01P3/06

CPC classification number: H01P5/085 ,  H01P3/06 ,  H01P3/08 ,  H01P11/003 ,  H01P11/005 ,  H05K1/0237 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/09509 ,  H05K2201/09581 ,  H05K2201/09809 ,  H05K2201/10287 ,  H05K2201/10356 ,  Y10T29/49167

Abstract: A multilayer wiring plate includes a coaxial wire includes a signal line, an insulation coating and an outer peripheral conductor. An insulating layer is arranged on an inner or outer layer side. A metal film circuit is arranged by the intermediary of the insulating layer, and the metal film circuit and the outer peripheral conductor and signal line of the coaxial wire are connected. A signal line connection part that connects the signal line to the metal film circuit includes a penetration hole A that passes through the insulating layer and the outer peripheral conductor; the coaxial wire from which the outer peripheral conductor is removed inside the penetration hole A; a hole filling resin filled inside the penetration hole A; a penetration hole B that passes through the hole filling resin and the signal line; and a plated layer arranged on an inner wall of the penetration hole B.

Abstract translation: 多层布线板包括同轴线，其包括信号线，绝缘涂层和外周导体。 绝缘层设置在内层或外层一侧。 金属膜电路通过绝缘层中间布置，金属膜电路和同轴线的外周导体和信号线连接。 将信号线连接到金属膜电路的信号线连接部分包括穿过绝缘层和外周导体的穿透孔A; 在穿透孔A内除去外周导体的同轴线; 填充在穿透孔A内的孔填充树脂; 穿过孔填充树脂和信号线的穿透孔B; 以及布置在穿透孔B的内壁上的镀层。

公开(公告)号：US20150230342A1

公开(公告)日：2015-08-13

申请号：US14244299

申请日：2014-04-03

Applicant: Apple Inc.

Inventor： Jun Chung Hsu ,  Jun Zhai

IPC: H05K3/00 ,  H05K1/11 ,  H05K1/03

CPC classification number: H05K1/115 ,  H01L23/145 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/029 ,  H05K2201/09581 ,  Y10T29/49124 ,  H01L2924/00

Abstract: In some embodiments, a carrier substrate for an integrated circuit may include a core, a first plurality of openings, and a first insulating material. The core may include a first surface and a second surface substantially opposing the first surface. The first plurality of openings may extend from the first surface to the second surface of the core. In some embodiments, the first insulating material may be applied to a surface of the first plurality of openings. In some embodiments, the first plurality of openings may include a first conductor extending through each of the first plurality of openings from the first surface to the second surface. In some embodiments, at least a first subset of the first plurality of openings may include a first charge and at least a second subset of the first plurality of openings may include a second charge. The first charge and the second charge may be different.

Abstract translation: 在一些实施例中，用于集成电路的载体衬底可以包括芯，第一多个开口和第一绝缘材料。 芯可以包括基本上与第一表面相对的第一表面和第二表面。 第一多个开口可以从芯的第一表面延伸到第二表面。 在一些实施例中，第一绝缘材料可以施加到第一多个开口的表面。 在一些实施例中，第一多个开口可以包括延伸穿过第一多个开口中的每一个从第一表面到第二表面的第一导体。 在一些实施例中，第一多个开口的至少第一子集可以包括第一电荷，并且第一多个开口的至少第二子集可以包括第二电荷。 第一次充电和第二次充电可能不同。

公开(公告)号：US08872334B2

公开(公告)日：2014-10-28

申请号：US13636324

申请日：2011-03-22

Applicant: Shintaro Yamamichi ,  Katsumi Kikuchi ,  Yoshiki Nakashima ,  Kentaro Mori

Inventor： Shintaro Yamamichi ,  Katsumi Kikuchi ,  Yoshiki Nakashima ,  Kentaro Mori

IPC: H01L23/48 ,  H01L23/538 ,  H05K3/46 ,  H05K1/18 ,  H01L23/00 ,  H01L23/66 ,  H01L23/498

CPC classification number: H05K1/185 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5389 ,  H01L23/66 ,  H01L24/18 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/18 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3511 ,  H05K3/4605 ,  H05K2201/09581 ,  H05K2201/10674 ,  H05K2203/1469 ,  H01L2924/00

Abstract: In a manufacturing method of a semiconductor device incorporating a semiconductor element in a multilayered wiring structure including a plurality of wiring layers and insulating layers, a semiconductor element is mounted on a silicon support body whose thickness is reduced to a desired thickness and which are equipped with a plurality of through-vias running through in the thickness direction; an insulating layer is formed to embed the semiconductor element; then, a plurality of wiring layers is formed on the opposite surfaces of the silicon support body in connection with the semiconductor element. Thus, it is possible to reduce warping which occurs in proximity to the semiconductor element in manufacturing, thus improving a warping profile in the entirety of a semiconductor device. Additionally, it is possible to prevent semiconductor elements from becoming useless, improve a yield rate, and produce a thin-type semiconductor device with high-density packaging property.

Abstract translation: 在包括多个布线层和绝缘层的多层布线结构中的包含半导体元件的半导体器件的制造方法中，将半导体元件安装在硅支撑体上，该硅支撑体的厚度减小到期望的厚度并且配备有 多个穿过厚度方向的通孔; 形成绝缘层以嵌入半导体元件; 那么在与硅半导体元件相连的硅支撑体的相对表面上形成多个布线层。 因此，可以减少在制造中在半导体元件附近发生的翘曲，从而改善整个半导体器件的翘曲轮廓。 此外，可以防止半导体元件变得无用，提高成品率，并且可以生产具有高密度封装性能的薄型半导体器件。

公开(公告)号：US08704101B2

公开(公告)日：2014-04-22

申请号：US13539505

申请日：2012-07-02

Applicant: Shih-Hao Sun

Inventor： Shih-Hao Sun

IPC: H05K1/00 ,  H05K1/11 ,  H05K1/18

CPC classification number: H01L23/3677 ,  H01L23/3121 ,  H01L23/5383 ,  H01L23/5389 ,  H01L25/16 ,  H01L25/167 ,  H01L33/64 ,  H01L2224/48091 ,  H01L2224/48228 ,  H01L2924/181 ,  H05K1/0204 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09581 ,  H05K2201/10416 ,  H05K2203/1469 ,  Y10T29/49139 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: In a manufacturing method of a package carrier, a substrate having an upper surface, a lower surface, and an opening communicating the two surfaces is provided. An electronic device is disposed inside the opening. A first insulation layer and a superimposed first metal layer are laminated on the upper surface; a second insulation layer and a superimposed second metal layer are laminated on the lower surface. The opening is filled with the first and second insulation layers. First blind holes, second blind holes, and a heat-dissipation channel are formed. A third metal layer is formed on the first and second blind holes and an inner wall of the heat-dissipation channel. A heat-conducting device is disposed inside the heat-dissipation channel and fixed into the heat-dissipation channel via an insulation material. The first and second metal layers are patterned to form a first patterned metal layer and a second patterned metal layer.

Abstract translation: 在包装载体的制造方法中，提供具有上表面，下表面和连通两个表面的开口的基板。 电子设备设置在开口内。 第一绝缘层和叠置的第一金属层层叠在上表面上; 第二绝缘层和叠加的第二金属层层叠在下表面上。 开口填充有第一和第二绝缘层。 形成第一盲孔，第二盲孔和散热通道。 在第一和第二盲孔和散热通道的内壁上形成第三金属层。 导热装置设置在散热通道的内部并通过绝缘材料固定到散热通道中。 图案化第一和第二金属层以形成第一图案化金属层和第二图案化金属层。

公开(公告)号：US20130341772A1

公开(公告)日：2013-12-26

申请号：US13533655

申请日：2012-06-26

Applicant: Harold Ryan Chase ,  Mihir K. Rov ,  Mathew J. Manusharow ,  Mark Hlad

Inventor： Harold Ryan Chase ,  Mihir K. Rov ,  Mathew J. Manusharow ,  Mark Hlad

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L21/76879 ,  H01L21/288 ,  H01L21/76838 ,  H01L23/00 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/552 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H05K1/0219 ,  H05K1/0222 ,  H05K3/4602 ,  H05K2201/09581 ,  H01L2924/014

Abstract: Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.

Abstract translation: 示出了基板，半导体器件和方法的实施例，其包括用于改善传导的细长结构。 还示出了延伸的结构和方法，其提供电磁隔离以减少相邻部件中的噪声。

公开(公告)号：US20130328214A1

公开(公告)日：2013-12-12

申请号：US13966633

申请日：2013-08-14

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Takamasa Takano

IPC: H01L23/48

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/1579 ,  H05K1/113 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09436 ,  H05K2201/09581 ,  H05K2201/09609 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1178 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49165 ,  H01L2224/05647 ,  H01L2924/01024 ,  H01L2924/01079

Abstract: A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.

Abstract translation: 一种制造通孔电极基板的方法包括在基板上形成多个通孔，通过在多个通孔中填充导电材料形成多个通孔电极，在一个通孔上形成第一绝缘层 在所述第一绝缘层上形成多个第一开口，所述多个第一开口将与所述多个通孔电极中的每一个相对应的多个通孔电极暴露在所述第一绝缘层上，并且使用所述关系来校正所述多个第一开口的位置 在多个通孔中的倾斜通孔的打开位置的测量距离值的偏移量与多个通孔中的倾斜通孔的打开位置的设计距离值之间， 相对于基板的中心位置。

公开(公告)号：US08153908B2

公开(公告)日：2012-04-10

申请号：US12173371

申请日：2008-07-15

Applicant: Kenji Iida ,  Tomoyuki Abe ,  Yasutomo Maehara ,  Shin Hirano ,  Takashi Nakagawa ,  Hideaki Yoshimura ,  Seigo Yamawaki ,  Norikazu Ozaki

Inventor： Kenji Iida ,  Tomoyuki Abe ,  Yasutomo Maehara ,  Shin Hirano ,  Takashi Nakagawa ,  Hideaki Yoshimura ,  Seigo Yamawaki ,  Norikazu Ozaki

IPC: H05K1/11 ,  H05K1/03

CPC classification number: H05K9/00 ,  H05K3/38 ,  H05K3/429 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4691 ,  H05K2201/0281 ,  H05K2201/0323 ,  H05K2201/09581 ,  H05K2201/0959 ,  H05K2201/09781 ,  H05K2201/09809 ,  H05K2201/2072 ,  Y10T29/49155

Abstract: The circuit board is capable of tightly bonding a cable layer on a base member even if thermal expansion coefficients of the base member and the cable layer are significantly different. The circuit board comprises: the base member; and the cable layer being laminated on the base member with anchor patterns, which are electrically conductive layers formed on a surface of the base member.

Abstract translation: 即使基部构件和电缆层的热膨胀系数明显不同，电路板也能够将基座构件上的电缆层紧密接合。 电路板包括：基座部件; 并且电缆层被层压在具有锚定图案的基底构件上，锚定图案是形成在基底构件的表面上的导电层。

公开(公告)号：US20110232953A1

公开(公告)日：2011-09-29

申请号：US13074144

申请日：2011-03-29

Applicant: Takeshi Oga ,  Katsura Hayashi

Inventor： Takeshi Oga ,  Katsura Hayashi

IPC: H05K1/02

CPC classification number: H05K3/4602 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/427 ,  H05K2201/0175 ,  H05K2201/0209 ,  H05K2201/029 ,  H05K2201/0769 ,  H05K2201/09481 ,  H05K2201/09581 ,  H05K2201/0959 ,  H05K2201/10674 ,  H05K2201/2072

Abstract: According to one embodiment of the invention, a circuit board comprises an insulating layer including a resin material, a plurality of inorganic insulating particles, and a penetrating hole. The circuit board further comprises a penetrating conductor disposed in the penetrating hole. The insulating layer includes a resin insulating portion having the plurality of inorganic insulating particles dispersed in the resin material. The insulating layer further includes an inorganic insulating portion interposed between the resin insulating portion and the penetrating conductor and made of the same material as the plurality of inorganic insulating particles.

Abstract translation: 根据本发明的一个实施例，电路板包括包括树脂材料，多个无机绝缘颗粒和穿透孔的绝缘层。 电路板还包括布置在穿透孔中的穿透导体。 绝缘层包括具有分散在树脂材料中的多个无机绝缘粒子的树脂绝缘部分。 绝缘层还包括介于树脂绝缘部分和穿透导体之间并由与多个无机绝缘颗粒相同的材料制成的无机绝缘部分。