公开(公告)号：US07297878B2

公开(公告)日：2007-11-20

申请号：US10499978

申请日：2003-12-22

Applicant: Hiroshi Kushitani ,  Ichiro Kameyama

Inventor： Hiroshi Kushitani ,  Ichiro Kameyama

IPC: H01R12/04 ,  H05K1/11

CPC classification number: H01P1/047 ,  H01F27/34 ,  H01L2223/6616 ,  H01L2223/6622 ,  H05K1/024 ,  H05K1/0306 ,  H05K1/115 ,  H05K3/0029 ,  H05K3/4061 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/0187 ,  H05K2201/09581 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2203/107 ,  Y10T29/435 ,  Y10T29/4902

Abstract: The present invention relates to a high frequency laminated component, which is used in a high frequency apparatus such as a radio communication apparatus, and its manufacturing method. An object thereof is to downsize the high frequency laminated component. To achieve the object, according to the high frequency laminated component of the present invention, dielectric layer (4) whose dielectric constant is lower than that of other areas is formed around via-hole electrode (3) in a dielectric. By forming dielectric layer (4) having a low dielectric constant, electric interference between via-hole electrode (3) and circuit electrode (22) is restrained, so that the circuit electrode and the via-hole electrode can be formed more closely each other compared with a conventional one. As a result, the high frequency laminated component can be downsized.

Abstract translation: 本发明涉及用于无线通信装置等高频装置的高频层叠部件及其制造方法。 其目的是减小高频层压部件的尺寸。 为了实现该目的，根据本发明的高频层叠部件，在电介质中的通孔电极（3）的周围形成介电常数低于其他面积的介质层（4）。 通过形成具有低介电常数的介电层（4），可以抑制通孔电极（3）和电路电极（22）之间的电气干扰，使得电路电极和通孔电极可以彼此更紧密地形成 与传统的相比。 结果，可以使高频层叠部件小型化。

公开(公告)号：US20070240901A1

公开(公告)日：2007-10-18

申请号：US11812124

申请日：2007-06-15

Applicant: Keishiro Okamoto ,  Tomoyuki Abe ,  Motoaki Tani ,  Nobuyuki Hayashi

Inventor： Keishiro Okamoto ,  Tomoyuki Abe ,  Motoaki Tani ,  Nobuyuki Hayashi

IPC: H05K1/11

CPC classification number: H05K3/445 ,  H05K1/056 ,  H05K3/426 ,  H05K2201/0179 ,  H05K2201/0195 ,  H05K2201/0323 ,  H05K2201/09581 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: The wiring board comprises a plate-shaped conductive core material 10 with a through-hole 12 formed in, an insulation layer 14 formed on the surface of the conductive core material 10 and on the inside wall of the through-hole 12, a resin 18 buried in the through-hole 12 with the insulation layer 14 formed in, wirings 22a, 22b formed on the upper surface and the undersurface of the conductive core material 10 with the insulation layer 14 formed on, and an wiring 22d formed in the through-hole 20 formed in the resin 18 and electrically connected to the wirings 22a, 22b.

Abstract translation: 布线板包括具有形成在其中的通孔12的板状导电芯材10，形成在导电芯材10的表面上的绝缘层14和通孔12的内壁上的树脂18 埋置在通孔12中，其中形成有绝缘层14，形成在形成有绝缘层14的导电芯材10的上表面和下表面上的布线22a，22b以及形成在其中的布线22d 通孔20形成在树脂18中并电连接到布线22a，22b。

公开(公告)号：US07246435B2

公开(公告)日：2007-07-24

申请号：US11138467

申请日：2005-05-27

Applicant: Keishiro Okamoto ,  Tomoyuki Abe ,  Motoaki Tani ,  Nobuyuki Hayashi

Inventor： Keishiro Okamoto ,  Tomoyuki Abe ,  Motoaki Tani ,  Nobuyuki Hayashi

IPC: H01K3/10

CPC classification number: H05K3/445 ,  H05K1/056 ,  H05K3/426 ,  H05K2201/0179 ,  H05K2201/0195 ,  H05K2201/0323 ,  H05K2201/09581 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: The wiring board comprises a plate-shaped conductive core material 10 with a through-hole 12 formed in, an insulation layer 14 formed on the surface of the conductive core material 10 and on the inside wall of the through-hole 12, a resin 18 buried in the through-hole 12 with the insulation layer 14 formed in, wirings 22a, 22b formed on the upper surface and the undersurface of the conductive core material 10 with the insulation layer 14 formed on, and an wiring 22d formed in the through-hole 20 formed in the resin 18 and electrically connected to the wirings 22a, 22b.

Abstract translation: 布线板包括具有形成在其中的通孔12的板状导电芯材10，形成在导电芯材10的表面上的绝缘层14和通孔12的内壁上的树脂18 埋置在通孔12中，其中形成有绝缘层14，形成在形成有绝缘层14的导电芯材10的上表面和下表面上的布线22a，22b以及形成在其中的布线22d 通孔20形成在树脂18中并电连接到布线22a，22b。

公开(公告)号：US07100275B2

公开(公告)日：2006-09-05

申请号：US10893938

申请日：2004-07-20

Applicant: Toshiyuki Toyoshima ,  Satoshi Yanaura ,  Yasuo Furuhashi ,  Hirofumi Fujioka

Inventor： Toshiyuki Toyoshima ,  Satoshi Yanaura ,  Yasuo Furuhashi ,  Hirofumi Fujioka

IPC: H05K3/36

CPC classification number: H05K3/4069 ,  H05K3/0023 ,  H05K3/4661 ,  H05K2201/0133 ,  H05K2201/0162 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/09581 ,  H05K2201/096 ,  H05K2203/1461 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: Method of producing a multi-layered wiring board comprising the steps of subjecting the photosensitive resin to exposure- and development-treatment to form the holes having a predetermined size and shape; depositing and forming the curable resin to the insulating layer having the holes formed therein in such a manner as to bury the holes, and conducting heat-treatment to form the cured thin film of the curable resin on the surface of the insulating layer; and so removing the curable resin as to leave the cured thin film to obtain the via-holes having the reduced opening size by the cured thin film.

Abstract translation: 制造多层布线板的方法包括以下步骤：对感光树脂进行曝光和显影处理以形成具有预定尺寸和形状的孔; 在形成有孔的绝缘层上沉积和形成固化树脂，以便掩埋孔，进行热处理以在绝缘层的表面上形成固化树脂的固化薄膜; 从而除去固化树脂以留下固化的薄膜，以通过固化的薄膜获得具有减小的开口尺寸的通孔。

公开(公告)号：US20060185141A1

公开(公告)日：2006-08-24

申请号：US11410984

申请日：2006-04-26

Applicant: Toshiaki Mori ,  Kazunori Nakamura ,  Satoru Kuramochi ,  Miyuki Akazawa ,  Koichi Nakayama

Inventor： Toshiaki Mori ,  Kazunori Nakamura ,  Satoru Kuramochi ,  Miyuki Akazawa ,  Koichi Nakayama

IPC: H01G7/00 ,  H01K3/10

CPC classification number: H01L23/49827 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K1/0366 ,  H05K1/162 ,  H05K3/0041 ,  H05K3/0044 ,  H05K3/388 ,  H05K3/4061 ,  H05K3/4069 ,  H05K3/4076 ,  H05K3/426 ,  H05K3/4605 ,  H05K2201/0195 ,  H05K2201/068 ,  H05K2201/09563 ,  H05K2201/09581 ,  H05K2201/09763 ,  H05K2201/09827 ,  H05K2203/025 ,  H05K2203/1338 ,  H05K2203/1581 ,  Y10T29/43 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

Abstract: In a multilayer wiring board comprising a core board, and a wiring layer and an electrically insulating layer that are stacked on one surface of said core board, a thermal expansion coefficient of said core board in XY directions falls within a range of 2 to 20 ppm, a core member for said core board is a core member selected from silicon, ceramics, glass, a glass-epoxy composite, and metal, said core board is provided with a plurality of through holes that are made conductive between the front and the back by a conductive material, and a capacitor is provided on one surface of said core board, wherein said capacitor comprises an upper electrode being the conductive material in said through hole, and a lower electrode disposed so as to confront said upper electrode via a dielectric layer.

公开(公告)号：US07084350B2

公开(公告)日：2006-08-01

申请号：US10492695

申请日：2002-09-30

Applicant: Claudio De La Prieta ,  Andreas Hachtel ,  Thomas Schulte ,  Uwe Glanz ,  Erhard Hirth

Inventor： Claudio De La Prieta ,  Andreas Hachtel ,  Thomas Schulte ,  Uwe Glanz ,  Erhard Hirth

IPC: H01B17/58

CPC classification number: B32B18/00 ,  B32B2315/02 ,  C04B2237/343 ,  C04B2237/348 ,  C04B2237/62 ,  C04B2237/68 ,  C04B2237/80 ,  H05K3/4046 ,  H05K3/4061 ,  H05K3/4629 ,  H05K2201/09581 ,  H05K2203/033

Abstract: A green ceramic insert having a green ceramic body provided with a recess extending through the ceramic body is provided, the recess being filled with a paste which may be converted into an electrical plated hole. A ceramic insert made from a sintered green ceramic insert of this type is also described. In addition, a ceramic green body or a green body composite is provided, which has at least one recess in some areas, into which one of the described green ceramic inserts is inserted. The ceramic insert may be integrally joined to the laminated composite, a conductive paste converted by sintering into a printed conductor being routed on the laminated composite in a manner electrically insulated from it, and electroconductively connecting the top of the laminated composite to its bottom via the electrical plated hole.

Abstract translation: 提供了具有延伸穿过陶瓷体的凹部的具有生坯陶瓷体的绿色陶瓷插入件，该凹部填充有可以转化为电镀孔的浆料。 还描述了由这种类型的烧结的生坯陶瓷插入物制成的陶瓷插入件。 此外，提供陶瓷生坯或生坯复合体，其在一些区域中具有至少一个凹部，所述生坯陶瓷插入件中的一个插入其中。 陶瓷插入件可以整体地接合到层压复合材料上，通过烧结转化成印刷导体的导电膏以层压复合材料的方式与其电绝缘的方式布线，并且经由该层压复合材料的顶部经由 电镀孔。

公开(公告)号：US06671951B2

公开(公告)日：2004-01-06

申请号：US09975780

申请日：2001-10-12

Applicant: Toshihiro Nishii ,  Shigeru Yamane ,  Shinji Nakamura ,  Hidenori Hayashi ,  Toru Fujimoto ,  Toshiharu Okada ,  Izuru Nakai

Inventor： Toshihiro Nishii ,  Shigeru Yamane ,  Shinji Nakamura ,  Hidenori Hayashi ,  Toru Fujimoto ,  Toshiharu Okada ,  Izuru Nakai

IPC: H01R2368

CPC classification number: H05K3/4069 ,  H05K1/0366 ,  H05K3/0032 ,  H05K2201/0278 ,  H05K2201/0355 ,  H05K2201/09581 ,  H05K2203/1136 ,  H05K2203/1461 ,  Y10T29/49165 ,  Y10T428/24917 ,  Y10T428/249953 ,  Y10T428/249996

Abstract: In manufacturing a double-layered or a multi-layered printed wiring board, a layer of metamorphic substance, which is created by transmuting a substrate material, is formed on an inner wall of a hole during a perforation process of the substrate utilizing radiation energy. The layer of metamorphic substance prevents conductive materials constituting electrical connection means formed on the inner wall of the hole from dispersing over a surface of the substrate or permeating into the substrate.

Abstract translation: 在制造双层或多层印刷线路板的过程中，利用辐射能在衬底的穿孔过程中，在孔的内壁上形成通过变换衬底材料产生的变质物质层。 变质物质层防止形成在孔的内壁上的电连接装置的导电材料在基体的表面上分散或渗透到基底中。

公开(公告)号：US06607780B1

公开(公告)日：2003-08-19

申请号：US09578580

申请日：2000-05-25

Applicant: Govindarajan Natarajan ,  John U. Knickerbocker ,  Robert W. Pasco

Inventor： Govindarajan Natarajan ,  John U. Knickerbocker ,  Robert W. Pasco

IPC: B05D512

CPC classification number: H01L21/486 ,  H05K1/0306 ,  H05K3/4061 ,  H05K3/4614 ,  H05K3/4629 ,  H05K2201/09581 ,  H05K2203/0152 ,  H05K2203/0156 ,  Y10T29/49126 ,  Y10T156/1057 ,  Y10T428/24917 ,  Y10T428/24926

Abstract: The present invention relates generally to a new ceramic structure and process thereof. Basically, the present invention relates to a structure and method for forming laminated structures and more particularly to a structure and method for fabricating multi-layer ceramic products using very thin green sheets and/or green sheets with very dense electrically conductive patterns on top of a stronger support sheet. The structure and method of the present invention enables the screening, stacking and handling of very thin green sheets and/or green sheets with very dense metallized patterns in the manufacture of multi-layer ceramic packages. The thin green sheets were tacked/bonded to thicker and stronger support sheets to form a sub-structure which had excellent stability in screening and enabled further processing. The sheets are anchored or pinned in such a way as to allow the processing of the green sheet with the subsequent easy removal of the support sheet.

Abstract translation: 本发明一般涉及一种新的陶瓷结构及其工艺。 基本上，本发明涉及一种用于形成层压结构的结构和方法，更具体地涉及一种使用非常薄的生坯片和/或具有非常致密导电图案的生片在多层陶瓷产品的顶部制造多层陶瓷产品的结构和方法 更强的支撑板。 本发明的结构和方法能够在制造多层陶瓷封装中筛选，堆叠和处理具有非常密集金属化图案的非常薄的生片和/或生片。 薄的生片被粘合到较厚和更坚固的支撑片上以形成在筛选中具有优异稳定性并能够进一步加工的亚结构。 这些片材以这样的方式锚定或固定，以便随后可以容易地移除支撑片材来处理生片。

公开(公告)号：US20030091730A1

公开(公告)日：2003-05-15

申请号：US10234772

申请日：2002-09-04

Inventor： Rebecca A. Jessep ,  Terrance J. Dishongh ,  Carolyn R. McCormick ,  Thomas O. Morgan

IPC: B05D005/12 ,  B05D001/32 ,  B32B003/26

CPC classification number: H05K1/024 ,  G01B11/2441 ,  G01B11/255 ,  H05K3/0047 ,  H05K3/429 ,  H05K3/445 ,  H05K2201/0187 ,  H05K2201/09309 ,  H05K2201/09581 ,  H05K2201/09718 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T428/24917

Abstract: A protective coating of insulating material is formed around a clearance hole in a conductive layer of a printed circuit board, so that the conductive material in a via within the clearance hole will not contact the conductive layer and create a short circuit. In one embodiment, the protective coating is sufficiently hard to deflect a drill bit being used to drill the via hole, thus protecting against misregistered drilled holes.

Abstract translation: 在印刷电路板的导电层中的间隙孔周围形成绝缘材料的保护涂层，使得间隙孔内的通路中的导电材料不会接触导电层并产生短路。 在一个实施例中，保护涂层足够难以偏转用于钻通孔的钻头，从而防止不配准的钻孔。

公开(公告)号：US20020182804A1

公开(公告)日：2002-12-05

申请号：US10155700

申请日：2002-05-24

Applicant: Matsushita Electric Industrial Co. Ltd.

Inventor： Fumio Echigo ,  Tadashi Nakamura ,  Daizo Andoh

IPC: H01L021/8242

CPC classification number: H05K1/162 ,  H01L28/60 ,  H05K1/141 ,  H05K3/4069 ,  H05K3/429 ,  H05K2201/09309 ,  H05K2201/09581

Abstract: A capacitor sheet includes a laminate sheet, interface-connection feedthrough conductors for electrically connecting faces of the laminate sheet, and capacitor-connection feedthrough conductors. The laminate sheet has at least one laminate which is composed of a power source layer electrode, a grounding layer electrode, and a dielectric layer interposed between the power source layer electrode and the grounding layer electrode. The interface-connection feedthrough conductors are formed in through holes that pass through the dielectric layer, the power source layer electrode, and the grounding layer electrode, and are insulated by insulation walls from the power source layer electrode and the grounding layer electrode provided inside. The capacitor-connection feedthrough conductors are formed in regions where only either the power source layer electrode or the grounding layer electrode is provided, and are connected electrically with either the power source layer electrode or the grounding layer electrode. This configuration makes the electric connection for employing the capacitors and the electric connection between faces of the sheet independent from each other. Thus, it is possible to provide a capacitor sheet in which the adverse effects of inductances of vias are minimized.

Abstract translation: 电容器片包括层压片，用于电连接层压片的表面的接口连接馈通导体和电容器连接馈通导体。 层叠片具有至少一层由电源层电极，接地层电极和插在电源层电极和接地层电极之间的电介质层构成的层叠体。 界面连接馈通导体形成在穿过电介质层，电源层电极和接地层电极的通孔中，并且由设置在内部的电源层电极和接地层电极的绝缘壁绝缘。 电容器连接馈通导体形成在仅设置电源层电极或接地层电极的区域中，并且与电源层电极或接地层电极电连接。 这种构造使得用于采用电容器的电连接和片材的面之间的电连接彼此独立。 因此，可以提供一种电容器片，其中通孔的电感的不利影响被最小化。