公开(公告)号：US5786234A

公开(公告)日：1998-07-28

申请号：US873459

申请日：1997-06-12

Applicant: Yutaka Nagai ,  Hitoshi Tada

Inventor： Yutaka Nagai ,  Hitoshi Tada

IPC: H01S5/00 ,  H01S5/20 ,  H01S5/223 ,  H01S5/323 ,  H01L21/00

CPC classification number: H01S5/2231 ,  H01S5/209 ,  H01S5/32316 ,  Y10S438/955

Abstract: A method of fabricating a semiconductor laser includes successively epitaxially growing on a first conductivity type semiconductor substrate, a first conductivity type lower cladding layer, an active layer, a second conductivity type first upper cladding layer having a relatively high etching rate in an etchant, a second conductivity type etch stopping layer having a relatively low etching rate in the etchant, a second conductivity type second upper cladding layer, and a second conductivity type first contact layer; forming a stripe-shaped mask on the first contact layer; removing portions of the first contact layer and the second upper cladding layer in a first wet etching step to expose the etch stopping layer; removing portions of the second upper cladding layer in a second wet etching step to form a stripe-shaped ridge structure having a reverse mesa cross section without an intermediate construction; growing a first conductivity type current blocking layer contacting both sides of the ridge structure; and after removal of the mask, growing a second conductivity type second contact layer on the current blocking layer and on the first contact layer. The angle between the side wall of the ridge and the etch stopping layer is an acute angle so the stripe-shaped ridge structure has a perfect reverse mesa cross section and is narrowest proximate the active layer.

Abstract translation: 制造半导体激光器的方法包括在蚀刻剂上具有相对较高蚀刻速率的第一导电型半导体衬底，第一导电型下包层，有源层，第二导电类型的第一上敷层， 第二导电型蚀刻停止层，在蚀刻剂中具有相对低的蚀刻速率，第二导电类型的第二上覆层和第二导电类型的第一接触层; 在所述第一接触层上形成条形掩模; 在第一湿蚀刻步骤中去除第一接触层和第二上包层的部分以暴露蚀刻停止层; 在第二湿蚀刻步骤中去除第二上包层的部分，以形成具有不具有中间结构的反台面横截面的条形脊结构; 生长接触脊结构两侧的第一导电型电流阻挡层; 并且在去除掩模之后，在电流阻挡层和第一接触层上生长第二导电类型的第二接触层。 脊的侧壁与蚀刻停止层之间的角度是锐角，因此条形脊结构具有完美的逆台面横截面，并且在有源层附近最窄。

公开(公告)号：US5712604A

公开(公告)日：1998-01-27

申请号：US469443

申请日：1995-06-06

Applicant: Hitoshi Tada ,  Hideyuki Kato ,  Haruo Matsumoto ,  Tatsuya Tsujiguchi

Inventor： Hitoshi Tada ,  Hideyuki Kato ,  Haruo Matsumoto ,  Tatsuya Tsujiguchi

IPC: H01P1/205 ,  H01P1/20

CPC classification number: H01P1/2056

Abstract: A single-stage dielectric band elimination filter has a dielectric block with its outer surfaces mostly covered by an outer conductor and two mutually coupled resonant lines formed therein. Each resonant line has an open end insulated from the outer conductor and a shorted end connected thereto, the open and shorted ends of the two resonant lines being oppositely oriented. A multi-stage dielectric filter has a plurality of such single-stage band elimination filters formed inside a dielectric block, each mutually adjacent pair of the single-stage band elimination filters being interdigitally coupled or combline-coupled to each other with phase shift of II/2 therebetween. The open end of a resonant line may be formed at one of the end surfaces of the dielectric block, being connected to an electrode insulated from the outer conductor, or at an annular conductor-free area formed on the inner surface of the corresponding throughhole. The resonant lines for forming the plurality of single-stage band elimination filters may be arranged horizontally or vertically with respect to each other. Screening electrodes may be inserted between mutually adjacent resonant lines.

Abstract translation: 单级介质带除滤波器具有介电块，其外表面主要被外导体覆盖，并且形成有两个相互耦合的谐振线。 每个谐振线路具有与外部导体绝缘的开口端和与其连接的短路端，两个谐振线路的开路端和短路端相对定向。 多级介质滤波器具有形成在介质块内部的多个这样的单级带除滤波器，每个相互相邻的单级带除滤波器对被互相连接或组合耦合，具有II相位 / 2。 谐振线路的开口端可以形成在介质块的一个端面上，连接到与外部导体绝缘的电极，或形成在相应通孔的内表面上的环形无导体区域。 用于形成多个单级带除滤波器的谐振线路可以相对于彼此水平或垂直布置。 屏蔽电极可以插入相互相邻的谐振线之间。

公开(公告)号：US5684902A

公开(公告)日：1997-11-04

申请号：US677208

申请日：1996-07-09

Applicant: Hitoshi Tada

Inventor： Hitoshi Tada

IPC: G02B6/42 ,  H01L25/04 ,  H01L25/18 ,  H01S5/00 ,  H01S5/022 ,  G02B6/36

CPC classification number: G02B6/423 ,  H01S5/02252 ,  G02B6/4224 ,  H01S5/0207 ,  H01S5/02244 ,  H01S5/2275

Abstract: In a semiconductor laser module wherein a semiconductor laser chip having a light emitting facet and an optical fiber having a fiber facet are mounted on a module substrate so that the light emitting facet faces the fiber facet, the semiconductor laser chip includes semiconductor layers disposed on a semiconductor substrate and including a light emitting region, and the semiconductor substrate has a portion protruding beyond the light emitting facet. The optical fiber includes a core extending in the optical waveguide direction and a cladding part surrounding the core. In this module, positioning of the optical fiber in the optical axis direction is performed by abutting a portion of the cladding part at the fiber facet against the protruding portion of the substrate of the semiconductor laser chip. Therefore, alignment of the optical fiber with the laser chip in the optical axis direction is performed easily and accurately with a desired spacing between them, without contacting the light emitting facet of the laser chip to the fiber facet, whereby coupling efficiency between the laser chip and the optical fiber is significantly improved.

Abstract translation: 在其中具有发光面的半导体激光器芯片和具有光纤面的光纤的半导体激光器模块安装在模块基板上，使得发光小面面向光纤面，半导体激光器芯片包括设置在光纤面上的半导体层 半导体衬底并且包括发光区域，并且所述半导体衬底具有突出超过所述发光小面的部分。 光纤包括沿光波导方向延伸的芯和围绕芯的包层部。 在该模块中，通过使光纤面上的包层部的一部分抵靠半导体激光芯片的基板的突出部而使光纤在光轴方向上的定位。 因此，光纤与激光芯片的光轴方向的对准以其间的期望的间隔容易且准确地进行，而不会将激光芯片的发光面与光纤面相接触，由此激光芯片 光纤显着改善。

公开(公告)号：US5668822A

公开(公告)日：1997-09-16

申请号：US493545

申请日：1995-06-22

Applicant: Hitoshi Tada

Inventor： Hitoshi Tada

IPC: H01S5/00 ,  H01S5/024 ,  H01S5/40 ,  H01S3/04

CPC classification number: H01S5/02272 ,  H01S5/02236 ,  H01S5/024 ,  H01S5/4031 ,  H01S5/02252 ,  H01S5/02276 ,  H01S5/4018 ,  H01S5/4037

Abstract: A method of fabricating an integrated semiconductor laser device includes preparing a polygonal heat sink having side surfaces, and die-bonding semiconductor laser chips to the side surfaces of the heat sink. Therefore, the semiconductor laser chips are accurately arranged at such positions that laser beams emitted from these laser chips are parallel to each other and partially overlap each other. In addition, the semiconductor laser chips are integrated without unwanted contact of a conductive material used for the die-bonding to an active layer exposed at a facet of each laser chip. Further, since the complicated process of die-bonding a laser chip on another laser chip is dispensed with, the fabricating method is easily automated.

Abstract translation: 一种制造集成半导体激光器件的方法包括制备具有侧表面的多边形散热器，并将半导体激光芯片芯片接合到散热器的侧表面。 因此，半导体激光芯片精确地布置在这些位置上，使得从这些激光芯片发射的激光束彼此平行并且部分地彼此重叠。 此外，将半导体激光芯片集成在一起，而不用用于芯片接合的导电材料与暴露在每个激光芯片的小面处的有源层接触。 此外，由于省去了将激光芯片芯片接合在另一激光芯片上的复杂工艺，所以制造方法容易自动化。

公开(公告)号：US5585309A

公开(公告)日：1996-12-17

申请号：US327841

申请日：1994-10-17

Applicant: Kenzo Mori ,  Tadashi Kimura ,  Yoshitatu Kawama ,  Nobuaki Kaneno ,  Tatuya Kimura ,  Yuji Okura ,  Hitoshi Tada

Inventor： Kenzo Mori ,  Tadashi Kimura ,  Yoshitatu Kawama ,  Nobuaki Kaneno ,  Tatuya Kimura ,  Yuji Okura ,  Hitoshi Tada

IPC: H01S5/00 ,  H01S5/20 ,  H01S5/22 ,  H01S5/227 ,  H01S5/323 ,  H01L21/20

CPC classification number: H01S5/227 ,  H01S5/2059 ,  H01S5/2081 ,  H01S5/209 ,  H01S5/2201 ,  H01S5/2205 ,  H01S5/2206 ,  H01S5/2272 ,  H01S5/2275 ,  H01S5/32391 ,  Y10S148/095

Abstract: A method for fabricating a semiconductor laser includes forming a double heterojunction structure on a first conductivity type semiconductor substrate; forming the double heterojunction structure into a stripe mesa shape by selective etching; successively growing a first conductivity type layer, a second conductivity type current blocking layer, and a first conductivity type current blocking layer on opposite sides of the mesa to embed the mesa; and adding an impurity from a surface of the first conductivity type current blocking layer to form impurity doped regions that electrically separate the second conductivity type current blocking layer from an upper part of the mesa at opposite sides of the mesa.

Abstract translation: 一种制造半导体激光器的方法包括在第一导电型半导体衬底上形成双异质结结构; 通过选择性蚀刻将双异质结结构形成条状台面形状; 在台面的相对侧依次生长第一导电型层，第二导电型电流阻挡层和第一导电型电流阻挡层，以嵌入台面; 以及从所述第一导电型电流阻挡层的表面添加杂质，以形成将所述第二导电型电流阻挡层与所述台面的相对侧的所述台面的上部电分离的杂质掺杂区域。

公开(公告)号：US5572175A

公开(公告)日：1996-11-05

申请号：US509332

申请日：1995-07-31

Applicant: Hiroshi Tada ,  Hajime Suemasa ,  Haruo Matsumoto ,  Takashi Maruyama ,  Hideyuki Kato ,  Yasuo Yamada ,  Hirohumi Miyamoto ,  Hitoshi Tada

Inventor： Hiroshi Tada ,  Hajime Suemasa ,  Haruo Matsumoto ,  Takashi Maruyama ,  Hideyuki Kato ,  Yasuo Yamada ,  Hirohumi Miyamoto ,  Hitoshi Tada

IPC: H01P1/205 ,  H01P1/213 ,  H01P5/08 ,  H01P7/04 ,  H05K1/02 ,  H05K1/14 ,  H05K3/34 ,  H05K3/36 ,  H01P1/202

CPC classification number: H05K1/0243 ,  H01P1/2056 ,  H05K1/141 ,  H05K2201/049 ,  H05K2201/09181 ,  H05K2201/10068 ,  H05K2201/10969 ,  H05K3/3442 ,  H05K3/3452 ,  H05K3/368

Abstract: A dielectric resonant component includes at least one dielectric multistage resonator including one dielectric block, a plurality of inner conductor formation holes formed in the one dielectric block, an inner conductor formed on an inner surface of each of the inner conductor formation holes, and an outer conductor covering a substantially entire outer surface of the one dielectric block, the dielectric multistage resonator constituting a plurality of dielectric resonators in the one dielectric block; and a mount substrate fixedly mounted on the dielectric multistage resonator, for transmitting a signal transmission between each of the dielectric resonators of the dielectric multistage resonator and an external circuit board, when the dielectric resonant component is mounted on the external circuit board. The dielectric multistage resonator further includes a pair of input/output electrodes, and the mount substrate includes a unit for connecting the input/output electrodes of the dielectric multistage resonator to a pair of input/output electrodes formed on the circuit board.

Abstract translation: 电介质谐振元件包括至少一个电介质多级谐振器，其包括一个介质块，形成在一个介质块中的多个内导体形成孔，形成在每个内导体形成孔的内表面上的内导体， 导电体覆盖一个介质块的基本上整个的外表面，电介质多级谐振器在该介电块中构成多个介质谐振器; 以及固定地安装在电介质多级谐振器上的安装基板，用于在电介质多级谐振器的每个介质谐振器和外部电路板之间传输信号，当介质谐振元件安装在外部电路板上时。 电介质多级谐振器还包括一对输入/输出电极，并且安装基板包括用于将电介质多级谐振器的输入/输出电极连接到形成在电路板上的一对输入/输出电极的单元。

公开(公告)号：US5537082A

公开(公告)日：1996-07-16

申请号：US198819

申请日：1994-02-18

Applicant: Hitoshi Tada ,  Hideyuki Kato ,  Tatsuya Tsujiguchi ,  Yukihiro Kitaichi ,  Tadahiro Yorita ,  Hisashi Mori ,  Haruo Matsumoto

Inventor： Hitoshi Tada ,  Hideyuki Kato ,  Tatsuya Tsujiguchi ,  Yukihiro Kitaichi ,  Tadahiro Yorita ,  Hisashi Mori ,  Haruo Matsumoto

IPC: H01P1/205

CPC classification number: H01P1/2056

Abstract: A compact dielectric resonator apparatus is comprised of a dielectric block having a plurality of mutually parallel throughholes formed therethrough with inner surfaces covered with a conductive film so as to provide coaxial resonators. The degree of coupling between a mutually adjacent pair of such dielectric resonators can be adjusted by forming grooves, a bottomed hole or a slit or burying a conductive plate therebetween in the dielectric block, and varying physical characteristics of such grooves, bottomed hole, slit and/or conductive plate, without changing the separations between the throughholes or the external dimensions of the dielectric block.

Abstract translation: 紧凑的介质谐振器装置包括具有多个彼此平行的通孔，其内表面被导电膜覆盖以便提供同轴谐振器的介质块。 可以通过在介质块中形成沟槽，有底孔或狭缝或在其间埋设导电板来调节相互相邻的一对这样的介电谐振器之间的耦合程度，以及这些沟槽，有底孔，狭缝和 /或导电板，而不改变通孔之间的间隔或介质块的外部尺寸。

公开(公告)号：US5418799A

公开(公告)日：1995-05-23

申请号：US147499

申请日：1993-11-05

Applicant: Hitoshi Tada

Inventor： Hitoshi Tada

IPC: H01L21/301 ,  H01S5/00 ,  H01S5/02 ,  H01S3/19

CPC classification number: H01S5/0201 ,  H01S5/0202

Abstract: A semiconductor laser device element substrate includes a plurality of semiconductor laser device elements arranged in an array on a semiconductor substrate, the array including a plurality of rows and a plurality of columns, laser resonator facets being located at the boundaries between respective rows of the semiconductor laser device elements, and element separation guiding grooves, for guiding separation of the substrate into a plurality of divided semiconductor laser devices, the grooves being located at the boundaries between the semiconductor laser device elements of the respective columns, wherein the element separation guiding grooves are arranged at positions on different straight lines running in the column direction for each group at least two adjacent rows. Therefore, even if some forces are applied to the substrate, the forces are not concentrated on a point, whereby wafer cracking can be prevented.

Abstract translation: 半导体激光器件元件基板包括在半导体衬底上排列成阵列的多个半导体激光器件元件，该阵列包括多个行和多个列，激光谐振器面位于半导体的各行之间的边界处 激光装置元件和元件分离引导槽，用于将基板分离成多个划分的半导体激光器件，所述槽位于各列的半导体激光器件元件之间的边界处，其中元件分离引导槽是 布置在每组至少两个相邻行上在列方向上运行的不同直线上的位置。 因此，即使有一些力施加到基板上，力也不集中在一个点上，从而可以防止晶片破裂。

公开(公告)号：US5316967A

公开(公告)日：1994-05-31

申请号：US975109

申请日：1992-11-12

Applicant: Nobuaki Kaneno ,  Hirotaka Kizuki ,  Norio Hayafuji ,  Tetsuo Shiba ,  Hitoshi Tada

Inventor： Nobuaki Kaneno ,  Hirotaka Kizuki ,  Norio Hayafuji ,  Tetsuo Shiba ,  Hitoshi Tada

IPC: H01L21/20 ,  H01L21/308 ,  H01S5/20 ,  H01S5/223 ,  H01S5/227 ,  H01S5/323

CPC classification number: H01L21/3081 ,  H01L21/02392 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02505 ,  H01L21/02546 ,  H01L21/0262 ,  H01S5/2231 ,  H01S2304/04 ,  H01S5/2081 ,  H01S5/2277 ,  H01S5/32325

Abstract: In a method for producing a semiconductor device, a first semiconductor layer is epitaxially grown on a semiconductor substrate, an insulating film pattern is formed on the first semiconductor layer, and portions of the first semiconductor layer are removed by wet etching using the insulating film pattern as a mask to leave a ridge having a reverse mesa shape and a width. Ends of the insulating film pattern are removed by etching to approximately the width of the ridge, a second semiconductor layer is epitaxially grown on opposite sides of the ridge, and a third semiconductor layer is epitaxially grown on the ridge and the second semiconductor layer. The second semiconductor layer is evenly grown without concave portions at opposite sides of the ridge. In addition, the third semiconductor layer is evenly grown on the ridge and the second semiconductor layer, and an electrode reliably connects the surface of the third semiconductor layer. A semiconductor device with good performance and high reliability is reproducibly manufactured.

Abstract translation: 在制造半导体器件的方法中，在半导体衬底上外延生长第一半导体层，在第一半导体层上形成绝缘膜图案，并且通过使用绝缘膜图案的湿蚀刻去除第一半导体层的部分 作为掩模，离开具有反台面形状和宽度的脊。 绝缘膜图案的端部通过蚀刻到脊的宽度去除，在脊的相对侧上外延生长第二半导体层，并且在脊和第二半导体层上外延生长第三半导体层。 第二半导体层在脊的相对侧均匀生长而没有凹部。 此外，第三半导体层均匀地生长在脊和第二半导体层上，并且电极可靠地连接第三半导体层的表面。 可重复地制造具有良好性能和高可靠性的半导体器件。

公开(公告)号：US08519501B2

公开(公告)日：2013-08-27

申请号：US13477128

申请日：2012-05-22

Applicant: Hitoshi Tada ,  Yasuo Nakajima ,  Yasuhiro Kunitsugu

Inventor： Hitoshi Tada ,  Yasuo Nakajima ,  Yasuhiro Kunitsugu

IPC: H01L31/0232

CPC classification number: H01L31/02327 ,  H01L31/035281 ,  H01L31/105 ,  Y02E10/50

Abstract: A back-surface-incidence semiconductor light element includes: a semiconductor substrate of a first conductivity type; a first semiconductor layer of a first conductivity type on the semiconductor substrate; a light absorbing layer on the first semiconductor layer; a second semiconductor layer on the light absorbing layer; and an impurity diffusion region of a second conductivity type in a portion of the second semiconductor layer. A region including a p-n junction between the first semiconductor layer and the impurity diffusion region, and extending through the light absorbing layer, is a light detecting portion that detects light incident on a back surface of the semiconductor substrate. A groove in the back surface of the semiconductor substrate surrounds the light detecting portion, as viewed in plan.

Abstract translation: 背面入射半导体光元件包括：第一导电类型的半导体衬底; 半导体衬底上的第一导电类型的第一半导体层; 在第一半导体层上的光吸收层; 在所述光吸收层上的第二半导体层; 以及在第二半导体层的一部分中具有第二导电类型的杂质扩散区。 包括第一半导体层和杂质扩散区之间并延伸穿过光吸收层的p-n结的区域是检测入射在半导体衬底的背面上的光的光检测部分。 半导体衬底的后表面中的凹槽围绕光检测部分，如在平面图中所示。