公开(公告)号：US20190198965A1

公开(公告)日：2019-06-27

申请号：US16325522

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Georgios C. Dogiamis ,  Sasha N. Oster ,  Adel A. Elsherbini ,  Brandon M. Rawlings ,  Aleksandar Aleksov ,  Shawna M. Liff ,  Richard J. Dischler ,  Johanna M. Swan

IPC: H01P11/00 ,  H01P3/12

CPC classification number: H01P11/002 ,  H01P3/122

Abstract: An apparatus comprises a waveguide section including an outer layer of conductive material tubular in shape and having multiple ends; and a joining feature on at least one of the ends of the waveguide section configured for joining to a second separate waveguide section.

公开(公告)号：US20190173149A1

公开(公告)日：2019-06-06

申请号：US16325301

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Sasha N. Oster ,  Georgios C. Dogiamis ,  Telesphor Kamgaing ,  Shawna M. Liff ,  Aleksandar Aleksov ,  Johanna M. Swan ,  Brandon M. Rawlings ,  Richard J. Dischler

IPC: H01P3/12 ,  H01P11/00 ,  H01P3/127 ,  H01P3/16

Abstract: An apparatus comprises a waveguide including: an elongate waveguide core including a dielectric material, wherein the waveguide core includes at least one space arranged lengthwise along the waveguide core that is void of the dielectric material; and a conductive layer arranged around the waveguide core.

公开(公告)号：US10263312B2

公开(公告)日：2019-04-16

申请号：US15282050

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Sasha N. Oster ,  Aleksandar Aleksov ,  Georgios C. Dogiamis ,  Telesphor Kamgaing ,  Adel A. Elsherbini ,  Shawna M. Liff ,  Johanna M. Swan ,  Brandon M. Rawlings ,  Richard J. Dischler

IPC: H01P3/12 ,  H01P3/16 ,  H01P11/00 ,  H01P3/14

Abstract: A method of making a waveguide ribbon that includes a plurality of waveguides comprises joining a first sheet of dielectric material to a first conductive sheet of conductive material, patterning the first sheet of dielectric material to form a plurality of dielectric waveguide cores on the first conductive sheet, and coating the dielectric waveguide cores with substantially the same conductive material as the conductive sheet to form the plurality of waveguides.

公开(公告)号：US20170280568A1

公开(公告)日：2017-09-28

申请号：US15621403

申请日：2017-06-13

Applicant: Intel Corporation

Inventor： Brandon M. Rawlings ,  Henning Braunisch

IPC: H05K3/00 ,  H05K3/46 ,  H05K1/11 ,  H05K3/42

CPC classification number: H05K3/0082 ,  H05K1/116 ,  H05K3/422 ,  H05K3/424 ,  H05K3/4647 ,  H05K3/4679 ,  H05K2201/09463 ,  H05K2201/09854 ,  H05K2203/0505

Abstract: A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.

公开(公告)号：US20170084554A1

公开(公告)日：2017-03-23

申请号：US14860614

申请日：2015-09-21

Applicant: INTEL CORPORATION

Inventor： Georgios C. Dogiamis ,  Sasha N. Oster ,  Telesphor Kamgaing ,  Adel A. Elsherbini ,  Brandon M. Rawlings ,  Feras Eid

IPC: H01L23/66 ,  H01L23/367 ,  H01L23/498

CPC classification number: H01L23/66 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5383 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L25/0655 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/73253 ,  H01L2924/1421 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15321 ,  H01L2924/16251 ,  H01L2924/163 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Embodiments of the invention may include a packaged device that includes thermally stable radio frequency integrated circuits (RFICs). In one embodiment the packaged device may include an integrated circuit chip mounted to a package substrate. According to an embodiment, the package substrate may have conductive lines that communicatively couple the integrated circuit chip to one or more external components. One of the external components may be an RFIC module. The RFIC module may comprise an RFIC and an antenna. Additional embodiments may also include a packaged device that includes a plurality of cooling spots formed into the package substrate. In an embodiment the cooling spots may be formed proximate to interconnect lines the communicatively couple the integrated circuit chip to the RFIC.

公开(公告)号：US20160183370A1

公开(公告)日：2016-06-23

申请号：US14576107

申请日：2014-12-18

Applicant: Intel Corporation

Inventor： Brandon M. Rawlings ,  Henning BRAUNISCH

IPC: H05K1/11 ,  H05K1/09 ,  H05K3/06 ,  H05K3/40 ,  H05K3/02 ,  H05K1/02 ,  H05K3/46

CPC classification number: H05K3/0082 ,  H05K1/116 ,  H05K3/422 ,  H05K3/424 ,  H05K3/4647 ,  H05K3/4679 ,  H05K2201/09463 ,  H05K2201/09854 ,  H05K2203/0505

Abstract: A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.

Abstract translation: 光致抗蚀剂沉积在基底上的种子层上。 去除光致抗蚀剂的第一区域以暴露种子层的第一部分以形成通孔垫结构。 第一导电层沉积在种子层的第一部分上。 去除与第一区域相邻的光致抗蚀剂的第二区域以暴露种子层的第二部分以形成线。 第二导电层沉积在第一导电层和籽晶层的第二部分上。